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Commit efa63c6495fb6f83a1cc183f0df2617e383392e9

Authored by Thomas Gleixner
1 parent 1f12681ab1
Exists in master and in 39 other branches 8mp-imx_5.4.70_2.3.0, 8qm-imx_5.4.70_2.3.0, emb_imx_lf-5.15.y, emb_lf-6.1.y, imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, imx_4.1.15_1.0.0_ga, pitx_8mp_lf-5.10.y, rt-smarc-imx_4.1.15_1.0.0_ga, rt_linux_5.15.71, smarc-8m-android-11.0.0_2.0.0, smarc-imx6_4.14.98_2.0.0_ga, smarc-imx6_4.9.88_2.0.0_ga, smarc-imx7_4.14.98_2.0.0_ga, smarc-imx7_4.9.11_1.0.0_ga, smarc-imx7_4.9.88_2.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-imx_4.1.15_1.0.0_ga, smarc-imx_4.9.11_1.0.0_ga, smarc-imx_4.9.51_imx8m_ga, smarc-imx_4.9.88_2.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_1.2.0_ga, smarc_8m_00d0_imx_4.14.98_2.0.0_ga, smarc_8m_imx_4.14.78_1.0.0_ga, smarc_8m_imx_4.14.98_2.0.0_ga, smarc_8m_imx_4.19.35_1.1.0, smarc_8mm_imx_4.14.78_1.0.0_ga, smarc_8mm_imx_4.14.98_2.0.0_ga, smarc_8mm_imx_4.19.35_1.1.0, smarc_8mm_imx_5.4.24_2.1.0, smarc_8mp_lf-5.10.y, smarc_8mq_imx_5.4.24_2.1.0, smarc_8mq_lf-5.10.y, smarc_imx_lf-5.15.y

m32r: Convert mappi2 irq chip 

Convert the irq chips to the new functions and use proper flow
handlers. handle_level_irq is appropriate.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Hirokazu Takata <takata@linux-m32r.org>
Cc: Paul Mundt <lethal@linux-sh.org>

Showing 1 changed file with 30 additions and 29 deletions Side-by-side Diff

arch/m32r/platforms/mappi2/setup.c
Diff comments   View file @ efa63c6
... ... @@ -46,96 +46,97 @@
46 46 outl(data, port);
47 47 }
48 48  
49   -static void mask_and_ack_mappi2(unsigned int irq)
  49 +static void mask_mappi2(struct irq_data *data)
50 50 {
51   - disable_mappi2_irq(irq);
  51 + disable_mappi2_irq(data->irq);
52 52 }
53 53  
54   -static void end_mappi2_irq(unsigned int irq)
  54 +static void unmask_mappi2(struct irq_data *data)
55 55 {
56   - enable_mappi2_irq(irq);
  56 + enable_mappi2_irq(data->irq);
57 57 }
58 58  
59   -static unsigned int startup_mappi2_irq(unsigned int irq)
  59 +static void shutdown_mappi2(struct irq_data *data)
60 60 {
61   - enable_mappi2_irq(irq);
62   - return (0);
63   -}
64   -
65   -static void shutdown_mappi2_irq(unsigned int irq)
66   -{
67 61 unsigned long port;
68 62  
69   - port = irq2port(irq);
  63 + port = irq2port(data->irq);
70 64 outl(M32R_ICUCR_ILEVEL7, port);
71 65 }
72 66  
73 67 static struct irq_chip mappi2_irq_type =
74 68 {
75   - .name = "MAPPI2-IRQ",
76   - .startup = startup_mappi2_irq,
77   - .shutdown = shutdown_mappi2_irq,
78   - .enable = enable_mappi2_irq,
79   - .disable = disable_mappi2_irq,
80   - .ack = mask_and_ack_mappi2,
81   - .end = end_mappi2_irq
  69 + .name = "MAPPI2-IRQ",
  70 + .irq_shutdown = shutdown_mappi2,
  71 + .irq_mask = mask_mappi2,
  72 + .irq_unmask = unmask_mappi2,
82 73 };
83 74  
84 75 void __init init_IRQ(void)
85 76 {
86 77 #if defined(CONFIG_SMC91X)
87 78 /* INT0 : LAN controller (SMC91111) */
88   - set_irq_chip(M32R_IRQ_INT0, &mappi2_irq_type);
  79 + set_irq_chip_and_handler(M32R_IRQ_INT0, &mappi2_irq_type,
  80 + handle_level_irq);
89 81 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
90 82 disable_mappi2_irq(M32R_IRQ_INT0);
91 83 #endif /* CONFIG_SMC91X */
92 84  
93 85 /* MFT2 : system timer */
94   - set_irq_chip(M32R_IRQ_MFT2, &mappi2_irq_type);
  86 + set_irq_chip_and_handler(M32R_IRQ_MFT2, &mappi2_irq_type,
  87 + handle_level_irq);
95 88 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
96 89 disable_mappi2_irq(M32R_IRQ_MFT2);
97 90  
98 91 #ifdef CONFIG_SERIAL_M32R_SIO
99 92 /* SIO0_R : uart receive data */
100   - set_irq_chip(M32R_IRQ_SIO0_R, &mappi2_irq_type);
  93 + set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &mappi2_irq_type,
  94 + handle_level_irq);
101 95 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
102 96 disable_mappi2_irq(M32R_IRQ_SIO0_R);
103 97  
104 98 /* SIO0_S : uart send data */
105   - set_irq_chip(M32R_IRQ_SIO0_S, &mappi2_irq_type);
  99 + set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &mappi2_irq_type,
  100 + handle_level_irq);
106 101 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
107 102 disable_mappi2_irq(M32R_IRQ_SIO0_S);
108 103 /* SIO1_R : uart receive data */
109   - set_irq_chip(M32R_IRQ_SIO1_R, &mappi2_irq_type);
  104 + set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &mappi2_irq_type,
  105 + handle_level_irq);
110 106 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
111 107 disable_mappi2_irq(M32R_IRQ_SIO1_R);
112 108  
113 109 /* SIO1_S : uart send data */
114   - set_irq_chip(M32R_IRQ_SIO1_S, &mappi2_irq_type);
  110 + set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &mappi2_irq_type,
  111 + handle_level_irq);
115 112 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
116 113 disable_mappi2_irq(M32R_IRQ_SIO1_S);
117 114 #endif /* CONFIG_M32R_USE_DBG_CONSOLE */
118 115  
119 116 #if defined(CONFIG_USB)
120 117 /* INT1 : USB Host controller interrupt */
121   - set_irq_chip(M32R_IRQ_INT1, &mappi2_irq_type);
  118 + set_irq_chip_and_handler(M32R_IRQ_INT1, &mappi2_irq_type,
  119 + handle_level_irq);
122 120 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
123 121 disable_mappi2_irq(M32R_IRQ_INT1);
124 122 #endif /* CONFIG_USB */
125 123  
126 124 /* ICUCR40: CFC IREQ */
127   - set_irq_chip(PLD_IRQ_CFIREQ, &mappi2_irq_type);
  125 + set_irq_chip_and_handler(PLD_IRQ_CFIREQ, &mappi2_irq_type,
  126 + handle_level_irq);
128 127 icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
129 128 disable_mappi2_irq(PLD_IRQ_CFIREQ);
130 129  
131 130 #if defined(CONFIG_M32R_CFC)
132 131 /* ICUCR41: CFC Insert */
133   - set_irq_chip(PLD_IRQ_CFC_INSERT, &mappi2_irq_type);
  132 + set_irq_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi2_irq_type,
  133 + handle_level_irq);
134 134 icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
135 135 disable_mappi2_irq(PLD_IRQ_CFC_INSERT);
136 136  
137 137 /* ICUCR42: CFC Eject */
138   - set_irq_chip(PLD_IRQ_CFC_EJECT, &mappi2_irq_type);
  138 + set_irq_chip_and_handler(PLD_IRQ_CFC_EJECT, &mappi2_irq_type,
  139 + handle_level_irq);
139 140 icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
140 141 disable_mappi2_irq(PLD_IRQ_CFC_EJECT);
141 142 #endif /* CONFIG_MAPPI2_CFC */