Eric Lee / smarc-fsl-linux-kernel

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Commit f26a3988917913b3d11b2bd741601a2c64ab9204

Authored by Linus Torvalds
2 parents ac0e9c30b1 faa5b9daa8
Exists in master and in 39 other branches 8mp-imx_5.4.70_2.3.0, 8qm-imx_5.4.70_2.3.0, emb_imx_lf-5.15.y, emb_lf-6.1.y, imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, imx_4.1.15_1.0.0_ga, pitx_8mp_lf-5.10.y, rt-smarc-imx_4.1.15_1.0.0_ga, rt_linux_5.15.71, smarc-8m-android-11.0.0_2.0.0, smarc-imx6_4.14.98_2.0.0_ga, smarc-imx6_4.9.88_2.0.0_ga, smarc-imx7_4.14.98_2.0.0_ga, smarc-imx7_4.9.11_1.0.0_ga, smarc-imx7_4.9.88_2.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-imx_4.1.15_1.0.0_ga, smarc-imx_4.9.11_1.0.0_ga, smarc-imx_4.9.51_imx8m_ga, smarc-imx_4.9.88_2.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_1.2.0_ga, smarc_8m_00d0_imx_4.14.98_2.0.0_ga, smarc_8m_imx_4.14.78_1.0.0_ga, smarc_8m_imx_4.14.98_2.0.0_ga, smarc_8m_imx_4.19.35_1.1.0, smarc_8mm_imx_4.14.78_1.0.0_ga, smarc_8mm_imx_4.14.98_2.0.0_ga, smarc_8mm_imx_4.19.35_1.1.0, smarc_8mm_imx_5.4.24_2.1.0, smarc_8mp_lf-5.10.y, smarc_8mq_imx_5.4.24_2.1.0, smarc_8mq_lf-5.10.y, smarc_imx_lf-5.15.y

Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc 

* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc:
  [POWERPC] macintosh: Replace deprecated __initcall with device_initcall
  [POWERPC] cell: Fix section mismatches in io-workarounds code
  [POWERPC] spufs: Fix compile error
  [POWERPC] Fix uninitialized variable bug in copy_{to|from}_user
  [POWERPC] Add null pointer check to of_find_property
  [POWERPC] vmemmap fixes to use smaller pages
  [POWERPC] spufs: Fix pointer reference in find_victim
  [POWERPC] 85xx: SBC8548 - Add flash support and HW Rev reporting
  [POWERPC] 85xx: Fix some sparse warnings for 85xx MDS
  [POWERPC] 83xx: Enable DMA engine on the MPC8377 MDS board.
  [POWERPC] 86xx: mpc8610_hpcd: fix second serial port
  [POWERPC] 86xx: mpc8610_hpcd: add support for NOR and NAND flashes
  [POWERPC] 85xx: Add 8568 PHY workarounds to board code
  [POWERPC] 86xx: mpc8610_hpcd: use ULI526X driver for on-board ethernet

Showing 20 changed files Side-by-side Diff

arch/powerpc/boot/dts/mpc8377_mds.dts
Diff comments   View file @ f26a398
... ... @@ -268,6 +268,33 @@
268 268 interrupt-parent = <&ipic>;
269 269 };
270 270  
  271 + dma@82a8 {
  272 + #address-cells = <1>;
  273 + #size-cells = <1>;
  274 + compatible = "fsl,mpc8349-dma";
  275 + reg = <0x82a8 4>;
  276 + ranges = <0 0x8100 0x1a8>;
  277 + interrupt-parent = <&ipic>;
  278 + interrupts = <0x47 8>;
  279 + cell-index = <0>;
  280 + dma-channel@0 {
  281 + compatible = "fsl,mpc8349-dma-channel";
  282 + reg = <0 0x80>;
  283 + };
  284 + dma-channel@80 {
  285 + compatible = "fsl,mpc8349-dma-channel";
  286 + reg = <0x80 0x80>;
  287 + };
  288 + dma-channel@100 {
  289 + compatible = "fsl,mpc8349-dma-channel";
  290 + reg = <0x100 0x80>;
  291 + };
  292 + dma-channel@180 {
  293 + compatible = "fsl,mpc8349-dma-channel";
  294 + reg = <0x180 0x28>;
  295 + };
  296 + };
  297 +
271 298 /* IPIC
272 299 * interrupts cell = <intr #, sense>
273 300 * sense values match linux IORESOURCE_IRQ_* defines:
arch/powerpc/boot/dts/mpc8610_hpcd.dts
Diff comments   View file @ f26a398
... ... @@ -46,9 +46,63 @@
46 46 reg = <0x00000000 0x20000000>; // 512M at 0x0
47 47 };
48 48  
49   - board-control@e8000000 {
50   - compatible = "fsl,fpga-pixis";
51   - reg = <0xe8000000 32>; // pixis at 0xe8000000
  49 + localbus@e0005000 {
  50 + #address-cells = <2>;
  51 + #size-cells = <1>;
  52 + compatible = "fsl,mpc8610-elbc", "fsl,elbc", "simple-bus";
  53 + reg = <0xe0005000 0x1000>;
  54 + interrupts = <19 2>;
  55 + interrupt-parent = <&mpic>;
  56 + ranges = <0 0 0xf8000000 0x08000000
  57 + 1 0 0xf0000000 0x08000000
  58 + 2 0 0xe8400000 0x00008000
  59 + 4 0 0xe8440000 0x00008000
  60 + 5 0 0xe8480000 0x00008000
  61 + 6 0 0xe84c0000 0x00008000
  62 + 3 0 0xe8000000 0x00000020>;
  63 +
  64 + flash@0,0 {
  65 + compatible = "cfi-flash";
  66 + reg = <0 0 0x8000000>;
  67 + bank-width = <2>;
  68 + device-width = <1>;
  69 + };
  70 +
  71 + flash@1,0 {
  72 + compatible = "cfi-flash";
  73 + reg = <1 0 0x8000000>;
  74 + bank-width = <2>;
  75 + device-width = <1>;
  76 + };
  77 +
  78 + flash@2,0 {
  79 + compatible = "fsl,mpc8610-fcm-nand",
  80 + "fsl,elbc-fcm-nand";
  81 + reg = <2 0 0x8000>;
  82 + };
  83 +
  84 + flash@4,0 {
  85 + compatible = "fsl,mpc8610-fcm-nand",
  86 + "fsl,elbc-fcm-nand";
  87 + reg = <4 0 0x8000>;
  88 + };
  89 +
  90 + flash@5,0 {
  91 + compatible = "fsl,mpc8610-fcm-nand",
  92 + "fsl,elbc-fcm-nand";
  93 + reg = <5 0 0x8000>;
  94 + };
  95 +
  96 + flash@6,0 {
  97 + compatible = "fsl,mpc8610-fcm-nand",
  98 + "fsl,elbc-fcm-nand";
  99 + reg = <6 0 0x8000>;
  100 + };
  101 +
  102 + board-control@3,0 {
  103 + compatible = "fsl,fpga-pixis";
  104 + reg = <3 0 0x20>;
  105 + };
52 106 };
53 107  
54 108 soc@e0000000 {
arch/powerpc/boot/dts/sbc8548.dts
Diff comments   View file @ f26a398
... ... @@ -52,6 +52,99 @@
52 52 reg = <0x00000000 0x10000000>;
53 53 };
54 54  
  55 + localbus@e0000000 {
  56 + #address-cells = <2>;
  57 + #size-cells = <1>;
  58 + compatible = "simple-bus";
  59 + reg = <0xe0000000 0x5000>;
  60 + interrupt-parent = <&mpic>;
  61 +
  62 + ranges = <0x0 0x0 0xff800000 0x00800000 /*8MB Flash*/
  63 + 0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/
  64 + 0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/
  65 + 0x5 0x0 0xf8000000 0x00b10000 /* EPLD */
  66 + 0x6 0x0 0xfb800000 0x04000000>; /*64MB Flash*/
  67 +
  68 +
  69 + flash@0,0 {
  70 + #address-cells = <1>;
  71 + #size-cells = <1>;
  72 + compatible = "cfi-flash";
  73 + reg = <0x0 0x0 0x800000>;
  74 + bank-width = <1>;
  75 + device-width = <1>;
  76 + partition@0x0 {
  77 + label = "space";
  78 + reg = <0x00000000 0x00100000>;
  79 + };
  80 + partition@0x100000 {
  81 + label = "bootloader";
  82 + reg = <0x00100000 0x00700000>;
  83 + read-only;
  84 + };
  85 + };
  86 +
  87 + epld@5,0 {
  88 + compatible = "wrs,epld-localbus";
  89 + #address-cells = <2>;
  90 + #size-cells = <1>;
  91 + reg = <0x5 0x0 0x00b10000>;
  92 + ranges = <
  93 + 0x0 0x0 0x5 0x000000 0x1fff /* LED */
  94 + 0x1 0x0 0x5 0x100000 0x1fff /* Switches */
  95 + 0x3 0x0 0x5 0x300000 0x1fff /* HW Rev. */
  96 + 0xb 0x0 0x5 0xb00000 0x1fff /* EEPROM */
  97 + >;
  98 +
  99 + led@0,0 {
  100 + compatible = "led";
  101 + reg = <0x0 0x0 0x1fff>;
  102 + };
  103 +
  104 + switches@1,0 {
  105 + compatible = "switches";
  106 + reg = <0x1 0x0 0x1fff>;
  107 + };
  108 +
  109 + hw-rev@3,0 {
  110 + compatible = "hw-rev";
  111 + reg = <0x3 0x0 0x1fff>;
  112 + };
  113 +
  114 + eeprom@b,0 {
  115 + compatible = "eeprom";
  116 + reg = <0xb 0 0x1fff>;
  117 + };
  118 +
  119 + };
  120 +
  121 + alt-flash@6,0 {
  122 + #address-cells = <1>;
  123 + #size-cells = <1>;
  124 + reg = <0x6 0x0 0x04000000>;
  125 + compatible = "cfi-flash";
  126 + bank-width = <4>;
  127 + device-width = <1>;
  128 + partition@0x0 {
  129 + label = "bootloader";
  130 + reg = <0x00000000 0x00100000>;
  131 + read-only;
  132 + };
  133 + partition@0x00100000 {
  134 + label = "file-system";
  135 + reg = <0x00100000 0x01f00000>;
  136 + };
  137 + partition@0x02000000 {
  138 + label = "boot-config";
  139 + reg = <0x02000000 0x00100000>;
  140 + };
  141 + partition@0x02100000 {
  142 + label = "space";
  143 + reg = <0x02100000 0x01f00000>;
  144 + };
  145 + };
  146 + };
  147 +
55 148 soc8548@e0000000 {
56 149 #address-cells = <1>;
57 150 #size-cells = <1>;
... ... @@ -59,6 +152,7 @@
59 152 ranges = <0x00000000 0xe0000000 0x00100000>;
60 153 reg = <0xe0000000 0x00001000>; // CCSRBAR
61 154 bus-frequency = <0>;
  155 + compatible = "simple-bus";
62 156  
63 157 memory-controller@2000 {
64 158 compatible = "fsl,8548-memory-controller";
arch/powerpc/configs/mpc8610_hpcd_defconfig
Diff comments   View file @ f26a398
... ... @@ -358,7 +358,93 @@
358 358 # CONFIG_DEBUG_DEVRES is not set
359 359 # CONFIG_SYS_HYPERVISOR is not set
360 360 # CONFIG_CONNECTOR is not set
361   -# CONFIG_MTD is not set
  361 +CONFIG_MTD=y
  362 +# CONFIG_MTD_DEBUG is not set
  363 +# CONFIG_MTD_CONCAT is not set
  364 +CONFIG_MTD_PARTITIONS=y
  365 +# CONFIG_MTD_REDBOOT_PARTS is not set
  366 +CONFIG_MTD_CMDLINE_PARTS=y
  367 +# CONFIG_MTD_OF_PARTS is not set
  368 +# CONFIG_MTD_AR7_PARTS is not set
  369 +
  370 +#
  371 +# User Modules And Translation Layers
  372 +#
  373 +CONFIG_MTD_CHAR=y
  374 +CONFIG_MTD_BLKDEVS=y
  375 +CONFIG_MTD_BLOCK=y
  376 +# CONFIG_FTL is not set
  377 +# CONFIG_NFTL is not set
  378 +# CONFIG_INFTL is not set
  379 +# CONFIG_RFD_FTL is not set
  380 +# CONFIG_SSFDC is not set
  381 +# CONFIG_MTD_OOPS is not set
  382 +
  383 +#
  384 +# RAM/ROM/Flash chip drivers
  385 +#
  386 +CONFIG_MTD_CFI=y
  387 +# CONFIG_MTD_JEDECPROBE is not set
  388 +CONFIG_MTD_GEN_PROBE=y
  389 +# CONFIG_MTD_CFI_ADV_OPTIONS is not set
  390 +CONFIG_MTD_MAP_BANK_WIDTH_1=y
  391 +CONFIG_MTD_MAP_BANK_WIDTH_2=y
  392 +CONFIG_MTD_MAP_BANK_WIDTH_4=y
  393 +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
  394 +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
  395 +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
  396 +CONFIG_MTD_CFI_I1=y
  397 +CONFIG_MTD_CFI_I2=y
  398 +# CONFIG_MTD_CFI_I4 is not set
  399 +# CONFIG_MTD_CFI_I8 is not set
  400 +# CONFIG_MTD_CFI_INTELEXT is not set
  401 +CONFIG_MTD_CFI_AMDSTD=y
  402 +# CONFIG_MTD_CFI_STAA is not set
  403 +CONFIG_MTD_CFI_UTIL=y
  404 +# CONFIG_MTD_RAM is not set
  405 +# CONFIG_MTD_ROM is not set
  406 +# CONFIG_MTD_ABSENT is not set
  407 +
  408 +#
  409 +# Mapping drivers for chip access
  410 +#
  411 +# CONFIG_MTD_COMPLEX_MAPPINGS is not set
  412 +# CONFIG_MTD_PHYSMAP is not set
  413 +CONFIG_MTD_PHYSMAP_OF=y
  414 +# CONFIG_MTD_INTEL_VR_NOR is not set
  415 +# CONFIG_MTD_PLATRAM is not set
  416 +
  417 +#
  418 +# Self-contained MTD device drivers
  419 +#
  420 +# CONFIG_MTD_PMC551 is not set
  421 +# CONFIG_MTD_SLRAM is not set
  422 +# CONFIG_MTD_PHRAM is not set
  423 +# CONFIG_MTD_MTDRAM is not set
  424 +# CONFIG_MTD_BLOCK2MTD is not set
  425 +
  426 +#
  427 +# Disk-On-Chip Device Drivers
  428 +#
  429 +# CONFIG_MTD_DOC2000 is not set
  430 +# CONFIG_MTD_DOC2001 is not set
  431 +# CONFIG_MTD_DOC2001PLUS is not set
  432 +CONFIG_MTD_NAND=y
  433 +# CONFIG_MTD_NAND_VERIFY_WRITE is not set
  434 +# CONFIG_MTD_NAND_ECC_SMC is not set
  435 +# CONFIG_MTD_NAND_MUSEUM_IDS is not set
  436 +CONFIG_MTD_NAND_IDS=y
  437 +# CONFIG_MTD_NAND_DISKONCHIP is not set
  438 +# CONFIG_MTD_NAND_CAFE is not set
  439 +# CONFIG_MTD_NAND_NANDSIM is not set
  440 +# CONFIG_MTD_NAND_PLATFORM is not set
  441 +CONFIG_MTD_NAND_FSL_ELBC=y
  442 +# CONFIG_MTD_ONENAND is not set
  443 +
  444 +#
  445 +# UBI - Unsorted block images
  446 +#
  447 +# CONFIG_MTD_UBI is not set
362 448 CONFIG_OF_DEVICE=y
363 449 # CONFIG_PARPORT is not set
364 450 CONFIG_BLK_DEV=y
365 451  
... ... @@ -567,14 +653,11 @@
567 653 # CONFIG_NET_VENDOR_3COM is not set
568 654 CONFIG_NET_TULIP=y
569 655 # CONFIG_DE2104X is not set
570   -CONFIG_TULIP=y
571   -# CONFIG_TULIP_MWI is not set
572   -CONFIG_TULIP_MMIO=y
573   -# CONFIG_TULIP_NAPI is not set
  656 +# CONFIG_TULIP is not set
574 657 # CONFIG_DE4X5 is not set
575 658 # CONFIG_WINBOND_840 is not set
576 659 # CONFIG_DM9102 is not set
577   -# CONFIG_ULI526X is not set
  660 +CONFIG_ULI526X=y
578 661 # CONFIG_HP100 is not set
579 662 # CONFIG_IBM_NEW_EMAC_ZMII is not set
580 663 # CONFIG_IBM_NEW_EMAC_RGMII is not set
arch/powerpc/mm/hash_utils_64.c
Diff comments   View file @ f26a398
... ... @@ -94,6 +94,9 @@
94 94 int mmu_linear_psize = MMU_PAGE_4K;
95 95 int mmu_virtual_psize = MMU_PAGE_4K;
96 96 int mmu_vmalloc_psize = MMU_PAGE_4K;
  97 +#ifdef CONFIG_SPARSEMEM_VMEMMAP
  98 +int mmu_vmemmap_psize = MMU_PAGE_4K;
  99 +#endif
97 100 int mmu_io_psize = MMU_PAGE_4K;
98 101 int mmu_kernel_ssize = MMU_SEGSIZE_256M;
99 102 int mmu_highuser_ssize = MMU_SEGSIZE_256M;
100 103  
101 104  
... ... @@ -387,11 +390,32 @@
387 390 }
388 391 #endif /* CONFIG_PPC_64K_PAGES */
389 392  
  393 +#ifdef CONFIG_SPARSEMEM_VMEMMAP
  394 + /* We try to use 16M pages for vmemmap if that is supported
  395 + * and we have at least 1G of RAM at boot
  396 + */
  397 + if (mmu_psize_defs[MMU_PAGE_16M].shift &&
  398 + lmb_phys_mem_size() >= 0x40000000)
  399 + mmu_vmemmap_psize = MMU_PAGE_16M;
  400 + else if (mmu_psize_defs[MMU_PAGE_64K].shift)
  401 + mmu_vmemmap_psize = MMU_PAGE_64K;
  402 + else
  403 + mmu_vmemmap_psize = MMU_PAGE_4K;
  404 +#endif /* CONFIG_SPARSEMEM_VMEMMAP */
  405 +
390 406 printk(KERN_DEBUG "Page orders: linear mapping = %d, "
391   - "virtual = %d, io = %d\n",
  407 + "virtual = %d, io = %d"
  408 +#ifdef CONFIG_SPARSEMEM_VMEMMAP
  409 + ", vmemmap = %d"
  410 +#endif
  411 + "\n",
392 412 mmu_psize_defs[mmu_linear_psize].shift,
393 413 mmu_psize_defs[mmu_virtual_psize].shift,
394   - mmu_psize_defs[mmu_io_psize].shift);
  414 + mmu_psize_defs[mmu_io_psize].shift
  415 +#ifdef CONFIG_SPARSEMEM_VMEMMAP
  416 + ,mmu_psize_defs[mmu_vmemmap_psize].shift
  417 +#endif
  418 + );
395 419  
396 420 #ifdef CONFIG_HUGETLB_PAGE
397 421 /* Init large page size. Currently, we pick 16M or 1M depending
arch/powerpc/mm/init_64.c
Diff comments   View file @ f26a398
... ... @@ -19,6 +19,8 @@
19 19 *
20 20 */
21 21  
  22 +#undef DEBUG
  23 +
22 24 #include <linux/signal.h>
23 25 #include <linux/sched.h>
24 26 #include <linux/kernel.h>
25 27  
... ... @@ -208,12 +210,12 @@
208 210 }
209 211  
210 212 int __meminit vmemmap_populate(struct page *start_page,
211   - unsigned long nr_pages, int node)
  213 + unsigned long nr_pages, int node)
212 214 {
213 215 unsigned long mode_rw;
214 216 unsigned long start = (unsigned long)start_page;
215 217 unsigned long end = (unsigned long)(start_page + nr_pages);
216   - unsigned long page_size = 1 << mmu_psize_defs[mmu_linear_psize].shift;
  218 + unsigned long page_size = 1 << mmu_psize_defs[mmu_vmemmap_psize].shift;
217 219  
218 220 mode_rw = _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_COHERENT | PP_RWXX;
219 221  
220 222  
... ... @@ -235,12 +237,12 @@
235 237 start, p, __pa(p));
236 238  
237 239 mapped = htab_bolt_mapping(start, start + page_size,
238   - __pa(p), mode_rw, mmu_linear_psize,
  240 + __pa(p), mode_rw, mmu_vmemmap_psize,
239 241 mmu_kernel_ssize);
240 242 BUG_ON(mapped < 0);
241 243 }
242 244  
243 245 return 0;
244 246 }
245   -#endif
  247 +#endif /* CONFIG_SPARSEMEM_VMEMMAP */
arch/powerpc/mm/slb.c
Diff comments   View file @ f26a398
... ... @@ -28,7 +28,7 @@
28 28 #include <asm/udbg.h>
29 29  
30 30 #ifdef DEBUG
31   -#define DBG(fmt...) udbg_printf(fmt)
  31 +#define DBG(fmt...) printk(fmt)
32 32 #else
33 33 #define DBG pr_debug
34 34 #endif
35 35  
... ... @@ -263,13 +263,19 @@
263 263 extern unsigned int *slb_miss_kernel_load_linear;
264 264 extern unsigned int *slb_miss_kernel_load_io;
265 265 extern unsigned int *slb_compare_rr_to_size;
  266 +#ifdef CONFIG_SPARSEMEM_VMEMMAP
  267 + extern unsigned int *slb_miss_kernel_load_vmemmap;
  268 + unsigned long vmemmap_llp;
  269 +#endif
266 270  
267 271 /* Prepare our SLB miss handler based on our page size */
268 272 linear_llp = mmu_psize_defs[mmu_linear_psize].sllp;
269 273 io_llp = mmu_psize_defs[mmu_io_psize].sllp;
270 274 vmalloc_llp = mmu_psize_defs[mmu_vmalloc_psize].sllp;
271 275 get_paca()->vmalloc_sllp = SLB_VSID_KERNEL | vmalloc_llp;
272   -
  276 +#ifdef CONFIG_SPARSEMEM_VMEMMAP
  277 + vmemmap_llp = mmu_psize_defs[mmu_vmemmap_psize].sllp;
  278 +#endif
273 279 if (!slb_encoding_inited) {
274 280 slb_encoding_inited = 1;
275 281 patch_slb_encoding(slb_miss_kernel_load_linear,
... ... @@ -281,6 +287,12 @@
281 287  
282 288 DBG("SLB: linear LLP = %04lx\n", linear_llp);
283 289 DBG("SLB: io LLP = %04lx\n", io_llp);
  290 +
  291 +#ifdef CONFIG_SPARSEMEM_VMEMMAP
  292 + patch_slb_encoding(slb_miss_kernel_load_vmemmap,
  293 + SLB_VSID_KERNEL | vmemmap_llp);
  294 + DBG("SLB: vmemmap LLP = %04lx\n", vmemmap_llp);
  295 +#endif
284 296 }
285 297  
286 298 get_paca()->stab_rr = SLB_NUM_BOLTED;
arch/powerpc/mm/slb_low.S
Diff comments   View file @ f26a398
... ... @@ -47,8 +47,7 @@
47 47 * it to VSID 0, which is reserved as a bad VSID - one which
48 48 * will never have any pages in it. */
49 49  
50   - /* Check if hitting the linear mapping of the vmalloc/ioremap
51   - * kernel space
  50 + /* Check if hitting the linear mapping or some other kernel space
52 51 */
53 52 bne cr7,1f
54 53  
... ... @@ -62,7 +61,18 @@
62 61 END_FTR_SECTION_IFCLR(CPU_FTR_1T_SEGMENT)
63 62 b slb_finish_load_1T
64 63  
65   -1: /* vmalloc/ioremap mapping encoding bits, the "li" instructions below
  64 +1:
  65 +#ifdef CONFIG_SPARSEMEM_VMEMMAP
  66 + /* Check virtual memmap region. To be patches at kernel boot */
  67 + cmpldi cr0,r9,0xf
  68 + bne 1f
  69 +_GLOBAL(slb_miss_kernel_load_vmemmap)
  70 + li r11,0
  71 + b 6f
  72 +1:
  73 +#endif /* CONFIG_SPARSEMEM_VMEMMAP */
  74 +
  75 + /* vmalloc/ioremap mapping encoding bits, the "li" instructions below
66 76 * will be patched by the kernel at boot
67 77 */
68 78 BEGIN_FTR_SECTION
arch/powerpc/platforms/85xx/mpc85xx_mds.c
Diff comments   View file @ f26a398
... ... @@ -32,6 +32,7 @@
32 32 #include <linux/fsl_devices.h>
33 33 #include <linux/of_platform.h>
34 34 #include <linux/of_device.h>
  35 +#include <linux/phy.h>
35 36  
36 37 #include <asm/system.h>
37 38 #include <asm/atomic.h>
... ... @@ -56,6 +57,95 @@
56 57 #define DBG(fmt...)
57 58 #endif
58 59  
  60 +#define MV88E1111_SCR 0x10
  61 +#define MV88E1111_SCR_125CLK 0x0010
  62 +static int mpc8568_fixup_125_clock(struct phy_device *phydev)
  63 +{
  64 + int scr;
  65 + int err;
  66 +
  67 + /* Workaround for the 125 CLK Toggle */
  68 + scr = phy_read(phydev, MV88E1111_SCR);
  69 +
  70 + if (scr < 0)
  71 + return scr;
  72 +
  73 + err = phy_write(phydev, MV88E1111_SCR, scr & ~(MV88E1111_SCR_125CLK));
  74 +
  75 + if (err)
  76 + return err;
  77 +
  78 + err = phy_write(phydev, MII_BMCR, BMCR_RESET);
  79 +
  80 + if (err)
  81 + return err;
  82 +
  83 + scr = phy_read(phydev, MV88E1111_SCR);
  84 +
  85 + if (scr < 0)
  86 + return err;
  87 +
  88 + err = phy_write(phydev, MV88E1111_SCR, scr | 0x0008);
  89 +
  90 + return err;
  91 +}
  92 +
  93 +static int mpc8568_mds_phy_fixups(struct phy_device *phydev)
  94 +{
  95 + int temp;
  96 + int err;
  97 +
  98 + /* Errata */
  99 + err = phy_write(phydev,29, 0x0006);
  100 +
  101 + if (err)
  102 + return err;
  103 +
  104 + temp = phy_read(phydev, 30);
  105 +
  106 + if (temp < 0)
  107 + return temp;
  108 +
  109 + temp = (temp & (~0x8000)) | 0x4000;
  110 + err = phy_write(phydev,30, temp);
  111 +
  112 + if (err)
  113 + return err;
  114 +
  115 + err = phy_write(phydev,29, 0x000a);
  116 +
  117 + if (err)
  118 + return err;
  119 +
  120 + temp = phy_read(phydev, 30);
  121 +
  122 + if (temp < 0)
  123 + return temp;
  124 +
  125 + temp = phy_read(phydev, 30);
  126 +
  127 + if (temp < 0)
  128 + return temp;
  129 +
  130 + temp &= ~0x0020;
  131 +
  132 + err = phy_write(phydev,30,temp);
  133 +
  134 + if (err)
  135 + return err;
  136 +
  137 + /* Disable automatic MDI/MDIX selection */
  138 + temp = phy_read(phydev, 16);
  139 +
  140 + if (temp < 0)
  141 + return temp;
  142 +
  143 + temp &= ~0x0060;
  144 + err = phy_write(phydev,16,temp);
  145 +
  146 + return err;
  147 +}
  148 +
59 149 /* ************************************************************************
60 150 *
61 151 * Setup the architecture
... ... @@ -64,7 +154,7 @@
64 154 static void __init mpc85xx_mds_setup_arch(void)
65 155 {
66 156 struct device_node *np;
67   - static u8 *bcsr_regs = NULL;
  157 + static u8 __iomem *bcsr_regs = NULL;
68 158  
69 159 if (ppc_md.progress)
70 160 ppc_md.progress("mpc85xx_mds_setup_arch()", 0);
... ... @@ -137,6 +227,35 @@
137 227 }
138 228 #endif /* CONFIG_QUICC_ENGINE */
139 229 }
  230 +
  231 +
  232 +static int __init board_fixups(void)
  233 +{
  234 + char phy_id[BUS_ID_SIZE];
  235 + char *compstrs[2] = {"fsl,gianfar-mdio", "fsl,ucc-mdio"};
  236 + struct device_node *mdio;
  237 + struct resource res;
  238 + int i;
  239 +
  240 + for (i = 0; i < ARRAY_SIZE(compstrs); i++) {
  241 + mdio = of_find_compatible_node(NULL, NULL, compstrs[i]);
  242 +
  243 + of_address_to_resource(mdio, 0, &res);
  244 + snprintf(phy_id, BUS_ID_SIZE, "%x:%02x", res.start, 1);
  245 +
  246 + phy_register_fixup_for_id(phy_id, mpc8568_fixup_125_clock);
  247 + phy_register_fixup_for_id(phy_id, mpc8568_mds_phy_fixups);
  248 +
  249 + /* Register a workaround for errata */
  250 + snprintf(phy_id, BUS_ID_SIZE, "%x:%02x", res.start, 7);
  251 + phy_register_fixup_for_id(phy_id, mpc8568_mds_phy_fixups);
  252 +
  253 + of_node_put(mdio);
  254 + }
  255 +
  256 + return 0;
  257 +}
  258 +machine_arch_initcall(mpc85xx_mds, board_fixups);
140 259  
141 260 static struct of_device_id mpc85xx_ids[] = {
142 261 { .type = "soc", },
arch/powerpc/platforms/85xx/sbc8548.c
Diff comments   View file @ f26a398
... ... @@ -49,6 +49,8 @@
49 49 #include <sysdev/fsl_soc.h>
50 50 #include <sysdev/fsl_pci.h>
51 51  
  52 +static int sbc_rev;
  53 +
52 54 static void __init sbc8548_pic_init(void)
53 55 {
54 56 struct mpic *mpic;
... ... @@ -79,6 +81,30 @@
79 81 mpic_init(mpic);
80 82 }
81 83  
  84 +/* Extract the HW Rev from the EPLD on the board */
  85 +static int __init sbc8548_hw_rev(void)
  86 +{
  87 + struct device_node *np;
  88 + struct resource res;
  89 + unsigned int *rev;
  90 + int board_rev = 0;
  91 +
  92 + np = of_find_compatible_node(NULL, NULL, "hw-rev");
  93 + if (np == NULL) {
  94 + printk("No HW-REV found in DTB.\n");
  95 + return -ENODEV;
  96 + }
  97 +
  98 + of_address_to_resource(np, 0, &res);
  99 + of_node_put(np);
  100 +
  101 + rev = ioremap(res.start,sizeof(unsigned int));
  102 + board_rev = (*rev) >> 28;
  103 + iounmap(rev);
  104 +
  105 + return board_rev;
  106 +}
  107 +
82 108 /*
83 109 * Setup the architecture
84 110 */
... ... @@ -104,6 +130,7 @@
104 130 }
105 131 }
106 132 #endif
  133 + sbc_rev = sbc8548_hw_rev();
107 134 }
108 135  
109 136 static void sbc8548_show_cpuinfo(struct seq_file *m)
... ... @@ -115,7 +142,7 @@
115 142 svid = mfspr(SPRN_SVR);
116 143  
117 144 seq_printf(m, "Vendor\t\t: Wind River\n");
118   - seq_printf(m, "Machine\t\t: SBC8548\n");
  145 + seq_printf(m, "Machine\t\t: SBC8548 v%d\n", sbc_rev);
119 146 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
120 147 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
121 148  
... ... @@ -130,6 +157,7 @@
130 157 static struct of_device_id __initdata of_bus_ids[] = {
131 158 { .name = "soc", },
132 159 { .type = "soc", },
  160 + { .compatible = "simple-bus", },
133 161 {},
134 162 };
135 163  
arch/powerpc/platforms/86xx/mpc8610_hpcd.c
Diff comments   View file @ f26a398
... ... @@ -43,6 +43,7 @@
43 43  
44 44 static struct of_device_id __initdata mpc8610_ids[] = {
45 45 { .compatible = "fsl,mpc8610-immr", },
  46 + { .compatible = "simple-bus", },
46 47 {}
47 48 };
48 49  
49 50  
50 51  
... ... @@ -216,11 +217,21 @@
216 217 }
217 218 }
218 219  
  220 +#define PX_BRDCFG0_DVISEL (1 << 3)
  221 +#define PX_BRDCFG0_DLINK (1 << 4)
  222 +#define PX_BRDCFG0_DIU_MASK (PX_BRDCFG0_DVISEL | PX_BRDCFG0_DLINK)
  223 +
219 224 void mpc8610hpcd_set_monitor_port(int monitor_port)
220 225 {
221   - static const u8 bdcfg[] = {0xBD, 0xB5, 0xA5};
  226 + static const u8 bdcfg[] = {
  227 + PX_BRDCFG0_DVISEL | PX_BRDCFG0_DLINK,
  228 + PX_BRDCFG0_DLINK,
  229 + 0,
  230 + };
  231 +
222 232 if (monitor_port < 3)
223   - *pixis_bdcfg0 = bdcfg[monitor_port];
  233 + clrsetbits_8(pixis_bdcfg0, PX_BRDCFG0_DIU_MASK,
  234 + bdcfg[monitor_port]);
224 235 }
225 236  
226 237 void mpc8610hpcd_set_pixel_clock(unsigned int pixclock)
arch/powerpc/platforms/cell/io-workarounds.c
Diff comments   View file @ f26a398
... ... @@ -118,7 +118,7 @@
118 118 #undef DEF_PCI_AC_RET
119 119 #undef DEF_PCI_AC_NORET
120 120  
121   -static struct ppc_pci_io __initdata iowa_pci_io = {
  121 +static const struct ppc_pci_io __devinitconst iowa_pci_io = {
122 122  
123 123 #define DEF_PCI_AC_RET(name, ret, at, al, space, aa) .name = iowa_##name,
124 124 #define DEF_PCI_AC_NORET(name, at, al, space, aa) .name = iowa_##name,
... ... @@ -146,7 +146,7 @@
146 146 }
147 147  
148 148 /* Regist new bus to support workaround */
149   -void __init iowa_register_bus(struct pci_controller *phb,
  149 +void __devinit iowa_register_bus(struct pci_controller *phb,
150 150 struct ppc_pci_io *ops,
151 151 int (*initfunc)(struct iowa_bus *, void *), void *data)
152 152 {
... ... @@ -173,7 +173,7 @@
173 173 }
174 174  
175 175 /* enable IO workaround */
176   -void __init io_workaround_init(void)
  176 +void __devinit io_workaround_init(void)
177 177 {
178 178 static int io_workaround_inited;
179 179  
arch/powerpc/platforms/cell/io-workarounds.h
Diff comments   View file @ f26a398
... ... @@ -31,9 +31,9 @@
31 31 void *private;
32 32 };
33 33  
34   -void __init io_workaround_init(void);
35   -void __init iowa_register_bus(struct pci_controller *, struct ppc_pci_io *,
36   - int (*)(struct iowa_bus *, void *), void *);
  34 +void __devinit io_workaround_init(void);
  35 +void __devinit iowa_register_bus(struct pci_controller *, struct ppc_pci_io *,
  36 + int (*)(struct iowa_bus *, void *), void *);
37 37 struct iowa_bus *iowa_mem_find_bus(const PCI_IO_ADDR);
38 38 struct iowa_bus *iowa_pio_find_bus(unsigned long);
39 39  
arch/powerpc/platforms/cell/spufs/file.c
Diff comments   View file @ f26a398
... ... @@ -32,6 +32,7 @@
32 32 #include <linux/marker.h>
33 33  
34 34 #include <asm/io.h>
  35 +#include <asm/time.h>
35 36 #include <asm/spu.h>
36 37 #include <asm/spu_info.h>
37 38 #include <asm/uaccess.h>
arch/powerpc/platforms/cell/spufs/sched.c
Diff comments   View file @ f26a398
... ... @@ -659,7 +659,7 @@
659 659  
660 660 victim->stats.invol_ctx_switch++;
661 661 spu->stats.invol_ctx_switch++;
662   - if (test_bit(SPU_SCHED_SPU_RUN, &ctx->sched_flags))
  662 + if (test_bit(SPU_SCHED_SPU_RUN, &victim->sched_flags))
663 663 spu_add_to_rq(victim);
664 664  
665 665 mutex_unlock(&victim->state_mutex);
drivers/macintosh/adb.c
Diff comments   View file @ f26a398
... ... @@ -334,7 +334,7 @@
334 334 return 0;
335 335 }
336 336  
337   -__initcall(adb_init);
  337 +device_initcall(adb_init);
338 338  
339 339 static int
340 340 do_adb_reset_bus(void)
... ... @@ -65,6 +65,9 @@
65 65 {
66 66 struct property *pp;
67 67  
  68 + if (!np)
  69 + return NULL;
  70 +
68 71 read_lock(&devtree_lock);
69 72 for (pp = np->properties; pp != 0; pp = pp->next) {
70 73 if (of_prop_cmp(pp->name, name) == 0) {
include/asm-powerpc/mmu-hash64.h
Diff comments   View file @ f26a398
... ... @@ -177,6 +177,7 @@
177 177 extern int mmu_linear_psize;
178 178 extern int mmu_virtual_psize;
179 179 extern int mmu_vmalloc_psize;
  180 +extern int mmu_vmemmap_psize;
180 181 extern int mmu_io_psize;
181 182 extern int mmu_kernel_ssize;
182 183 extern int mmu_highuser_ssize;
include/asm-powerpc/pgtable-ppc64.h
Diff comments   View file @ f26a398
... ... @@ -65,15 +65,15 @@
65 65  
66 66 #define VMALLOC_REGION_ID (REGION_ID(VMALLOC_START))
67 67 #define KERNEL_REGION_ID (REGION_ID(PAGE_OFFSET))
  68 +#define VMEMMAP_REGION_ID (0xfUL)
68 69 #define USER_REGION_ID (0UL)
69 70  
70 71 /*
71   - * Defines the address of the vmemap area, in the top 16th of the
72   - * kernel region.
  72 + * Defines the address of the vmemap area, in its own region
73 73 */
74   -#define VMEMMAP_BASE (ASM_CONST(CONFIG_KERNEL_START) + \
75   - (0xfUL << (REGION_SHIFT - 4)))
76   -#define vmemmap ((struct page *)VMEMMAP_BASE)
  74 +#define VMEMMAP_BASE (VMEMMAP_REGION_ID << REGION_SHIFT)
  75 +#define vmemmap ((struct page *)VMEMMAP_BASE)
  76 +
77 77  
78 78 /*
79 79 * Common bits in a linux-style PTE. These match the bits in the
include/asm-powerpc/uaccess.h
Diff comments   View file @ f26a398
... ... @@ -380,7 +380,7 @@
380 380 const void __user *from, unsigned long n)
381 381 {
382 382 if (__builtin_constant_p(n) && (n <= 8)) {
383   - unsigned long ret;
  383 + unsigned long ret = 1;
384 384  
385 385 switch (n) {
386 386 case 1:
... ... @@ -406,7 +406,7 @@
406 406 const void *from, unsigned long n)
407 407 {
408 408 if (__builtin_constant_p(n) && (n <= 8)) {
409   - unsigned long ret;
  409 + unsigned long ret = 1;
410 410  
411 411 switch (n) {
412 412 case 1: