Commit f40a6818857e00c1d0ecec9af832f46a83f12f53

Authored by Roland Stigge
Committed by Olof Johansson
1 parent 8998316c42

ARM: LPC32xx: clock.c: jiffies wrapping

This patch fixes the jiffies wrapping bug in clock.c.

It corrects the timeout computation based on jiffies, uses time_before() for
correct wrapping handling and replaces a binary "&" which should really be a
logical "&&" in a truth expression.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Tested-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Kevin Wells <kevin.wells@nxp.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

Showing 1 changed file with 6 additions and 6 deletions Side-by-side Diff

arch/arm/mach-lpc32xx/clock.c
... ... @@ -129,7 +129,7 @@
129 129 static int local_pll397_enable(struct clk *clk, int enable)
130 130 {
131 131 u32 reg;
132   - unsigned long timeout = 1 + msecs_to_jiffies(10);
  132 + unsigned long timeout = jiffies + msecs_to_jiffies(10);
133 133  
134 134 reg = __raw_readl(LPC32XX_CLKPWR_PLL397_CTRL);
135 135  
... ... @@ -144,7 +144,7 @@
144 144 /* Wait for PLL397 lock */
145 145 while (((__raw_readl(LPC32XX_CLKPWR_PLL397_CTRL) &
146 146 LPC32XX_CLKPWR_SYSCTRL_PLL397_STS) == 0) &&
147   - (timeout > jiffies))
  147 + time_before(jiffies, timeout))
148 148 cpu_relax();
149 149  
150 150 if ((__raw_readl(LPC32XX_CLKPWR_PLL397_CTRL) &
... ... @@ -158,7 +158,7 @@
158 158 static int local_oscmain_enable(struct clk *clk, int enable)
159 159 {
160 160 u32 reg;
161   - unsigned long timeout = 1 + msecs_to_jiffies(10);
  161 + unsigned long timeout = jiffies + msecs_to_jiffies(10);
162 162  
163 163 reg = __raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL);
164 164  
... ... @@ -173,7 +173,7 @@
173 173 /* Wait for main oscillator to start */
174 174 while (((__raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL) &
175 175 LPC32XX_CLKPWR_MOSC_DISABLE) != 0) &&
176   - (timeout > jiffies))
  176 + time_before(jiffies, timeout))
177 177 cpu_relax();
178 178  
179 179 if ((__raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL) &
... ... @@ -385,7 +385,7 @@
385 385 {
386 386 u32 reg;
387 387 int ret = -ENODEV;
388   - unsigned long timeout = 1 + msecs_to_jiffies(10);
  388 + unsigned long timeout = jiffies + msecs_to_jiffies(10);
389 389  
390 390 reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
391 391  
... ... @@ -398,7 +398,7 @@
398 398 __raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
399 399  
400 400 /* Wait for PLL lock */
401   - while ((timeout > jiffies) & (ret == -ENODEV)) {
  401 + while (time_before(jiffies, timeout) && (ret == -ENODEV)) {
402 402 reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
403 403 if (reg & LPC32XX_CLKPWR_USBCTRL_PLL_STS)
404 404 ret = 0;