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Commit f4a5437333e405e967be660430e58fc2355c62c8

Authored by Greg Ungerer
1 parent 171d809df1
Exists in master and in 38 other branches 8mp-imx_5.4.70_2.3.0, 8qm-imx_5.4.70_2.3.0, emb_imx_lf-5.15.y, emb_lf-6.1.y, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, imx_4.1.15_1.0.0_ga, pitx_8mp_lf-5.10.y, rt-smarc-imx_4.1.15_1.0.0_ga, rt_linux_5.15.71, smarc-8m-android-11.0.0_2.0.0, smarc-imx6_4.14.98_2.0.0_ga, smarc-imx6_4.9.88_2.0.0_ga, smarc-imx7_4.14.98_2.0.0_ga, smarc-imx7_4.9.11_1.0.0_ga, smarc-imx7_4.9.88_2.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-imx_4.1.15_1.0.0_ga, smarc-imx_4.9.11_1.0.0_ga, smarc-imx_4.9.51_imx8m_ga, smarc-imx_4.9.88_2.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_1.2.0_ga, smarc_8m_00d0_imx_4.14.98_2.0.0_ga, smarc_8m_imx_4.14.78_1.0.0_ga, smarc_8m_imx_4.14.98_2.0.0_ga, smarc_8m_imx_4.19.35_1.1.0, smarc_8mm_imx_4.14.78_1.0.0_ga, smarc_8mm_imx_4.14.98_2.0.0_ga, smarc_8mm_imx_4.19.35_1.1.0, smarc_8mm_imx_5.4.24_2.1.0, smarc_8mp_lf-5.10.y, smarc_8mq_imx_5.4.24_2.1.0, smarc_8mq_lf-5.10.y, smarc_imx_lf-5.15.y

m68knommu: merge ColdFire 5206 and 5206e platform code 

The ColdFire 5206 and 5206e CPU families are almost identical, we can
easily merge the platform support code for them. All the differences
are dealt with in the current include/asm/5206sim.h.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>

Showing 5 changed files with 7 additions and 195 deletions Side-by-side Diff

arch/m68k/Makefile_no
Diff comments   View file @ f4a5437
... ... @@ -13,7 +13,7 @@
13 13 platform-$(CONFIG_M68VZ328) := 68VZ328
14 14 platform-$(CONFIG_M68360) := 68360
15 15 platform-$(CONFIG_M5206) := 5206
16   -platform-$(CONFIG_M5206e) := 5206e
  16 +platform-$(CONFIG_M5206e) := 5206
17 17 platform-$(CONFIG_M520x) := 520x
18 18 platform-$(CONFIG_M523x) := 523x
19 19 platform-$(CONFIG_M5249) := 5249
arch/m68k/platform/5206/config.c
Diff comments   View file @ f4a5437
... ... @@ -98,6 +98,12 @@
98 98  
99 99 void __init config_BSP(char *commandp, int size)
100 100 {
  101 +#if defined(CONFIG_NETtel)
  102 + /* Copy command line from FLASH to local buffer... */
  103 + memcpy(commandp, (char *) 0xf0004000, size);
  104 + commandp[size-1] = 0;
  105 +#endif /* CONFIG_NETtel */
  106 +
101 107 mach_reset = m5206_cpu_reset;
102 108 m5206_timers_init();
103 109 m5206_uarts_init();
arch/m68k/platform/5206e/Makefile
View file @ f4a5437
1   -#
2   -# Makefile for the m68knommu linux kernel.
3   -#
4   -
5   -#
6   -# If you want to play with the HW breakpoints then you will
7   -# need to add define this, which will give you a stack backtrace
8   -# on the console port whenever a DBG interrupt occurs. You have to
9   -# set up you HW breakpoints to trigger a DBG interrupt:
10   -#
11   -# ccflags-y := -DTRAP_DBG_INTERRUPT
12   -# asflags-y := -DTRAP_DBG_INTERRUPT
13   -#
14   -
15   -asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16   -
17   -obj-y := config.o gpio.o
arch/m68k/platform/5206e/config.c
View file @ f4a5437
1   -/***************************************************************************/
2   -
3   -/*
4   - * linux/arch/m68knommu/platform/5206e/config.c
5   - *
6   - * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
7   - */
8   -
9   -/***************************************************************************/
10   -
11   -#include <linux/kernel.h>
12   -#include <linux/param.h>
13   -#include <linux/init.h>
14   -#include <linux/io.h>
15   -#include <asm/machdep.h>
16   -#include <asm/coldfire.h>
17   -#include <asm/mcfsim.h>
18   -#include <asm/mcfuart.h>
19   -#include <asm/mcfdma.h>
20   -
21   -/***************************************************************************/
22   -
23   -static struct mcf_platform_uart m5206e_uart_platform[] = {
24   - {
25   - .mapbase = MCF_MBAR + MCFUART_BASE1,
26   - .irq = 73,
27   - },
28   - {
29   - .mapbase = MCF_MBAR + MCFUART_BASE2,
30   - .irq = 74,
31   - },
32   - { },
33   -};
34   -
35   -static struct platform_device m5206e_uart = {
36   - .name = "mcfuart",
37   - .id = 0,
38   - .dev.platform_data = m5206e_uart_platform,
39   -};
40   -
41   -static struct platform_device *m5206e_devices[] __initdata = {
42   - &m5206e_uart,
43   -};
44   -
45   -/***************************************************************************/
46   -
47   -static void __init m5206e_uart_init_line(int line, int irq)
48   -{
49   - if (line == 0) {
50   - writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
51   - writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
52   - mcf_mapirq2imr(irq, MCFINTC_UART0);
53   - } else if (line == 1) {
54   - writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
55   - writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
56   - mcf_mapirq2imr(irq, MCFINTC_UART1);
57   - }
58   -}
59   -
60   -static void __init m5206e_uarts_init(void)
61   -{
62   - const int nrlines = ARRAY_SIZE(m5206e_uart_platform);
63   - int line;
64   -
65   - for (line = 0; (line < nrlines); line++)
66   - m5206e_uart_init_line(line, m5206e_uart_platform[line].irq);
67   -}
68   -
69   -/***************************************************************************/
70   -
71   -static void __init m5206e_timers_init(void)
72   -{
73   - /* Timer1 is always used as system timer */
74   - writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
75   - MCF_MBAR + MCFSIM_TIMER1ICR);
76   - mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
77   -
78   -#ifdef CONFIG_HIGHPROFILE
79   - /* Timer2 is to be used as a high speed profile timer */
80   - writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
81   - MCF_MBAR + MCFSIM_TIMER2ICR);
82   - mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
83   -#endif
84   -}
85   -
86   -/***************************************************************************/
87   -
88   -void m5206e_cpu_reset(void)
89   -{
90   - local_irq_disable();
91   - /* Set watchdog to soft reset, and enabled */
92   - __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
93   - for (;;)
94   - /* wait for watchdog to timeout */;
95   -}
96   -
97   -/***************************************************************************/
98   -
99   -void __init config_BSP(char *commandp, int size)
100   -{
101   -#if defined(CONFIG_NETtel)
102   - /* Copy command line from FLASH to local buffer... */
103   - memcpy(commandp, (char *) 0xf0004000, size);
104   - commandp[size-1] = 0;
105   -#endif /* CONFIG_NETtel */
106   -
107   - mach_reset = m5206e_cpu_reset;
108   - m5206e_timers_init();
109   - m5206e_uarts_init();
110   -
111   - /* Only support the external interrupts on their primary level */
112   - mcf_mapirq2imr(25, MCFINTC_EINT1);
113   - mcf_mapirq2imr(28, MCFINTC_EINT4);
114   - mcf_mapirq2imr(31, MCFINTC_EINT7);
115   -}
116   -
117   -/***************************************************************************/
118   -
119   -static int __init init_BSP(void)
120   -{
121   - platform_add_devices(m5206e_devices, ARRAY_SIZE(m5206e_devices));
122   - return 0;
123   -}
124   -
125   -arch_initcall(init_BSP);
126   -
127   -/***************************************************************************/
arch/m68k/platform/5206e/gpio.c
View file @ f4a5437
1   -/*
2   - * Coldfire generic GPIO support
3   - *
4   - * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5   - *
6   - * This program is free software; you can redistribute it and/or modify
7   - * it under the terms of the GNU General Public License as published by
8   - * the Free Software Foundation; version 2 of the License.
9   - *
10   - * This program is distributed in the hope that it will be useful,
11   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
12   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13   - * GNU General Public License for more details.
14   -*/
15   -
16   -#include <linux/kernel.h>
17   -#include <linux/init.h>
18   -
19   -#include <asm/coldfire.h>
20   -#include <asm/mcfsim.h>
21   -#include <asm/mcfgpio.h>
22   -
23   -static struct mcf_gpio_chip mcf_gpio_chips[] = {
24   - {
25   - .gpio_chip = {
26   - .label = "PP",
27   - .request = mcf_gpio_request,
28   - .free = mcf_gpio_free,
29   - .direction_input = mcf_gpio_direction_input,
30   - .direction_output = mcf_gpio_direction_output,
31   - .get = mcf_gpio_get_value,
32   - .set = mcf_gpio_set_value,
33   - .ngpio = 8,
34   - },
35   - .pddr = (void __iomem *) MCFSIM_PADDR,
36   - .podr = (void __iomem *) MCFSIM_PADAT,
37   - .ppdr = (void __iomem *) MCFSIM_PADAT,
38   - },
39   -};
40   -
41   -static int __init mcf_gpio_init(void)
42   -{
43   - unsigned i = 0;
44   - while (i < ARRAY_SIZE(mcf_gpio_chips))
45   - (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
46   - return 0;
47   -}
48   -
49   -core_initcall(mcf_gpio_init);