Commit f67637ee4b5d90d41160d755b9a8cca18c394586

Authored by Ralf Baechle
Committed by Linus Torvalds
1 parent 83b7b44e1c

[PATCH] Add struct dev pointer to dma_is_consistent()

dma_is_consistent() is ill-designed in that it does not have a struct
device pointer argument which makes proper support for systems that consist
of a mix of coherent and non-coherent DMA devices hard.  Change
dma_is_consistent to take a struct device pointer as first argument and fix
the sole caller to pass it.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: James Bottomley <James.Bottomley@steeleye.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Greg KH <greg@kroah.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

Showing 22 changed files with 25 additions and 25 deletions Side-by-side Diff

Documentation/DMA-API.txt
... ... @@ -431,10 +431,10 @@
431 431 dma_alloc_noncoherent()).
432 432  
433 433 int
434   -dma_is_consistent(dma_addr_t dma_handle)
  434 +dma_is_consistent(struct device *dev, dma_addr_t dma_handle)
435 435  
436   -returns true if the memory pointed to by the dma_handle is actually
437   -consistent.
  436 +returns true if the device dev is performing consistent DMA on the memory
  437 +area pointed to by the dma_handle.
438 438  
439 439 int
440 440 dma_get_cache_alignment(void)
arch/mips/mm/dma-coherent.c
... ... @@ -190,7 +190,7 @@
190 190  
191 191 EXPORT_SYMBOL(dma_supported);
192 192  
193   -int dma_is_consistent(dma_addr_t dma_addr)
  193 +int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
194 194 {
195 195 return 1;
196 196 }
arch/mips/mm/dma-ip27.c
... ... @@ -197,7 +197,7 @@
197 197  
198 198 EXPORT_SYMBOL(dma_supported);
199 199  
200   -int dma_is_consistent(dma_addr_t dma_addr)
  200 +int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
201 201 {
202 202 return 1;
203 203 }
arch/mips/mm/dma-ip32.c
... ... @@ -363,7 +363,7 @@
363 363  
364 364 EXPORT_SYMBOL(dma_supported);
365 365  
366   -int dma_is_consistent(dma_addr_t dma_addr)
  366 +int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
367 367 {
368 368 return 1;
369 369 }
arch/mips/mm/dma-noncoherent.c
... ... @@ -299,7 +299,7 @@
299 299  
300 300 EXPORT_SYMBOL(dma_supported);
301 301  
302   -int dma_is_consistent(dma_addr_t dma_addr)
  302 +int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
303 303 {
304 304 return 1;
305 305 }
drivers/scsi/53c700.c
... ... @@ -313,7 +313,7 @@
313 313 hostdata->status = memory + STATUS_OFFSET;
314 314 /* all of these offsets are L1_CACHE_BYTES separated. It is fatal
315 315 * if this isn't sufficient separation to avoid dma flushing issues */
316   - BUG_ON(!dma_is_consistent(pScript) && L1_CACHE_BYTES < dma_get_cache_alignment());
  316 + BUG_ON(!dma_is_consistent(hostdata->dev, pScript) && L1_CACHE_BYTES < dma_get_cache_alignment());
317 317 hostdata->slots = (struct NCR_700_command_slot *)(memory + SLOTS_OFFSET);
318 318 hostdata->dev = dev;
319 319  
include/asm-alpha/dma-mapping.h
... ... @@ -51,7 +51,7 @@
51 51  
52 52 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
53 53 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
54   -#define dma_is_consistent(dev) (1)
  54 +#define dma_is_consistent(d, h) (1)
55 55  
56 56 int dma_set_mask(struct device *dev, u64 mask);
57 57  
include/asm-arm/dma-mapping.h
... ... @@ -48,7 +48,7 @@
48 48 return 32;
49 49 }
50 50  
51   -static inline int dma_is_consistent(dma_addr_t handle)
  51 +static inline int dma_is_consistent(struct device *dev, dma_addr_t handle)
52 52 {
53 53 return !!arch_is_coherent();
54 54 }
include/asm-avr32/dma-mapping.h
... ... @@ -307,7 +307,7 @@
307 307 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
308 308 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
309 309  
310   -static inline int dma_is_consistent(dma_addr_t dma_addr)
  310 +static inline int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
311 311 {
312 312 return 1;
313 313 }
include/asm-cris/dma-mapping.h
... ... @@ -156,7 +156,7 @@
156 156 return (1 << INTERNODE_CACHE_SHIFT);
157 157 }
158 158  
159   -#define dma_is_consistent(d) (1)
  159 +#define dma_is_consistent(d, h) (1)
160 160  
161 161 static inline void
162 162 dma_cache_sync(void *vaddr, size_t size,
include/asm-frv/dma-mapping.h
... ... @@ -172,7 +172,7 @@
172 172 return 1 << L1_CACHE_SHIFT;
173 173 }
174 174  
175   -#define dma_is_consistent(d) (1)
  175 +#define dma_is_consistent(d, h) (1)
176 176  
177 177 static inline
178 178 void dma_cache_sync(void *vaddr, size_t size,
include/asm-generic/dma-mapping.h
... ... @@ -266,7 +266,7 @@
266 266  
267 267 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
268 268 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
269   -#define dma_is_consistent(d) (1)
  269 +#define dma_is_consistent(d, h) (1)
270 270  
271 271 static inline int
272 272 dma_get_cache_alignment(void)
include/asm-i386/dma-mapping.h
... ... @@ -156,7 +156,7 @@
156 156 return (1 << INTERNODE_CACHE_SHIFT);
157 157 }
158 158  
159   -#define dma_is_consistent(d) (1)
  159 +#define dma_is_consistent(d, h) (1)
160 160  
161 161 static inline void
162 162 dma_cache_sync(void *vaddr, size_t size,
include/asm-ia64/dma-mapping.h
... ... @@ -59,7 +59,7 @@
59 59 mb();
60 60 }
61 61  
62   -#define dma_is_consistent(dma_handle) (1) /* all we do is coherent memory... */
  62 +#define dma_is_consistent(d, h) (1) /* all we do is coherent memory... */
63 63  
64 64 #endif /* _ASM_IA64_DMA_MAPPING_H */
include/asm-m68k/dma-mapping.h
... ... @@ -21,7 +21,7 @@
21 21 return 1 << L1_CACHE_SHIFT;
22 22 }
23 23  
24   -static inline int dma_is_consistent(dma_addr_t dma_addr)
  24 +static inline int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
25 25 {
26 26 return 0;
27 27 }
include/asm-mips/dma-mapping.h
... ... @@ -63,7 +63,7 @@
63 63 return 128;
64 64 }
65 65  
66   -extern int dma_is_consistent(dma_addr_t dma_addr);
  66 +extern int dma_is_consistent(struct device *dev, dma_addr_t dma_addr);
67 67  
68 68 extern void dma_cache_sync(void *vaddr, size_t size,
69 69 enum dma_data_direction direction);
include/asm-parisc/dma-mapping.h
... ... @@ -191,7 +191,7 @@
191 191 }
192 192  
193 193 static inline int
194   -dma_is_consistent(dma_addr_t dma_addr)
  194 +dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
195 195 {
196 196 return (hppa_dma_ops->dma_sync_single_for_cpu == NULL);
197 197 }
include/asm-powerpc/dma-mapping.h
... ... @@ -342,9 +342,9 @@
342 342 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
343 343 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
344 344 #ifdef CONFIG_NOT_COHERENT_CACHE
345   -#define dma_is_consistent(d) (0)
  345 +#define dma_is_consistent(d, h) (0)
346 346 #else
347   -#define dma_is_consistent(d) (1)
  347 +#define dma_is_consistent(d, h) (1)
348 348 #endif
349 349  
350 350 static inline int dma_get_cache_alignment(void)
include/asm-sparc64/dma-mapping.h
... ... @@ -181,7 +181,7 @@
181 181  
182 182 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
183 183 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
184   -#define dma_is_consistent(d) (1)
  184 +#define dma_is_consistent(d, h) (1)
185 185  
186 186 static inline int
187 187 dma_get_cache_alignment(void)
include/asm-um/dma-mapping.h
... ... @@ -94,7 +94,7 @@
94 94  
95 95 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
96 96 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
97   -#define dma_is_consistent(d) (1)
  97 +#define dma_is_consistent(d, h) (1)
98 98  
99 99 static inline int
100 100 dma_get_cache_alignment(void)
include/asm-x86_64/dma-mapping.h
... ... @@ -180,7 +180,7 @@
180 180 return boot_cpu_data.x86_clflush_size;
181 181 }
182 182  
183   -#define dma_is_consistent(h) 1
  183 +#define dma_is_consistent(d, h) 1
184 184  
185 185 extern int dma_set_mask(struct device *dev, u64 mask);
186 186  
include/asm-xtensa/dma-mapping.h
... ... @@ -170,7 +170,7 @@
170 170 return L1_CACHE_BYTES;
171 171 }
172 172  
173   -#define dma_is_consistent(d) (1)
  173 +#define dma_is_consistent(d, h) (1)
174 174  
175 175 static inline void
176 176 dma_cache_sync(void *vaddr, size_t size,