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Commit feeb2721a7a0bd0cfa5b8847f80aec93aa2cc00d

Authored by Alexander Duyck
Committed by David S. Miller
1 parent 3fdde0a160
Exists in master and in 39 other branches 8mp-imx_5.4.70_2.3.0, 8qm-imx_5.4.70_2.3.0, emb_imx_lf-5.15.y, emb_lf-6.1.y, imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, imx_4.1.15_1.0.0_ga, pitx_8mp_lf-5.10.y, rt-smarc-imx_4.1.15_1.0.0_ga, rt_linux_5.15.71, smarc-8m-android-11.0.0_2.0.0, smarc-imx6_4.14.98_2.0.0_ga, smarc-imx6_4.9.88_2.0.0_ga, smarc-imx7_4.14.98_2.0.0_ga, smarc-imx7_4.9.11_1.0.0_ga, smarc-imx7_4.9.88_2.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-imx_4.1.15_1.0.0_ga, smarc-imx_4.9.11_1.0.0_ga, smarc-imx_4.9.51_imx8m_ga, smarc-imx_4.9.88_2.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_1.2.0_ga, smarc_8m_00d0_imx_4.14.98_2.0.0_ga, smarc_8m_imx_4.14.78_1.0.0_ga, smarc_8m_imx_4.14.98_2.0.0_ga, smarc_8m_imx_4.19.35_1.1.0, smarc_8mm_imx_4.14.78_1.0.0_ga, smarc_8mm_imx_4.14.98_2.0.0_ga, smarc_8mm_imx_4.19.35_1.1.0, smarc_8mm_imx_5.4.24_2.1.0, smarc_8mp_lf-5.10.y, smarc_8mq_imx_5.4.24_2.1.0, smarc_8mq_lf-5.10.y, smarc_imx_lf-5.15.y

igb: make certain to reassign legacy interrupt vectors after reset 

This change corrects an issue that will cause false hangs when using either
82575 or 82580 in legacy interrupt mode.  The issue is caused when there is
a slow traffic flow and an "ethtool -r" is executed while using legacy or
MSI interrupts.  MSI-X is not affected by this issue due to the fact that
we were already reconfiguring the vectors after reset.

If possible it would be best to push this for net-2.6 since it is resolving
a bug but if that is not possible then net-next-2.6 will be fine.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

Showing 1 changed file with 5 additions and 15 deletions Side-by-side Diff

drivers/net/igb/igb_main.c
Diff comments   View file @ feeb272
... ... @@ -421,6 +421,8 @@
421 421 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
422 422 if (tx_queue > IGB_N0_QUEUE)
423 423 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
  424 + if (!adapter->msix_entries && msix_vector == 0)
  425 + msixbm |= E1000_EIMS_OTHER;
424 426 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
425 427 q_vector->eims_value = msixbm;
426 428 break;
... ... @@ -877,7 +879,6 @@
877 879 {
878 880 struct net_device *netdev = adapter->netdev;
879 881 struct pci_dev *pdev = adapter->pdev;
880   - struct e1000_hw *hw = &adapter->hw;
881 882 int err = 0;
882 883  
883 884 if (adapter->msix_entries) {
... ... @@ -909,20 +910,7 @@
909 910 igb_setup_all_tx_resources(adapter);
910 911 igb_setup_all_rx_resources(adapter);
911 912 } else {
912   - switch (hw->mac.type) {
913   - case e1000_82575:
914   - wr32(E1000_MSIXBM(0),
915   - (E1000_EICR_RX_QUEUE0 |
916   - E1000_EICR_TX_QUEUE0 |
917   - E1000_EIMS_OTHER));
918   - break;
919   - case e1000_82580:
920   - case e1000_82576:
921   - wr32(E1000_IVAR0, E1000_IVAR_VALID);
922   - break;
923   - default:
924   - break;
925   - }
  913 + igb_assign_vector(adapter->q_vector[0], 0);
926 914 }
927 915  
928 916 if (adapter->flags & IGB_FLAG_HAS_MSI) {
... ... @@ -1140,6 +1128,8 @@
1140 1128 }
1141 1129 if (adapter->msix_entries)
1142 1130 igb_configure_msix(adapter);
  1131 + else
  1132 + igb_assign_vector(adapter->q_vector[0], 0);
1143 1133  
1144 1134 /* Clear any pending interrupts. */
1145 1135 rd32(E1000_ICR);