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Commit fff74a935ec81d2353423917a2638aa1570d4634

Authored by Alexander Shiyan
Committed by Arnd Bergmann
1 parent 7d1311b93e

ARM: clps711x: Switch CLPS711X subarch to use clk and clocksource driver 

This patch removes old support for clk and clocksource support and
switches platform to use new drivers.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Showing 2 changed files with 9 additions and 134 deletions Side-by-side Diff

arch/arm/mach-clps711x/common.c
Diff comments   View file @ fff74a9
... ... @@ -19,29 +19,17 @@
19 19 * along with this program; if not, write to the Free Software
20 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 21 */
22   -#include <linux/io.h>
  22 +
23 23 #include <linux/init.h>
24 24 #include <linux/sizes.h>
25   -#include <linux/interrupt.h>
26   -#include <linux/irq.h>
27   -#include <linux/clk.h>
28   -#include <linux/clkdev.h>
29   -#include <linux/clockchips.h>
30   -#include <linux/clocksource.h>
31   -#include <linux/clk-provider.h>
32   -#include <linux/sched_clock.h>
33 25  
34 26 #include <asm/mach/map.h>
35   -#include <asm/mach/time.h>
36 27 #include <asm/system_misc.h>
37 28  
38 29 #include <mach/hardware.h>
39 30  
40 31 #include "common.h"
41 32  
42   -static struct clk *clk_pll, *clk_bus, *clk_uart, *clk_timerl, *clk_timerh,
43   - *clk_tint, *clk_spi;
44   -
45 33 /*
46 34 * This maps the generic CLPS711x registers
47 35 */
48 36  
... ... @@ -64,129 +52,11 @@
64 52 clps711x_intc_init(CLPS711X_PHYS_BASE, SZ_16K);
65 53 }
66 54  
67   -static u64 notrace clps711x_sched_clock_read(void)
68   -{
69   - return ~readw_relaxed(CLPS711X_VIRT_BASE + TC1D);
70   -}
71   -
72   -static void clps711x_clockevent_set_mode(enum clock_event_mode mode,
73   - struct clock_event_device *evt)
74   -{
75   - disable_irq(IRQ_TC2OI);
76   -
77   - switch (mode) {
78   - case CLOCK_EVT_MODE_PERIODIC:
79   - enable_irq(IRQ_TC2OI);
80   - break;
81   - case CLOCK_EVT_MODE_ONESHOT:
82   - /* Not supported */
83   - case CLOCK_EVT_MODE_SHUTDOWN:
84   - case CLOCK_EVT_MODE_UNUSED:
85   - case CLOCK_EVT_MODE_RESUME:
86   - /* Left event sources disabled, no more interrupts appear */
87   - break;
88   - }
89   -}
90   -
91   -static struct clock_event_device clockevent_clps711x = {
92   - .name = "clps711x-clockevent",
93   - .rating = 300,
94   - .features = CLOCK_EVT_FEAT_PERIODIC,
95   - .set_mode = clps711x_clockevent_set_mode,
96   -};
97   -
98   -static irqreturn_t clps711x_timer_interrupt(int irq, void *dev_id)
99   -{
100   - clockevent_clps711x.event_handler(&clockevent_clps711x);
101   -
102   - return IRQ_HANDLED;
103   -}
104   -
105   -static struct irqaction clps711x_timer_irq = {
106   - .name = "clps711x-timer",
107   - .flags = IRQF_TIMER | IRQF_IRQPOLL,
108   - .handler = clps711x_timer_interrupt,
109   -};
110   -
111   -static void add_fixed_clk(struct clk *clk, const char *name, int rate)
112   -{
113   - clk = clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
114   - clk_register_clkdev(clk, name, NULL);
115   -}
116   -
117 55 void __init clps711x_timer_init(void)
118 56 {
119   - int osc, ext, pll, cpu, bus, timl, timh, uart, spi;
120   - u32 tmp;
121   -
122   - osc = 3686400;
123   - ext = 13000000;
124   -
125   - tmp = clps_readl(PLLR) >> 24;
126   - if (tmp)
127   - pll = (osc * tmp) / 2;
128   - else
129   - pll = 73728000; /* Default value */
130   -
131   - tmp = clps_readl(SYSFLG2);
132   - if (tmp & SYSFLG2_CKMODE) {
133   - cpu = ext;
134   - bus = cpu;
135   - spi = 135400;
136   - pll = 0;
137   - } else {
138   - cpu = pll;
139   - if (cpu >= 36864000)
140   - bus = cpu / 2;
141   - else
142   - bus = 36864000 / 2;
143   - spi = cpu / 576;
144   - }
145   -
146   - uart = bus / 10;
147   -
148   - if (tmp & SYSFLG2_CKMODE) {
149   - tmp = clps_readl(SYSCON2);
150   - if (tmp & SYSCON2_OSTB)
151   - timh = ext / 26;
152   - else
153   - timh = 541440;
154   - } else
155   - timh = DIV_ROUND_CLOSEST(cpu, 144);
156   -
157   - timl = DIV_ROUND_CLOSEST(timh, 256);
158   -
159   - /* All clocks are fixed */
160   - add_fixed_clk(clk_pll, "pll", pll);
161   - add_fixed_clk(clk_bus, "bus", bus);
162   - add_fixed_clk(clk_uart, "uart", uart);
163   - add_fixed_clk(clk_timerl, "timer_lf", timl);
164   - add_fixed_clk(clk_timerh, "timer_hf", timh);
165   - add_fixed_clk(clk_tint, "tint", 64);
166   - add_fixed_clk(clk_spi, "spi", spi);
167   -
168   - pr_info("CPU frequency set at %i Hz.\n", cpu);
169   -
170   - /* Start Timer1 in free running mode (Low frequency) */
171   - tmp = clps_readl(SYSCON1) & ~(SYSCON1_TC1S | SYSCON1_TC1M);
172   - clps_writel(tmp, SYSCON1);
173   -
174   - sched_clock_register(clps711x_sched_clock_read, 16, timl);
175   -
176   - clocksource_mmio_init(CLPS711X_VIRT_BASE + TC1D,
177   - "clps711x_clocksource", timl, 300, 16,
178   - clocksource_mmio_readw_down);
179   -
180   - /* Set Timer2 prescaler */
181   - clps_writew(DIV_ROUND_CLOSEST(timh, HZ), TC2D);
182   -
183   - /* Start Timer2 in prescale mode (High frequency)*/
184   - tmp = clps_readl(SYSCON1) | SYSCON1_TC2M | SYSCON1_TC2S;
185   - clps_writel(tmp, SYSCON1);
186   -
187   - clockevents_config_and_register(&clockevent_clps711x, timh, 0, 0);
188   -
189   - setup_irq(IRQ_TC2OI, &clps711x_timer_irq);
  57 + clps711x_clk_init(CLPS711X_VIRT_BASE);
  58 + clps711x_clksrc_init(CLPS711X_VIRT_BASE + TC1D,
  59 + CLPS711X_VIRT_BASE + TC2D, IRQ_TC2OI);
190 60 }
191 61  
192 62 void clps711x_restart(enum reboot_mode mode, const char *cmd)
arch/arm/mach-clps711x/common.h
Diff comments   View file @ fff74a9
... ... @@ -16,4 +16,9 @@
16 16  
17 17 /* drivers/irqchip/irq-clps711x.c */
18 18 void clps711x_intc_init(phys_addr_t, resource_size_t);
  19 +/* drivers/clk/clk-clps711x.c */
  20 +void clps711x_clk_init(void __iomem *base);
  21 +/* drivers/clocksource/clps711x-timer.c */
  22 +void clps711x_clksrc_init(void __iomem *tc1_base, void __iomem *tc2_base,
  23 + unsigned int irq);