Eric Lee / smarc-fsl-linux-kernel

01 Dec, 2015

1 commit

  • 48111b79b   pinctrl: sh-pfc: sh7734: Add missing cfg macro parameter to fix build ... Browse Code »

    When building for SH7734:

    drivers/pinctrl/sh-pfc/pfc-sh7734.c:586:1: error: macro "_GP_DATA" passed 5 arguments, but takes just 4
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:586:2: error: '_GP_DATA' undeclared here (not in a function)
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:586:1: error: macro "_GP_DATA" passed 5 arguments, but takes just 4
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:586:1: error: macro "_GP_DATA" passed 5 arguments, but takes just 4
    ...
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:2389:1: error: macro "_GP_INOUTSEL" passed 5 arguments, but takes just 4
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:2389:53: error: '_GP_INOUTSEL' undeclared here (not in a function)
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:2389:2: warning: initialization makes integer from pointer without a cast [enabled by default]
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:2389:2: warning: (near initialization for '(anonymous)[0]') [enabled by default]
    ...
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:2416:1: error: macro "_GP_INDT" passed 5 arguments, but takes just 4
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:2416:47: error: '_GP_INDT' undeclared here (not in a function)
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:2416:2: warning: initialization makes integer from pointer without a cast [enabled by default]
    drivers/pinctrl/sh-pfc/pfc-sh7734.c:2416:2: warning: (near initialization for '(anonymous)[0]') [enabled by default]
    ...

    Add the missing "cfg" macro parameters to the sh7734-specific
    _GP_DATA(), _GP_INOUTSEL(), and _GP_INDT() macros to fix this.

    Fixes: 22768fc60abbf58b ("pinctrl: sh-pfc: Add macros defining GP ports with config flags")
    Signed-off-by: Geert Uytterhoeven
    Signed-off-by: Linus Walleij

    Geert Uytterhoeven
     

18 Nov, 2015

1 commit

  • f97c23096   pinctrl: mediatek: Add get_direction support. ... Browse Code »

    Since Linux gpio framework return 0 for output, 1 for input.
    But HW use 0 stands for input, and 1 stands for output.
    So use negative to correct it.

    And gpio_chip.get is used to get input value, no need to get
    output value, so removing it.

    Signed-off-by: Hongzhou Yang
    Signed-off-by: Linus Walleij

    Hongzhou Yang
     

17 Nov, 2015

3 commits

  • c3dd25cc7   pinctrl: fix qcom ssbi drivers for 64-bit compilation ... Browse Code »

    When building pinctrl-ssbi-gpio and pinctrl-ssbi-mpp for ARM64, we get
    a compile warning about invalid types:

    drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c: In function 'pm8xxx_gpio_probe':
    drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c:675:17: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
    drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c: In function 'pm8xxx_mpp_probe':
    drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c:766:17: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]

    This changes the code so we cast the pointer to 'unsigned long', which
    is the right thing to do here.

    Signed-off-by: Arnd Bergmann
    Reviewed-by: Bjorn Andersson
    Signed-off-by: Linus Walleij

    Arnd Bergmann
     
  • 0563df2ce   pinctrl: imx1-core: add missing of_node_put ... Browse Code »

    for_each_child_of_node performs an of_node_get on each iteration,
    so of_node_put is required on break out of the loop.

    This is done using Coccinelle. And semantic patch used for this is
    as follows:

    @@
    expression root,e;
    local idexpression child;
    @@

    for_each_child_of_node(root, child) {
    ... when != of_node_put(child)
    when != e = child
    (
    return child;
    |
    + of_node_put(child);
    ? return ...;
    )
    ...
    }

    Signed-off-by: Vaishali Thakkar
    Signed-off-by: Linus Walleij

    Vaishali Thakkar
     
  • 932cb8396   pinctrl: remove redundant if conditional from Kconfig ... Browse Code »

    The whole menu is guarded by

    menu "Pin controllers"
    depends on PINCTRL
    ...
    endmenu

    The if conditional outside of it is redundant.

    Signed-off-by: Masahiro Yamada
    Signed-off-by: Linus Walleij

    Masahiro Yamada
     

03 Nov, 2015

2 commits

  • e86328c48   Merge tag 'gpio-v4.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio ... Browse Code »

    Pull GPIO updates from Linus Walleij:
    "Here is the bulk of GPIO changes for the v4.4 development cycle.

    The only changes hitting outside drivers/gpio are in the pin control
    subsystem and these seem to have settled nicely in linux-next.

    Development mistakes and catfights are nicely documented in the
    reverts as you can see. The outcome of the ABI fight is that we're
    working on a chardev ABI for GPIO now, where hope to show results for
    the v4.5 kernel.

    Summary of changes:

    GPIO core:
    - Define and handle flags for open drain/open collector and open
    source/open emitter, also know as "single-ended" configurations.
    - Generic request/free operations that handle calling out to the
    (optional) pin control backend.
    - Some refactoring related to an ABI change that did not happen, yet
    provide useful.
    - Added a real-time compliance checklist. Many GPIO chips have
    irqchips, and need to think this over with the RT patches going
    upstream.
    - Restructure, fix and clean up Kconfig menus a bit.

    New drivers:
    - New driver for AMD Promony.
    - New driver for ACCES 104-IDIO-16, a port-mapped I/O card,
    ISA-style. Very retro.

    Subdriver changes:
    - OMAP changes to handle real time requirements.
    - Handle trigger types for edge and level IRQs on PL061 properly. As
    this hardware is very common it needs to set a proper example for
    others to follow.
    - Some container_of() cleanups.
    - Delete the unused MSM driver in favor of the driver that is
    embedded inside the pin control driver.
    - Cleanup of the ath79 GPIO driver used by many, many OpenWRT router
    targets.
    - A consolidated IT87xx driver replacing the earlier very specific
    IT8761e driver.
    - Handle the TI TCA9539 in the PCA953x driver. Also handle ACPI
    devices in this subdriver.
    - Drop xilinx arch dependencies as these FPGAs seem to profilate over
    a few different architectures. MIPS and ARM come to mind"

    * tag 'gpio-v4.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (57 commits)
    gpio: fix up SPI submenu
    gpio: drop surplus I2C dependencies
    gpio: drop surplus X86 dependencies
    gpio: dt-bindings: document the official use of "ngpios"
    gpio: MAINTAINERS: Add an entry for the ATH79 GPIO driver
    gpio / ACPI: Allow shared GPIO event to be read via operation region
    gpio: group port-mapped I/O drivers in a menu
    gpio: Add ACCES 104-IDIO-16 driver maintainer entry
    gpio: zynq: Document interrupt-controller DT binding
    gpio: xilinx: Drop architecture dependencies
    gpio: generic: Revert to old error handling in bgpio_map
    gpio: add a real time compliance notes
    Revert "gpio: add a real time compliance checklist"
    gpio: Add GPIO support for the ACCES 104-IDIO-16
    gpio: driver for AMD Promontory
    gpio: xlp: Convert to use gpiolib irqchip helpers
    gpio: add a real time compliance checklist
    gpio/xilinx: enable for MIPS
    gpiolib: Add and use OF_GPIO_SINGLE_ENDED flag
    gpiolib: Split GPIO flags parsing and GPIO configuration
    ...

    Linus Torvalds
     
  • bc9d8c20f   Merge tag 'pinctrl-v4.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl ... Browse Code »

    Pull pin control updates from Linus Walleij:
    "This is the big bulk of pin control changes for the v4.4 kernel
    development cycle. Development pace is high in pin control again this
    merge window. 28 contributors, 83 patches.

    It hits a few sites outside the pin control subsystem:

    - Device tree bindings in Documentation (as usual)
    - MAINTAINERS
    - drivers/base/* for the "init" state handling by Doug Anderson.
    This has been ACKed by Greg.
    - drivers/usb/renesas_usbhs/rcar2.c, for a dependent Renesas change
    in the USB subsystem. This has been ACKed by both Greg and Felipe.
    - arch/arm/boot/dts/sama5d2.dtsi - this should ideally have gone
    through the ARM SoC tree but ended up here.

    This time I am using Geert Uytterhoeven as submaintainer for SH PFC
    since the are three-four people working in parallel with new Renesas
    ASICs.

    Summary of changes:

    Infrastructure:

    - Doug Anderson wrote a patch adding an "init" state different from
    the "default" state for pin control state handling in the core
    framework. This is applied before the driver's probe() call if
    defined and takes precedence over "default". If both are defined,
    "init" will be applied *before* probe() and "default" will be
    applied *after* probe().

    Significant subdriver improvements:

    - SH PFC is switched to getting GPIO ranges from the device tree
    ranges property on DT platforms.
    - Got rid of CONFIG_ARCH_SHMOBILE_LEGACY, we are all modernized.
    - Got rid of SH PFC hardcoded IRQ numbers.
    - Allwinner sunxi external interrupt through the "r" controller.
    - Moved the Cygnus driver to use DT-provided GPIO ranges.

    New drivers:

    - Atmel PIO4 pin controller for the SAMA4D2 family

    New subdrivers:

    - Rockchip RK3036 subdriver
    - Renesas SH PFC R8A7795 subdriver
    - Allwinner sunxi A83T PIO subdriver
    - Freescale i.MX7d iomux lpsr subdriver
    - Marvell Berlin BG4CT subdriver
    - SiRF Atlas 7 step B SoC subdriver
    - Intel Broxton SoC subdriver

    Apart from this, the usual slew if syntactic and semantic fixes"

    * tag 'pinctrl-v4.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (81 commits)
    pinctrl: pinconf: remove needless loop
    pinctrl: uniphier: guard uniphier directory with CONFIG_PINCTRL_UNIPHIER
    pinctrl: zynq: fix UTF-8 errors
    pinctrl: zynq: Initialize early
    pinctrl: at91: add missing of_node_put
    pinctrl: tegra-xusb: Correct lane mux options
    pinctrl: intel: Add Intel Broxton pin controller support
    pinctrl: intel: Allow requesting pins which are in ACPI mode as GPIOs
    pinctrl: intel: Add support for multiple GPIO chips sharing the interrupt
    drivers/pinctrl: Add the concept of an "init" state
    pinctrl: uniphier: set input-enable before pin-muxing
    pinctrl: cygnus: Add new compatible string for gpio controller driver
    pinctrl: cygnus: Remove GPIO to Pinctrl pin mapping from driver
    pinctrl: cygnus: Optional DT property to support pin mappings
    pinctrl: sunxi: Add irq pinmuxing to sun6i "r" pincontroller
    pinctrl: sunxi: Fix irq_of_xlate for the r_pio pinctrl block
    pinctrl: sh-pfc: Remove obsolete r8a7778 platform_device_id entry
    pinctrl: sh-pfc: Remove obsolete r8a7779 platform_device_id entry
    pinctrl: sh-pfc: Stop including
    usb: renesas_usbhs: Remove unneeded #include
    ...

    Linus Torvalds
     

01 Nov, 2015

3 commits

30 Oct, 2015

1 commit

  • 13e3008fa   pinctrl: zynq: Initialize early ... Browse Code »

    Supplying pinmux configuration for e.g. gpio pins leads to deferred
    probes because the pinctrl device is probed much later than gpio.
    Move the init call to a much earlier stage so it probes before the
    devices that may need it.

    Signed-off-by: Mike Looijmans
    Tested-by: Sören Brinkmann
    Signed-off-by: Linus Walleij

    Mike Looijmans
     

28 Oct, 2015

2 commits

  • d94b986aa   pinctrl: at91: add missing of_node_put ... Browse Code »

    for_each_child_of_node performs an of_node_get on each iteration, so
    a break out of the loop requires an of_node_put.

    A simplified version of the semantic patch that fixes this problem is as
    follows (http://coccinelle.lip6.fr):

    //
    @@
    expression root,e;
    local idexpression child;
    @@

    for_each_child_of_node(root, child) {
    ... when != of_node_put(child)
    when != e = child
    (
    return child;
    |
    + of_node_put(child);
    ? return ...;
    )
    ...
    }
    //

    Signed-off-by: Julia Lawall
    Acked-by: Ludovic Desroches
    Signed-off-by: Linus Walleij

    Julia Lawall
     
  • 9d4cc85d2   pinctrl: tegra-xusb: Correct lane mux options ... Browse Code »

    The description of the XUSB_PADCTL_USB3_PAD_MUX_0 register in the Tegra124
    documentation implies that all functions (pcie, usb3 and sata) can be
    muxed onto to all lanes (pcie lanes 0-4 and sata lane 0). However, it has
    been confirmed that this is not the case and the mux'ing options much more
    limited. Unfortunately, the public documentation has not been updated to
    reflect this and so detail the actual mux'ing options here by function:

    Function: Lanes:
    pcie1 x2: pcie3, pcie4
    pcie1 x4: pcie1, pcie2, pcie3, pcie4
    pcie2 x1 (option1): pcie0
    pcie2 x1 (option2): pcie2
    usb3 port 0: pcie0
    usb3 port 1 (option 1): pcie1
    usb3 port 1 (option 2): sata0
    sata: sata0

    Signed-off-by: Jon Hunter
    Acked-by: Stephen Warren
    Signed-off-by: Linus Walleij

    Jon Hunter
     

27 Oct, 2015

6 commits

  • ee1a6ca43   pinctrl: intel: Add Intel Broxton pin controller support ... Browse Code »

    This driver adds pinctrl/GPIO support for Intel Broxton. The GPIO
    controller is based on the same hardware design that is already used in
    Intel Sunrisepoint so we leverage the core driver here.

    Signed-off-by: Mika Westerberg
    Signed-off-by: Linus Walleij

    Mika Westerberg
     
  • 4341e8a54   pinctrl: intel: Allow requesting pins which are in ACPI mode as GPIOs ... Browse Code »

    Reserved for ACPI actually means that in such case the GPIO hardware will
    not update the interrupt status register (GPI_IS) even if the pin is
    configured to trigger an interrupt. It will update GPI_GPE_STS instead and
    does not trigger an interrupt.

    Allow using such pins as GPIOs, only prevent their usage as interrupts.

    We also rename function intel_pad_reserved_for_acpi() to be
    intel_pad_acpi_mode() which reflects the actual meaning better.

    Signed-off-by: Mika Westerberg
    Signed-off-by: Linus Walleij

    Mika Westerberg
     
  • 193b40c82   pinctrl: intel: Add support for multiple GPIO chips sharing the interrupt ... Browse Code »

    On Intel Broxton the GPIO hardware consists of several chips that all share
    the parent interrupt. It is not possible to handle this by setting chained
    handler for each chip (as they will overwrite each other).

    To overcome this we need to request the interrupt using devm_request_irq()
    and pass IRQF_SHARED with the flags.

    Signed-off-by: Mika Westerberg
    Signed-off-by: Linus Walleij

    Mika Westerberg
     
  • ef0eebc05   drivers/pinctrl: Add the concept of an "init" state ... Browse Code »

    For pinctrl the "default" state is applied to pins before the driver's
    probe function is called. This is normally a sensible thing to do,
    but in some cases can cause problems. That's because the pins will
    change state before the driver is given a chance to program how those
    pins should behave.

    As an example you might have a regulator that is controlled by a PWM
    (output high = high voltage, output low = low voltage). The firmware
    might leave this pin as driven high. If we allow the driver core to
    reconfigure this pin as a PWM pin before the PWM's probe function runs
    then you might end up running at too low of a voltage while we probe.

    Let's introudce a new "init" state. If this is defined we'll set
    pinctrl to this state before probe and then "default" after probe
    (unless the driver explicitly changed states already).

    An alternative idea that was thought of was to use the pre-existing
    "sleep" or "idle" states and add a boolean property that we should
    start in that mode. This was not done because the "init" state is
    needed for correctness and those other states are only present (and
    only transitioned in to and out of) when (optional) power management
    is enabled.

    Changes in v3:
    - Moved declarations to pinctrl/devinfo.h
    - Fixed author/SoB

    Changes in v2:
    - Added comment to pinctrl_init_done() as per Linus W.

    Signed-off-by: Douglas Anderson
    Acked-by: Greg Kroah-Hartman
    Tested-by: Caesar Wang
    Signed-off-by: Linus Walleij

    Douglas Anderson
     
  • bac7f4c1b   pinctrl: uniphier: set input-enable before pin-muxing ... Browse Code »

    While IECTRL is disabled, input signals are pulled-down internally.
    If pin-muxing is set up first, glitch signals (Low to High transition)
    might be input to hardware blocks.

    Bad case scenario:
    [1] The hardware block is already running before pinctrl is handled.
    (the reset is de-asserted by default or by a firmware, for example)
    [2] The pin-muxing is set up. The input signals to hardware block
    are pulled-down by the chip-internal biasing.
    [3] The pins are input-enabled. The signals from the board reach the
    hardware block.

    Actually, one invalid character is input to the UART blocks for such
    SoCs as PH1-LD4, PH1-sLD8, where UART devices start to run at the
    power on reset.

    To avoid such problems, pins should be input-enabled before muxing.

    Fixes: 6e9088920258 ("pinctrl: UniPhier: add UniPhier pinctrl core support")
    Signed-off-by: Masahiro Yamada
    Reported-by: Dai Okamura
    Signed-off-by: Linus Walleij

    Masahiro Yamada
     
  • ea92211c0   pinctrl: cygnus: Remove GPIO to Pinctrl pin mapping from driver ... Browse Code »

    Remove gpio to pinctrl pin mapping code from driver and
    address this through standard property "gpio-ranges".

    Signed-off-by: Pramod Kumar
    Reviewed-by: Ray Jui
    Reviewed-by: Scott Branden
    Signed-off-by: Linus Walleij

    Pramod Kumar
     

26 Oct, 2015

1 commit

23 Oct, 2015

2 commits

20 Oct, 2015

8 commits

17 Oct, 2015

5 commits

  • ec879f127   pinctrl: baytrail: Fix compilation warnings when !CONFIG_PM ... Browse Code »

    When CONFIG_PM is not set we get following compilation warnings:

    warning: ‘byt_gpio_runtime_suspend’ defined but not used [-Wunused-function]
    warning: ‘byt_gpio_runtime_resume’ defined but not used [-Wunused-function]

    Fix this by guarding byt_gpio_runtime_suspend()/byt_gpio_runtime_resume()
    with #ifdef CONFIG_PM.

    Signed-off-by: Mika Westerberg
    Signed-off-by: Linus Walleij

    Mika Westerberg
     
  • f487bbf30   pinctrl: intel: Fix compilation warning when !CONFIG_PM_SLEEP ... Browse Code »

    We get following warning when CONFIG_PM_SLEEP is not set

    warning: ‘intel_gpio_irq_init’ defined but not used [-Wunused-function]

    Since the function is only called from intel_pinctrl_resume() move it
    inside CONFIG_PM_SLEEP guard as well.

    Signed-off-by: Mika Westerberg
    Signed-off-by: Linus Walleij

    Mika Westerberg
     
  • 11091fb0a   pinctrl: qcom: ssbi: fix compilation with DEBUG_FS=n ... Browse Code »

    The DEBUG_FS=n #defines for the dbg_show functions were missed when
    renaming the driver from msm_ to pm8xxx_, causing it to break the build
    when DEBUG_FS isn't enabled:

    CC [M] drivers/pinctrl/qcom/pinctrl-ssbi-gpio.o
    drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c:597:14: error: ‘pm8xxx_gpio_dbg_show’ undeclared here (not in a function)
    .dbg_show = pm8xxx_gpio_dbg_show,

    Fix this by renaming them correctly.

    Fixes: b4c45fe974bc ("pinctrl: qcom: ssbi: Family A gpio & mpp drivers")
    Signed-off-by: Jonas Gorski
    Reviewed-by: Bjorn Andersson
    Signed-off-by: Linus Walleij

    Jonas Gorski
     
  • 98c85d583   pinctrl: replace trivial implementations of gpio_chip request/free ... Browse Code »

    Replace all trivial request/free callbacks that do nothing but call into
    pinctrl code with the generic versions.

    Signed-off-by: Jonas Gorski
    Acked-by: Bjorn Andersson
    Acked-by: Heiko Stuebner
    Acked-by: Eric Anholt
    Acked-by: Mika Westerberg
    Acked-by: Andrew Bresticker
    Acked-by: Baruch Siach
    Acked-by: Matthias Brugger
    Acked-by: Lee Jones
    Acked-by: Laxman Dewangan
    Acked-by: Maxime Ripard
    Signed-off-by: Linus Walleij

    Jonas Gorski
     
  • 3fa508cd2   pinctrl: atlas7: support atlas7 step B changes ... Browse Code »

    The the pin groups and pin functions have been changed
    in atlas7 step B soc. We have to update the driver
    to support step B chip.

    Changes:
    1. add 5 jtag pins to IOC_TOP:
    "jtag_tdo", "jtag_tms","jtag_tck", "jtag_tdi", "jtag_trstn"
    these 5 pins can be mutiplex with other functions, so we
    have to conver these 5 pins in pinmux.
    2. add pin groups for audio digmic, audio spdif, can transceiver
    en, can transceiver stb, i2s0, i2s1 and jtag.
    3. serval pins can be located to more PADs:
    audio_uart0_urfs, audio_uart1_urfs, audio_uart2_urfs,
    audio_uart2_urxd, audio_uart2_usclk, audio_uart2_utfs,
    audio_uart2_utxd, can0_rxd, can0_txd, can1_rxd, can1_txd
    jtag_ntrst, jtag_swdiotms, jtag_tck, jtag_tdi, jtag_tdo,
    pw_cko0, pw_cko1, pw_i2s01, pw_pwm0, pw_pwm1, sd2_cdb,
    sd2_wpb, uart2_cts, uart2_rts, uart2_rxd, uart2_txd,
    uart3_cts, uart3_rts, uart3_rxd, uart3_txd, uart4_cts,
    uart4_rts, usb0_drvvbus, usb1_drvvbus.

    Because of Changes#3, some functions should have more than one
    pin groups. So we have to split the original pin group to serval
    pin groups.

    For example:
    audio_uart0 has 5 pins, on STEPA, each of these 5 pins only has
    one related PAD. But on STEPB, audio_uart0_urfs has 4 related
    PAD.
    So we place the 4 pins with one PAD into a single pin group:
    audio_uart0_basic_group.
    and place urfs pin wtih different PADs to 4 different pin groups:
    audio_uart0_urfs_group0, ..., audio_uart0_urfs_group3

    A full audio_uart0 pin group can be:
    pinctrl-0 = ;
    If audio_uart0 pin group encountered some confiction, we only have
    to change the urfs group:
    pinctrl-0 = ;

    Signed-off-by: Wei Chen
    Signed-off-by: Barry Song
    Signed-off-by: Linus Walleij

    Wei Chen
     

16 Oct, 2015

5 commits