30 Dec, 2020
1 commit
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commit 6cfd39e212dee2e77a0227ce4e0f55fa06d79f46 upstream.
qcom_qspi_remove() accesses the driver's private data after calling
spi_unregister_master() even though that function releases the last
reference on the spi_master and thereby frees the private data.Fix by switching over to the new devm_spi_alloc_master() helper which
keeps the private data accessible until the driver has unbound.Fixes: f79a158d37c2 ("spi: spi-qcom-qspi: Use OPP API to set clk/perf state")
Signed-off-by: Lukas Wunner
Cc: # v5.9+: 5e844cc37a5c: spi: Introduce device-managed SPI controller allocation
Cc: # v5.9+
Cc: Rajendra Nayak
Link: https://lore.kernel.org/r/b6d3c4dce571d78a532fd74f27def0d5dc8d8a24.1607286887.git.lukas@wunner.de
Signed-off-by: Mark Brown
Signed-off-by: Greg Kroah-Hartman
14 Sep, 2020
1 commit
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It is redundant to do irqsave and irqrestore in hardIRQ context.
Cc: Andy Gross
Cc: Bjorn Andersson
Signed-off-by: Barry Song
Link: https://lore.kernel.org/r/20200910100246.32696-1-song.bao.hua@hisilicon.com
Signed-off-by: Mark Brown
09 Sep, 2020
3 commits
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…h Kumar <viresh.kumar@linaro.org>:
Hello,
This cleans up some of the user code around calls to
dev_pm_opp_of_remove_table().All the patches can be picked by respective maintainers directly except
for the last patch, which needs the previous two to get merged first.These are based for 5.9-rc1.
Rajendra, Since most of these changes are related to qcom stuff, it
would be great if you can give them a try. I wasn't able to test them
due to lack of hardware.Ulf, I had to revise the sdhci patch, sorry about that. Please pick this
one.Diff between V1 and V2 is mentioned in each of the patches separately.
Viresh Kumar (8):
cpufreq: imx6q: Unconditionally call dev_pm_opp_of_remove_table()
drm/lima: Unconditionally call dev_pm_opp_of_remove_table()
drm/msm: Unconditionally call dev_pm_opp_of_remove_table()
mmc: sdhci-msm: Unconditionally call dev_pm_opp_of_remove_table()
spi: spi-geni-qcom: Unconditionally call dev_pm_opp_of_remove_table()
spi: spi-qcom-qspi: Unconditionally call dev_pm_opp_of_remove_table()
tty: serial: qcom_geni_serial: Unconditionally call
dev_pm_opp_of_remove_table()
qcom-geni-se: remove has_opp_tabledrivers/cpufreq/imx6q-cpufreq.c | 10 ++--------
drivers/gpu/drm/lima/lima_devfreq.c | 6 +-----
drivers/gpu/drm/lima/lima_devfreq.h | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 14 +++++---------
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 -
drivers/gpu/drm/msm/dsi/dsi_host.c | 8 ++------
drivers/mmc/host/sdhci-msm.c | 14 +++++---------
drivers/spi/spi-geni-qcom.c | 13 +++++--------
drivers/spi/spi-qcom-qspi.c | 15 ++++++---------
drivers/tty/serial/qcom_geni_serial.c | 13 +++++--------
include/linux/qcom-geni-se.h | 2 --
11 files changed, 31 insertions(+), 66 deletions(-)base-commit: f4d51dffc6c01a9e94650d95ce0104964f8ae822
--
2.25.0.rc1.19.g042ed3e048af -
dev_pm_opp_of_remove_table() doesn't report any errors when it fails to
find the OPP table with error -ENODEV (i.e. OPP table not present for
the device). And we can call dev_pm_opp_of_remove_table()
unconditionally here.While at it, create a new label and put clkname on errors.
Signed-off-by: Viresh Kumar
Link: https://lore.kernel.org/r/b77aa0bbe82a580508e321a34da488b4b27966d0.1598594714.git.viresh.kumar@linaro.org
Signed-off-by: Mark Brown -
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and the error value gets printed.Signed-off-by: Krzysztof Kozlowski
Link: https://lore.kernel.org/r/20200901152713.18629-7-krzk@kernel.org
Signed-off-by: Mark Brown
14 Jul, 2020
3 commits
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In commit cff80645d6d3 ("spi: spi-qcom-qspi: Add interconnect support")
the spi_geni_runtime_suspend() and spi_geni_runtime_resume()
became a bit slower. Measuring on my hardware I see numbers in the
hundreds of microseconds now.Let's use autosuspend to help avoid some of the overhead. Now if
we're doing a bunch of transfers we won't need to be constantly
chruning.The number 250 ms for the autosuspend delay was picked a bit
arbitrarily, so if someone has measurements showing a better value we
could easily change this.Fixes: cff80645d6d3 ("spi: spi-qcom-qspi: Add interconnect support")
Signed-off-by: Douglas Anderson
Acked-by: Mark Brown
Reviewed-by: Rajendra Nayak
Tested-by: Rajendra Nayak
Reviewed-by: Mukesh Kumar Savaliya
Reviewed-by: Akash Asthana
Link: https://lore.kernel.org/r/20200709075113.v2.2.I3c56d655737c89bd9b766567a04b0854db1a4152@changeid
Signed-off-by: Bjorn Andersson -
As per recent changes to the spi-qcom-qspi, now when we set the clock
we'll call into the interconnect framework and also call the OPP API.
Those are expensive operations. Let's avoid calling them if possible.
This has a big impact on getting transfer rates back up to where they
were (or maybe slightly better) before those patches landed.Fixes: cff80645d6d3 ("spi: spi-qcom-qspi: Add interconnect support")
Signed-off-by: Douglas Anderson
Acked-by: Mark Brown
Reviewed-by: Rajendra Nayak
Tested-by: Rajendra Nayak
Reviewed-by: Mukesh Kumar Savaliya
Reviewed-by: Akash Asthana
Link: https://lore.kernel.org/r/20200709075113.v2.1.Ia7cb4f41ce93d37d0a764b47c8a453ce9e9c70ef@changeid
Signed-off-by: Bjorn Andersson -
QSPI needs to vote on a performance state of a power domain depending on
the clock rate. Add support for it by specifying the perf state/clock rate
as an OPP table in device tree.Signed-off-by: Rajendra Nayak
Reviewed-by: Matthias Kaehlcke
Acked-by: Mark Brown
Cc: Alok Chauhan
Cc: Akash Asthana
Cc: linux-spi@vger.kernel.org
Link: https://lore.kernel.org/r/1593769293-6354-2-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson
25 Jun, 2020
1 commit
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Get the interconnect paths for QSPI device and vote according to the
current bus speed of the driver.Acked-by: Mark Brown
Signed-off-by: Akash Asthana
Reviewed-by: Matthias Kaehlcke
Link: https://lore.kernel.org/r/1592908737-7068-8-git-send-email-akashast@codeaurora.org
Signed-off-by: Bjorn Andersson
13 Jan, 2020
1 commit
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Currrently the memory for the clk_bulk_data of the QSPI controller
is allocated with spi_alloc_master(). The bulk data pointer is passed
to devm_clk_bulk_get() which saves it in clk_bulk_devres->clks. When
the device is removed later devm_clk_bulk_release() is called and
uses the bulk data referenced by the pointer to release the clocks.
For this driver this results in accessing memory that has already
been freed, since the memory allocated with spi_alloc_master() is
released by spi_controller_release(), which is called before the
managed resources are released.Use device managed memory for the clock bulk data to fix the issue
described above.Signed-off-by: Matthias Kaehlcke
Reviewed-by: Douglas Anderson
Link: https://lore.kernel.org/r/20200108133948.1.I35ceb4db3ad8cfab78f7cd51494aeff4891339f5@changeid
Signed-off-by: Mark Brown
05 Sep, 2019
1 commit
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Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.Reported-by: Hulk Robot
Signed-off-by: YueHaibing
Link: https://lore.kernel.org/r/20190904135918.25352-24-yuehaibing@huawei.com
Signed-off-by: Mark Brown
02 Aug, 2019
1 commit
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We don't need dev_err() messages when platform_get_irq() fails now that
platform_get_irq() prints an error message itself when something goes
wrong. Let's remove these prints with a simple semantic patch.//
@@
expression ret;
struct platform_device *E;
@@ret =
(
platform_get_irq(E, ...)
|
platform_get_irq_byname(E, ...)
);if ( \( ret < 0 \| ret
While we're here, remove braces on if statements that only have one
statement (manually).Cc: Mark Brown
Cc: linux-spi@vger.kernel.org
Cc: Greg Kroah-Hartman
Signed-off-by: Stephen Boyd
Link: https://lore.kernel.org/r/20190730181557.90391-42-swboyd@chromium.org
Signed-off-by: Mark Brown
22 Nov, 2018
1 commit
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Address remaining comments from original driver patch series
* Move RD_FIFO_CFG to be ordered corretly
* Expand spinlock commentSigned-off-by: Ryan Case
Reviewed-by: Stephen Boyd
Reviewed-by: Douglas Anderson
Signed-off-by: Mark Brown
11 Oct, 2018
1 commit
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New driver for Qualcomm QuadSPI(QSPI) controller that is used to
communicate with slaves such as flash memory devices. The QSPI controller
can operate in 2 or 4 wire mode but only supports SPI Mode 0. The
controller can also operate in Single or Dual data rate modes.Signed-off-by: Girish Mahadevan
Signed-off-by: Ryan Case
Reviewed-by: Douglas Anderson
Reviewed-by: Stephen Boyd
Signed-off-by: Mark Brown
