18 Sep, 2020

1 commit

  • Ampere Altra SOC supports only 32-bit ECAM reads. Add an MCFG quirk for
    the platform.

    Link: https://lore.kernel.org/r/1596751055-12316-1-git-send-email-tuanphan@os.amperecomputing.com
    Signed-off-by: Tuan Phan
    Signed-off-by: Bjorn Helgaas

    Tuan Phan
     

07 May, 2020

1 commit

  • Most ECAM host drivers are just different pci_ecam_ops which can be DT
    match table data. That's already the case in some cases, but let's
    do that for all the ECAM drivers. Then we can use
    of_device_get_match_data() in pci_host_common_probe() and eliminate the
    probe wrapper functions and use pci_host_common_probe() directly for
    probe.

    Link: https://lore.kernel.org/r/20200409234923.21598-4-robh@kernel.org
    Signed-off-by: Rob Herring
    Signed-off-by: Lorenzo Pieralisi
    Acked-by: Bjorn Helgaas
    Cc: Zhou Wang
    Cc: Lorenzo Pieralisi
    Cc: Andrew Murray
    Cc: Bjorn Helgaas
    Cc: Will Deacon
    Cc: Robert Richter
    Cc: Marc Gonzalez
    Cc: Mans Rullgard
    Cc: linux-pci@vger.kernel.org
    Cc: linux-arm-kernel@lists.infradead.org

    Rob Herring
     

01 May, 2020

2 commits

  • Enable building host-generic and its host-common dependency as a
    module.

    Link: https://lore.kernel.org/r/20200409234923.21598-3-robh@kernel.org
    Signed-off-by: Rob Herring
    Signed-off-by: Lorenzo Pieralisi
    Acked-by: Will Deacon
    Acked-by: Bjorn Helgaas
    Cc: Lorenzo Pieralisi
    Cc: Andrew Murray
    Cc: Bjorn Helgaas
    Cc: Will Deacon
    Cc: linux-pci@vger.kernel.org
    Cc: linux-arm-kernel@lists.infradead.org

    Rob Herring
     
  • struct pci_ecam_ops is typically DT match table data which is defined to
    be const. It's also best practice for ops structs to be const. Ideally,
    we'd make struct pci_ops const as well, but that becomes pretty
    invasive, so for now we just cast it where needed.

    Link: https://lore.kernel.org/r/20200409234923.21598-2-robh@kernel.org
    Signed-off-by: Rob Herring
    Signed-off-by: Lorenzo Pieralisi
    Acked-by: Bjorn Helgaas
    Acked-by: Catalin Marinas
    Cc: Catalin Marinas
    Cc: Will Deacon
    Cc: Lorenzo Pieralisi
    Cc: Andrew Murray
    Cc: Bjorn Helgaas
    Cc: "Rafael J. Wysocki"
    Cc: Len Brown
    Cc: Jonathan Chocron
    Cc: Zhou Wang
    Cc: Robert Richter
    Cc: Toan Le
    Cc: Marc Gonzalez
    Cc: Mans Rullgard
    Cc: linux-acpi@vger.kernel.org

    Rob Herring
     

26 Apr, 2019

1 commit

  • Add driver for Amazon's Annapurna Labs PCIe host controller. The
    controller is based on DesignWare's IP.

    The controller doesn't support accessing the Root Port's config space via
    ECAM, so we obtain its base address via an AMZN0001 device.

    Furthermore, the DesignWare PCIe controller doesn't filter out config
    transactions sent to devices 1 and up on its bus, so they are filtered by
    the driver.

    All subordinate buses do support ECAM access.

    Implementing specific PCI config access functions involves:
    - Adding an init function to obtain the Root Port's base address from
    an AMZN0001 device.
    - Adding a new entry in the MCFG quirk array.

    [bhelgaas: Note that there is no Kconfig option for this driver because it
    is only intended for use with the generic ACPI host bridge driver. This
    driver is only needed because the DesignWare IP doesn't completely support
    ECAM access to the root bus.]

    Link: https://lore.kernel.org/lkml/1553774276-24675-1-git-send-email-jonnyc@amazon.com
    Co-developed-by: Vladimir Aerov
    Signed-off-by: Jonathan Chocron
    Signed-off-by: Vladimir Aerov
    Signed-off-by: Bjorn Helgaas
    Reviewed-by: David Woodhouse
    Reviewed-by: Benjamin Herrenschmidt
    Acked-by: Lorenzo Pieralisi

    Jonathan Chocron
     

31 May, 2018

1 commit


29 Jan, 2018

1 commit

  • Add SPDX GPL-2.0 to all PCI files that specified the GPL version 2 license.

    Remove the boilerplate GPL version 2 language, relying on the assertion in
    b24413180f56 ("License cleanup: add SPDX GPL-2.0 license identifier to
    files with no license") that the SPDX identifier may be used instead of the
    full boilerplate text.

    Signed-off-by: Bjorn Helgaas
    Reviewed-by: Greg Kroah-Hartman

    Bjorn Helgaas
     

19 Apr, 2017

1 commit

  • pci_host_common_probe() is defined when CONFIG_PCI_HOST_COMMON=y;
    therefore the function declaration should match that.

    drivers/pci/host/pcie-tango.c:300:9: error:
    implicit declaration of function 'pci_host_common_probe'

    Signed-off-by: Marc Gonzalez
    Signed-off-by: Bjorn Helgaas

    Marc Gonzalez
     

23 Mar, 2017

1 commit


07 Dec, 2016

5 commits

  • PCIe controllers in X-Gene SoCs are not ECAM compliant: software needs to
    configure additional controller's register to address device at
    bus:dev:function.

    Add a quirk to discover controller MMIO register space and configure
    controller registers to select and address the target secondary device.

    The quirk will only be applied for X-Gene PCIe MCFG table with
    OEM revison 1, 2, 3 or 4 (PCIe controller v1 and v2 on X-Gene SoCs).

    Tested-by: Jon Masters
    Signed-off-by: Duc Dang
    Signed-off-by: Bjorn Helgaas

    Duc Dang
     
  • ThunderX pass1.x requires to emulate the EA headers for on-chip devices
    hence it has to use custom pci_thunder_ecam_ops for accessing PCI config
    space (pci-thunder-ecam.c). Add new entries to MCFG quirk array where it
    can be applied while probing ACPI based PCI host controller.

    ThunderX pass1.x is using the same way for accessing off-chip devices
    (so-called PEM) as silicon pass-2.x so we need to add PEM quirk entries
    too.

    Quirk is considered for ThunderX silicon pass1.x only which is identified
    via MCFG revision 2.

    ThunderX pass 1.x requires the following accessors:

    NUMA node 0 PCI segments 0- 3: pci_thunder_ecam_ops (MCFG quirk)
    NUMA node 0 PCI segments 4- 9: thunder_pem_ecam_ops (MCFG quirk)
    NUMA node 1 PCI segments 10-13: pci_thunder_ecam_ops (MCFG quirk)
    NUMA node 1 PCI segments 14-19: thunder_pem_ecam_ops (MCFG quirk)

    [bhelgaas: change Makefile/ifdefs so quirk doesn't depend on
    CONFIG_PCI_HOST_THUNDER_ECAM]
    Signed-off-by: Tomasz Nowicki
    Signed-off-by: Bjorn Helgaas

    Tomasz Nowicki
     
  • ThunderX PCIe controller to off-chip devices (so-called PEM) is not fully
    compliant with ECAM standard. It uses non-standard configuration space
    accessors (see thunder_pem_ecam_ops) and custom configuration space
    granulation (see bus_shift = 24). In order to access configuration space
    and probe PEM as ACPI-based PCI host controller we need to add MCFG quirk
    infrastructure. This involves:
    1. A new thunder_pem_acpi_init() init function to locate PEM-specific
    register ranges using ACPI.
    2. Export PEM thunder_pem_ecam_ops structure so it is visible to MCFG quirk
    code.
    3. New quirk entries for each PEM segment. Each contains platform IDs,
    mentioned thunder_pem_ecam_ops and CFG resources.

    Quirk is considered for ThunderX silicon pass2.x only which is identified
    via MCFG revision 1.

    ThunderX pass 2.x requires the following accessors:

    NUMA Node 0 PCI segments 0- 3: pci_generic_ecam_ops (ECAM-compliant)
    NUMA Node 0 PCI segments 4- 9: thunder_pem_ecam_ops (MCFG quirk)
    NUMA Node 1 PCI segments 10-13: pci_generic_ecam_ops (ECAM-compliant)
    NUMA Node 1 PCI segments 14-19: thunder_pem_ecam_ops (MCFG quirk)

    [bhelgaas: adapt to use acpi_get_rc_resources(), update Makefile/ifdefs so
    quirk doesn't depend on CONFIG_PCI_HOST_THUNDER_PEM]
    Signed-off-by: Tomasz Nowicki
    Signed-off-by: Bjorn Helgaas

    Tomasz Nowicki
     
  • The PCIe controller in Hip05/Hip06/Hip07 SoCs is not completely
    ECAM-compliant. It is non-ECAM only for the RC bus config space; for any
    other bus underneath the root bus it does support ECAM access.

    Add specific quirks for PCI config space accessors. This involves:
    1. New initialization call hisi_pcie_init() to obtain RC base
    addresses from PNP0C02 at the root of the ACPI namespace (under \_SB).
    2. New entry in common quirk array.

    [bhelgaas: move to pcie-hisi.c and change Makefile/ifdefs so quirk doesn't
    depend on CONFIG_PCI_HISI]
    Signed-off-by: Dongdong Liu
    Signed-off-by: Gabriele Paoloni
    Signed-off-by: Bjorn Helgaas

    Dongdong Liu
     
  • The Qualcomm Technologies QDF2432 SoC does not support accesses smaller
    than 32 bits to the PCI configuration space. Register the appropriate
    quirk.

    [bhelgaas: add QCOM_ECAM32 macro, ifdef for ACPI and PCI_QUIRKS]
    Signed-off-by: Christopher Covington
    Signed-off-by: Bjorn Helgaas

    Christopher Covington
     

11 Jun, 2016

2 commits

  • Add a parent device field to struct pci_config_window. The parent is not
    saved now, but will be useful to save it in some cases. For ACPI on ARM64,
    it can be used to setup ACPI companion and domain.

    Since the parent dev is in struct pci_config_window now, we need not pass
    it to the init function as a separate argument.

    Signed-off-by: Jayachandran C
    Signed-off-by: Bjorn Helgaas
    Acked-by: Lorenzo Pieralisi

    Jayachandran C
     
  • This header will be used from arch/arm64 for ACPI PCI implementation so it
    needs to be moved out of drivers/pci.

    Update users of the header file to use the new name. No functional
    changes.

    Signed-off-by: Jayachandran C
    Signed-off-by: Bjorn Helgaas
    Acked-by: Lorenzo Pieralisi

    Jayachandran C