09 Nov, 2014
2 commits
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Use io{read,write}32be if the caller specified IRQ_GC_BE_IO when creating
the irqchip.Signed-off-by: Kevin Cernekee
Acked-by: Thomas Gleixner
Acked-by: Acked-by: Arnd Bergmann
Link: https://lkml.kernel.org/r/1415342669-30640-5-git-send-email-cernekee@gmail.com
Signed-off-by: Jason Cooper -
Pass in the irq_chip_generic struct so we can use different readl/writel
settings for each irqchip driver, when appropriate. Compute
(gc->reg_base + reg_offset) in the helper function because this is pretty
much what all callers want to do anyway.Compile-tested using the following configurations:
at91_dt_defconfig (CONFIG_ATMEL_AIC_IRQ=y)
sama5_defconfig (CONFIG_ATMEL_AIC5_IRQ=y)
sunxi_defconfig (CONFIG_ARCH_SUNXI=y)tb10x (ARC) is untested.
Signed-off-by: Kevin Cernekee
Acked-by: Thomas Gleixner
Acked-by: Acked-by: Arnd Bergmann
Link: https://lkml.kernel.org/r/1415342669-30640-3-git-send-email-cernekee@gmail.com
Signed-off-by: Jason Cooper
17 Jul, 2014
1 commit
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Export the generic irq map function in order to provide irq_domain ops with
generic mapping and specific of xlate function (needed by the new atmel
AIC driver).Signed-off-by: Boris BREZILLON
Acked-by: Thomas Gleixner
Link: https://lkml.kernel.org/r/1405012462-766-2-git-send-email-boris.brezillon@free-electrons.com
Signed-off-by: Jason Cooper
14 Jul, 2013
1 commit
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Pull irq updates from Thomas Gleixner:
- core fix for missing round up in the generic irq chip implementation
- new irq chip for MOXA SoCs
- a few fixes and cleanups in the irqchip drivers* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
irqchip: Add support for MOXA ART SoCs
genirq: generic chip: Use DIV_ROUND_UP to calculate numchips
irqchip: nvic: Fix wrong num_ct argument for irq_alloc_domain_generic_chips()
irqchip: sun4i: Staticize sun4i_irq_ack()
irqchip: vt8500: Staticize local symbols
07 Jul, 2013
1 commit
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Pull irqdomain refactoring from Grant Likely:
"This is the long awaited simplification of irqdomain. It gets rid of
the different types of irq domains and instead both linear and tree
mappings can be supported in a single domain. Doing this removes a
lot of special case code and makes irq domains simpler to understand
overall"* tag 'irqdomain-for-linus' of git://git.secretlab.ca/git/linux:
irq: fix checkpatch error
irqdomain: Include hwirq number in /proc/interrupts
irqdomain: make irq_linear_revmap() a fast path again
irqdomain: remove irq_domain_generate_simple()
irqdomain: Refactor irq_domain_associate_many()
irqdomain: Beef up debugfs output
irqdomain: Clean up aftermath of irq_domain refactoring
irqdomain: Eliminate revmap type
irqdomain: merge linear and tree reverse mappings.
irqdomain: Add a name field
irqdomain: Replace LEGACY mapping with LINEAR
irqdomain: Relax failure path on setting up mappings
05 Jul, 2013
2 commits
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The number of interrupts in a domain may be not divisible by the
number of interrupts each chip handles. Integer division may truncate
the result, thus use DIV_ROUND_UP to count numchips.Seems all users of irq_alloc_domain_generic_chips() in current code do
not have this issue. I just found the issue while reading the code.Signed-off-by: Axel Lin
Cc: Grant Likely
Cc: Tony Lindgren
Cc: Arnd Bergmann
Link: http://lkml.kernel.org/r/1373015592.18252.2.camel@phoenix
Signed-off-by: Thomas Gleixner -
Pull trivial tree updates from Jiri Kosina:
"The usual stuff from trivial tree"* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (34 commits)
treewide: relase -> release
Documentation/cgroups/memory.txt: fix stat file documentation
sysctl/net.txt: delete reference to obsolete 2.4.x kernel
spinlock_api_smp.h: fix preprocessor comments
treewide: Fix typo in printk
doc: device tree: clarify stuff in usage-model.txt.
open firmware: "/aliasas" -> "/aliases"
md: bcache: Fixed a typo with the word 'arithmetic'
irq/generic-chip: fix a few kernel-doc entries
frv: Convert use of typedef ctl_table to struct ctl_table
sgi: xpc: Convert use of typedef ctl_table to struct ctl_table
doc: clk: Fix incorrect wording
Documentation/arm/IXP4xx fix a typo
Documentation/networking/ieee802154 fix a typo
Documentation/DocBook/media/v4l fix a typo
Documentation/video4linux/si476x.txt fix a typo
Documentation/virtual/kvm/api.txt fix a typo
Documentation/early-userspace/README fix a typo
Documentation/video4linux/soc-camera.txt fix a typo
lguest: fix CONFIG_PAE -> CONFIG_x86_PAE in comment
...
28 Jun, 2013
2 commits
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Signed-off-by: Thomas Gleixner
Cc: Randy Dunlap -
When building imx_v6_v7_defconfig with imx-drm drivers selected as
modules, we get the following build errors:ERROR: "irq_gc_mask_clr_bit" [drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.ko] undefined!
ERROR: "irq_gc_mask_set_bit" [drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.ko] undefined!
ERROR: "irq_gc_ack_set_bit" [drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.ko] undefined!Export the required functions to avoid this problem.
Signed-off-by: Fabio Estevam
Cc: shawn.guo@linaro.org
Cc: kernel@pengutronix.de
Link: http://lkml.kernel.org/r/1372389789-7048-1-git-send-email-festevam@gmail.com
Signed-off-by: Thomas Gleixner
24 Jun, 2013
1 commit
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Commit 088f40b7b027dad6519712ff224a5798dd62a204 ("genirq: Generic chip:
Add linear irq domain support") missed kerneldoc for the gcflags
argument of irq_alloc_domain_generic_chips(). Add it now.Signed-off-by: James Hogan
Acked-by: Grant Likely
Link: http://lkml.kernel.org/r/1371564513-4327-1-git-send-email-james.hogan@imgtec.com
Signed-off-by: Thomas Gleixner
18 Jun, 2013
1 commit
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Signed-off-by: Uwe Kleine-König
Signed-off-by: Jiri Kosina
10 Jun, 2013
2 commits
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The NOMAP irq_domain type is only used by a handful of interrupt
controllers and it unnecessarily complicates the code by adding special
cases on how to look up mappings and different revmap functions are used
for each type which need to validate the correct type is passed to it
before performing the reverse map. Eliminating the revmap_type and
making a single reverse mapping function simplifies the code. It also
shouldn't be any slower than having separate revmap functions because
the type of the revmap needed to be checked anyway.The linear and tree revmap types were already merged in a previous
patch. This patch rolls the NOMAP or direct mapping behaviour into the
same domain code making is possible for an irq domain to do any mapping
type; linear, tree or direct; and that the mapping will be transparent
to the interrupt controller driver.With this change, direct mappings will get stored in the linear or tree
mapping for consistency. Reverse mapping from the hwirq to virq will go
through the normal lookup process. However, any controller using a
direct mapping can take advantage of knowing that hwirq==virq for any
mapped interrupts skip doing a revmap lookup when handling IRQs.Signed-off-by: Grant Likely
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This patch adds a name field to the irq_domain structure to help mere
mortals understand the mappings between irq domains and virqs. It also
converts a number of places that have open-coded some kind of fudging
an irqdomain name to use the new field. This means a more consistent
display of names in irq domain log messages and debugfs output.Signed-off-by: Grant Likely
29 May, 2013
8 commits
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Some controllers have irqs that aren't wired up and must never be used.
For the generic chip attached to an irq_domain this provides a mask that
can be used to block out particular irqs so that they never get mapped.Signed-off-by: Grant Likely
Link: http://lkml.kernel.org/r/1369793454-19197-2-git-send-email-grant.likely@linaro.org
Signed-off-by: Thomas Gleixner -
Provide infrastructure for irq chip implementations which work on
linear irq domains.- Interface to allocate multiple generic chips which are associated to
the irq domain.- Interface to get the generic chip pointer for a particular hardware
interrupt in the domain.- irq domain mapping function to install the chip for a particular
interrupt.Note: This lacks a removal function for now.
[ Sebastian Hesselbarth: Mask cache and pointer math fixups ]
Signed-off-by: Thomas Gleixner
Cc: Thomas Petazzoni
Cc: Andrew Lunn
Cc: Russell King - ARM Linux
Cc: Jason Cooper
Cc: Arnd Bergmann
Cc: Jean-Francois Moine
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Rob Herring
Cc: Jason Gunthorpe
Cc: Gregory Clement
Cc: Gerlando Falauto
Cc: Rob Landley
Acked-by: Grant Likely
Cc: Maxime Ripard
Cc: Ezequiel Garcia
Cc: linux-arm-kernel@lists.infradead.org
Cc: Sebastian Hesselbarth
Link: http://lkml.kernel.org/r/20130506142539.450634298@linutronix.de
Signed-off-by: Thomas Gleixner -
Preparatory patch for linear interrupt domains.
Signed-off-by: Thomas Gleixner
Cc: Thomas Petazzoni
Cc: Andrew Lunn
Cc: Russell King - ARM Linux
Cc: Jason Cooper
Cc: Arnd Bergmann
Cc: Jean-Francois Moine
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Rob Herring
Cc: Jason Gunthorpe
Cc: Gregory Clement
Cc: Gerlando Falauto
Cc: Rob Landley
Acked-by: Grant Likely
Cc: Maxime Ripard
Cc: Ezequiel Garcia
Cc: linux-arm-kernel@lists.infradead.org
Cc: Sebastian Hesselbarth
Link: http://lkml.kernel.org/r/20130506142539.377017672@linutronix.de
Signed-off-by: Thomas Gleixner -
Some chips have weird bit mask access patterns instead of the linear
you expect. Allow them to calculate the cached mask themself.Signed-off-by: Thomas Gleixner
Cc: Thomas Petazzoni
Cc: Andrew Lunn
Cc: Russell King - ARM Linux
Cc: Jason Cooper
Cc: Arnd Bergmann
Cc: Jean-Francois Moine
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Rob Herring
Cc: Jason Gunthorpe
Cc: Gregory Clement
Cc: Gerlando Falauto
Cc: Rob Landley
Acked-by: Grant Likely
Cc: Maxime Ripard
Cc: Ezequiel Garcia
Cc: linux-arm-kernel@lists.infradead.org
Cc: Sebastian Hesselbarth
Link: http://lkml.kernel.org/r/20130506142539.302898834@linutronix.de
Signed-off-by: Thomas Gleixner -
Cache the per irq bit mask instead of recalculating it over and over.
Signed-off-by: Thomas Gleixner
Cc: Thomas Petazzoni
Cc: Andrew Lunn
Cc: Russell King - ARM Linux
Cc: Jason Cooper
Cc: Arnd Bergmann
Cc: Jean-Francois Moine
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Rob Herring
Cc: Jason Gunthorpe
Cc: Gregory Clement
Cc: Gerlando Falauto
Cc: Rob Landley
Acked-by: Grant Likely
Cc: Maxime Ripard
Cc: Ezequiel Garcia
Cc: linux-arm-kernel@lists.infradead.org
Cc: Sebastian Hesselbarth
Link: http://lkml.kernel.org/r/20130506142539.227119865@linutronix.de
Signed-off-by: Thomas Gleixner -
There are cases where all irq_chip_type instances have separate mask
registers, making a shared mask register cache unsuitable for the
purpose.Introduce a new flag IRQ_GC_MASK_CACHE_PER_TYPE. If set, point the per
chip mask pointer to the per chip private mask cache instead.[ tglx: Simplified code, renamed flag and massaged changelog ]
Signed-off-by: Gerlando Falauto
Cc: Andrew Lunn
Cc: Joey Oravec
Cc: Lennert Buytenhek
Cc: Russell King - ARM Linux
Cc: Jason Gunthorpe
Cc: Holger Brunck
Cc: Ezequiel Garcia
Acked-by: Grant Likely
Cc: Sebastian Hesselbarth
Cc: Jason Cooper
Cc: Arnd Bergmann
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Rob Herring
Cc: Ben Dooks
Cc: Gregory Clement
Cc: Simon Guinot
Cc: linux-arm-kernel@lists.infradead.org
Cc: Thomas Petazzoni
Cc: Jean-Francois Moine
Cc: Nicolas Pitre
Cc: Rob Landley
Cc: Maxime Ripard
Link: http://lkml.kernel.org/r/20130506142539.152569748@linutronix.de
Signed-off-by: Thomas Gleixner -
Today the same interrupt mask cache (stored within struct irq_chip_generic)
is shared between all the irq_chip_type instances. As there are instances
where each irq_chip_type uses a distinct mask register (as it is the case
for Orion SoCs), sharing a single mask cache may be incorrect.
So add a distinct pointer for each irq_chip_type, which for now
points to the original mask register within irq_chip_generic.
So no functional changes here.[ tglx: Minor cosmetic tweaks ]
Reported-by: Joey Oravec
Signed-off-by: Simon Guinot
Signed-off-by: Holger Brunck
Signed-off-by: Gerlando Falauto
Cc: Andrew Lunn
Cc: Lennert Buytenhek
Cc: Russell King - ARM Linux
Cc: Jason Gunthorpe
Cc: Holger Brunck
Cc: Ezequiel Garcia
Acked-by: Grant Likely
Cc: Sebastian Hesselbarth
Cc: Jason Cooper
Cc: Arnd Bergmann
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Rob Herring
Cc: Ben Dooks
Cc: Gregory Clement
Cc: Simon Guinot
Cc: linux-arm-kernel@lists.infradead.org
Cc: Thomas Petazzoni
Cc: Jean-Francois Moine
Cc: Nicolas Pitre
Cc: Rob Landley
Cc: Maxime Ripard
Link: http://lkml.kernel.org/r/20130506142539.082226607@linutronix.de
Signed-off-by: Thomas Gleixner -
Since we already have an irq_data_get_chip_type() function which returns
a pointer to irq_chip_type, use that instead of cur_regs().Signed-off-by: Gerlando Falauto
Cc: Andrew Lunn
Cc: Joey Oravec
Cc: Lennert Buytenhek
Cc: Russell King - ARM Linux
Cc: Jason Gunthorpe
Cc: Holger Brunck
Cc: Ezequiel Garcia
Acked-by: Grant Likely
Cc: Sebastian Hesselbarth
Cc: Jason Cooper
Cc: Arnd Bergmann
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Rob Herring
Cc: Ben Dooks
Cc: Gregory Clement
Cc: Simon Guinot
Cc: linux-arm-kernel@lists.infradead.org
Cc: Thomas Petazzoni
Cc: Jean-Francois Moine
Cc: Nicolas Pitre
Cc: Rob Landley
Cc: Maxime Ripard
Link: http://lkml.kernel.org/r/20130506142539.010164766@linutronix.de
Signed-off-by: Thomas Gleixner
01 Nov, 2011
1 commit
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These files were getting via an implicit non-obvious
path, but we want to crush those out of existence since they cost
time during compiles of processing thousands of lines of headers
for no reason. Give them the lightweight header that just contains
the EXPORT_SYMBOL infrastructure.Signed-off-by: Paul Gortmaker
24 Oct, 2011
1 commit
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Some functions of irq generic-chip is undefined, because
EXPORT_SYMBOL_GPL is not set to these.ERROR: "irq_setup_generic_chip" [drivers/gpio/gpio-pch.ko] undefined!
ERROR: "irq_alloc_generic_chip" [drivers/gpio/gpio-pch.ko] undefined!
ERROR: "irq_setup_generic_chip" [drivers/gpio/gpio-ml-ioh.ko] undefined!
ERROR: "irq_alloc_generic_chip" [drivers/gpio/gpio-ml-ioh.ko] undefined!This is revised that EXPORT_SYMBOL_GPL can be added and referred
to in functions.Signed-off-by: Nobuhiro Iwamatsu
Acked-by: Thomas Gleixner
Signed-off-by: Grant Likely
26 Jul, 2011
1 commit
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(!msk & 0x01) should be !(msk & 0x01)
Signed-off-by: Jonghwan Choi
Link: http://lkml.kernel.org/r/1311229754-6003-1-git-send-email-jhbird.choi@samsung.com
Signed-off-by: Thomas Gleixner
Cc: stable@kernel.org
08 Jul, 2011
1 commit
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This fixes a regression introduced by e59347a "arm: orion:
Use generic irq chip".Depending on the device, interrupts acknowledgement is done by setting
or by clearing a dedicated register. Replace irq_gc_ack() with some
{set,clr}_bit variants allows to handle both cases.Note that this patch affects the following SoCs: Davinci, Samsung and
Orion. Except for this last, the change is minor: irq_gc_ack() is just
renamed into irq_gc_ack_set_bit().For the Orion SoCs, the edge GPIO interrupts support is currently
broken. irq_gc_ack() try to acknowledge a such interrupt by setting
the corresponding cause register bit. The Orion GPIO device expect the
opposite. To fix this issue, the irq_gc_ack_clr_bit() variant is used.Tested on Network Space v2.
Reported-by: Joey Oravec
Signed-off-by: Simon Guinot
Signed-off-by: Arnd Bergmann
23 Apr, 2011
2 commits
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These callbacks are only called in the syscore suspend/resume code on
interrupt chips which have been registered via the generic irq chip
mechanism. Calling those callbacks per irq would be rather icky, but
with the generic irq chip mechanism we can call this per registered
chip.Signed-off-by: Thomas Gleixner
Cc: linux-arm-kernel@lists.infradead.org -
Implement a generic interrupt chip, which is configurable and is able
to handle the most common irq chip implementations.Signed-off-by: Thomas Gleixner
Cc: linux-arm-kernel@lists.infradead.org
Tested-by: H Hartley Sweeten
Tested-by: Tony Lindgren
Tested-by; Kevin Hilman