18 Jul, 2019

1 commit

  • Pull dmaengine updates from Vinod Koul:

    - Add support in dmaengine core to do device node checks for DT devices
    and update bunch of drivers to use that and remove open coding from
    drivers

    - New driver/driver support for new hardware, namely:
    - MediaTek UART APDMA
    - Freescale i.mx7ulp edma2
    - Synopsys eDMA IP core version 0
    - Allwinner H6 DMA

    - Updates to axi-dma and support for interleaved cyclic transfers

    - Greg's debugfs return value check removals on drivers

    - Updates to stm32-dma, hsu, dw, pl330, tegra drivers

    * tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (68 commits)
    dmaengine: Revert "dmaengine: fsl-edma: add i.mx7ulp edma2 version support"
    dmaengine: at_xdmac: check for non-empty xfers_list before invoking callback
    Documentation: dmaengine: clean up description of dmatest usage
    dmaengine: tegra210-adma: remove PM_CLK dependency
    dmaengine: fsl-edma: add i.mx7ulp edma2 version support
    dt-bindings: dma: fsl-edma: add new i.mx7ulp-edma
    dmaengine: fsl-edma-common: version check for v2 instead
    dmaengine: fsl-edma-common: move dmamux register to another single function
    dmaengine: fsl-edma: add drvdata for fsl-edma
    dmaengine: Revert "dmaengine: fsl-edma: support little endian for edma driver"
    dmaengine: rcar-dmac: Reject zero-length slave DMA requests
    dmaengine: dw: Enable iDMA 32-bit on Intel Elkhart Lake
    dmaengine: dw-edma: fix semicolon.cocci warnings
    dmaengine: sh: usb-dmac: Use [] to denote a flexible array member
    dmaengine: dmatest: timeout value of -1 should specify infinite wait
    dmaengine: dw: Distinguish ->remove() between DW and iDMA 32-bit
    dmaengine: fsl-edma: support little endian for edma driver
    dmaengine: hsu: Revert "set HSU_CH_MTSR to memory width"
    dmagengine: pl330: add code to get reset property
    dt-bindings: pl330: document the optional resets property
    ...

    Linus Torvalds
     

19 Jun, 2019

1 commit

  • Based on 2 normalized pattern(s):

    this program is free software you can redistribute it and or modify
    it under the terms of the gnu general public license version 2 as
    published by the free software foundation

    this program is free software you can redistribute it and or modify
    it under the terms of the gnu general public license version 2 as
    published by the free software foundation #

    extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

    has been chosen to replace the boilerplate/reference in 4122 file(s).

    Signed-off-by: Thomas Gleixner
    Reviewed-by: Enrico Weigelt
    Reviewed-by: Kate Stewart
    Reviewed-by: Allison Randal
    Cc: linux-spdx@vger.kernel.org
    Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
    Signed-off-by: Greg Kroah-Hartman

    Thomas Gleixner
     

14 Jun, 2019

1 commit

  • When calling debugfs functions, there is no need to ever check the
    return value. The function can work or not, but the code logic should
    never do something different based on this.

    Also, because there is no need to save the file dentry, remove the
    variable that was saving it as it was never even being used once set.

    Cc: Daniel Mack
    Cc: Haojian Zhuang
    Cc: Robert Jarzmik
    Cc: Vinod Koul
    Cc: Dan Williams
    Cc: linux-arm-kernel@lists.infradead.org
    Cc: dmaengine@vger.kernel.org
    Cc: linux-kernel@vger.kernel.org
    Signed-off-by: Greg Kroah-Hartman
    Signed-off-by: Vinod Koul

    Greg Kroah-Hartman
     

02 Jan, 2019

1 commit

  • Pull dmaengine updates from Vinod Koul:
    "This includes a new driver, removes R-Mobile APE6 as it is no longer
    used, sprd cyclic dma support, last batch of dma_slave_config
    direction removal and random updates to bunch of drivers.

    Summary:
    - New driver for UniPhier MIO DMA controller
    - Remove R-Mobile APE6 support
    - Sprd driver updates and support for cyclic link-list
    - Remove dma_slave_config direction usage from rest of drivers
    - Minor updates to dmatest, dw-dmac, zynqmp and bcm dma drivers"

    * tag 'dmaengine-4.21-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (48 commits)
    dmaengine: qcom_hidma: convert to DEFINE_SHOW_ATTRIBUTE
    dmaengine: pxa: remove DBGFS_FUNC_DECL()
    dmaengine: mic_x100_dma: convert to DEFINE_SHOW_ATTRIBUTE
    dmaengine: amba-pl08x: convert to DEFINE_SHOW_ATTRIBUTE
    dmaengine: Documentation: Add documentation for multi chan testing
    dmaengine: dmatest: Add transfer_size parameter
    dmaengine: dmatest: Add alignment parameter
    dmaengine: dmatest: Use fixed point div to calculate iops
    dmaengine: dmatest: Add support for multi channel testing
    dmaengine: rcar-dmac: Document R8A774C0 bindings
    dt-bindings: dmaengine: usb-dmac: Add binding for r8a774c0
    dmaengine: zynqmp_dma: replace spin_lock_bh with spin_lock_irqsave
    dmaengine: sprd: Add me as one of the module authors
    dmaengine: sprd: Support DMA 2-stage transfer mode
    dmaengine: sprd: Support DMA link-list cyclic callback
    dmaengine: sprd: Set cur_desc as NULL when free or terminate one dma channel
    dmaengine: sprd: Fix the last link-list configuration
    dmaengine: sprd: Get transfer residue depending on the transfer direction
    dmaengine: sprd: Remove direction usage from struct dma_slave_config
    dmaengine: dmatest: fix a small memory leak in dmatest_func()
    ...

    Linus Torvalds
     

17 Dec, 2018

1 commit


04 Dec, 2018

1 commit


11 Sep, 2018

1 commit


30 Aug, 2018

1 commit


19 Jun, 2018

2 commits

  • As what former drcmr -1 value meant, add a this as a default to each
    channel, ie. that by default no requestor line is used.

    This is specifically used for network drivers smc91x and smc911x, and
    needed for their port to slave maps.

    Cc: Arnd Bergmann
    Signed-off-by: Robert Jarzmik
    Acked-by: Vinod Koul

    Robert Jarzmik
     
  • In order to remove the specific knowledge of the dma mapping from PXA
    drivers, add a default slave map for pxa architectures.

    This won't impact MMP architecture, but is aimed only at all PXA boards.

    This is the first step, and once all drivers are converted,
    pxad_filter_fn() will be made static, and the DMA resources removed from
    device.c.

    Signed-off-by: Robert Jarzmik
    Reported-by: Arnd Bergmann
    Acked-by: Vinod Koul

    Robert Jarzmik
     

18 Oct, 2016

1 commit


19 Aug, 2016

2 commits

  • In a very tight timeframe, the debug message in the transfer completion
    handler can be misleading, as the completion test report can change just
    after the message, and the code flow cannot be deduced from the debug
    message.

    This is just a cleanup to make debugging easier.

    Signed-off-by: Robert Jarzmik
    Signed-off-by: Vinod Koul

    Robert Jarzmik
     
  • In the case where a descriptor is chained on a running channel, and as
    explained in the comment in the code 10 lines above, the success of the
    chaining is ensured either if :
    - the DMA is still running
    - or if the chained transfer is completed

    Unfortunately the transfer completness test was done on the descriptor
    to which the transfer was chained, and not the transfer being chained at
    the end, ie. hot-chained.

    This corner case is extremely hard to trigger, as usually the DMA chain
    is still running, and the first case takes care of returning success of
    the hot-chaining. It was seen by hot-chaining several "small transfers"
    to a running "big transfer", not in a real-life usecase but by testing
    the robustness of the driver.

    Signed-off-by: Robert Jarzmik
    Signed-off-by: Vinod Koul

    Robert Jarzmik
     

23 Jul, 2016

2 commits

  • Implement the function which wait until a dma channel is stopped to have
    a synchronization point.

    This also protects the pxad_remove() from races, such as spurious
    interrupts while removing the driver, because :
    - as long as there is one dma channel requested, ie. dma_chan_get() but
    no dma_chan_put(), the try_module_get() of dma_chan_get() prevents
    the remove() routine from running
    - when the last channel is released, ie. the last dma_chan_put() is
    called, if there is a running DMA, pxad_synchronize() is called
    - pxad_synchronize() waits for the channel to stop, which in turn
    ensures on pxa architecture that the interrupt cannot be fired anymore

    Reported-by: Vinod Koul
    Signed-off-by: Robert Jarzmik
    Signed-off-by: Vinod Koul

    Robert Jarzmik
     
  • debugfs file operations owner is set by core, so remove

    Signed-off-by: Vinod Koul
    Acked-by: Robert Jarzmik

    Vinod Koul
     

27 Apr, 2016

1 commit


26 Apr, 2016

1 commit

  • In the current state, upon bus error the driver will spin endlessly,
    relaunching the last tx, which will fail again and again :
    - a bus error happens
    - pxad_chan_handler() is called
    - as PXA_DCSR_STOPSTATE is true, the last non-terminated transaction is
    lauched, which is the one triggering the bus error, as it didn't
    terminate
    - moreover, the STOP interrupt fires a new, as the STOPIRQEN is still
    active

    Break this logic by stopping the automatic relaunch of a dma channel
    upon a bus error, even if there are still pending issued requests on it.

    As dma_cookie_status() seems unable to return DMA_ERROR in its current
    form, ie. there seems no way to mark a DMA_ERROR on a per-async-tx
    basis, it is chosen in this patch to remember on the channel which
    transaction failed, and report it in pxad_tx_status().

    It's a bit misleading because if T1, T2, T3 and T4 were queued, and T1
    was completed while T2 causes a bus error, the status of T3 and T4 will
    be reported as DMA_IN_PROGRESS, while the channel is actually stopped.

    Signed-off-by: Robert Jarzmik
    Signed-off-by: Vinod Koul

    Robert Jarzmik
     

21 Mar, 2016

1 commit

  • Pull ARM SoC platform updates from Arnd Bergmann:
    "Newly added support for additional SoCs:
    - Axis Artpec-6 SoC family
    - Allwinner A83T SoC
    - Mediatek MT7623
    - NXP i.MX6QP SoC
    - ST Microelectronics stm32f469 microcontroller

    New features:
    - SMP support for Mediatek mt2701
    - Big-endian support for NXP i.MX
    - DaVinci now uses the new DMA engine dma_slave_map
    - OMAP now uses the new DMA engine dma_slave_map
    - earlyprintk support for palmchip uart on mach-tango
    - delay timer support for orion

    Other:
    - Exynos PMU driver moved out to drivers/soc/
    - Various smaller updates for Renesas, Xilinx, PXA, AT91, OMAP,
    uniphier"

    * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
    ARM: uniphier: rework SMP code to support new System Bus binding
    ARM: uniphier: add missing of_node_put()
    ARM: at91: avoid defining CONFIG_* symbols in source code
    ARM: DRA7: hwmod: Add data for eDMA tpcc, tptc0, tptc1
    ARM: imx: Make reset_control_ops const
    ARM: imx: Do L2 errata only if the L2 cache isn't enabled
    ARM: imx: select ARM_CPU_SUSPEND only for imx6
    dmaengine: pxa_dma: fix the maximum requestor line
    ARM: alpine: select the Alpine MSI controller driver
    ARM: pxa: add the number of DMA requestor lines
    dmaengine: mmp-pdma: add number of requestors
    dma: mmp_pdma: Add the #dma-requests DT property documentation
    ARM: OMAP2+: Add rtc hwmod configuration for ti81xx
    ARM: s3c24xx: Avoid warning for inb/outb
    ARM: zynq: Move early printk virtual address to vmalloc area
    ARM: DRA7: hwmod: Add custom reset handler for PCIeSS
    ARM: SAMSUNG: Remove unused register offset definition
    ARM: EXYNOS: Cleanup header files inclusion
    drivers: soc: samsung: Enable COMPILE_TEST
    MAINTAINERS: Add maintainers entry for drivers/soc/samsung
    ...

    Linus Torvalds
     

03 Mar, 2016

1 commit

  • While testing audio with pxa2xx-ac97, underrun were happening while the
    user application was correctly feeding the music. Debug proved that the
    cyclic transfer is not cyclic, ie. the last descriptor did not loop on
    the first.

    Another issue is that the descriptor length was always set to 8192,
    because of an trivial operator issue.

    This was tested on a pxa27x platform.

    Fixes: a57e16cf0333 ("dmaengine: pxa: add pxa dmaengine driver")
    Reported-by: Vasily Khoruzhick
    Tested-by: Vasily Khoruzhick
    Signed-off-by: Robert Jarzmik
    Signed-off-by: Vinod Koul

    Robert Jarzmik
     

27 Feb, 2016

1 commit

  • The current number of requestor lines is limited to 31. This was an
    error of a previous commit, as this number is platform dependent, and is
    actually :
    - for pxa25x: 40 requestor lines
    - for pxa27x: 75 requestor lines
    - for pxa3xx: 100 requestor lines

    The previous testing did not reveal the faulty constant as on pxa[23]xx
    platforms, only camera, MSL and USB are above requestor 32, and in these
    only the camera has a driver using dma.

    Fixes: e87ffbdf0697 ("dmaengine: pxa_dma: fix the no-requestor case")
    Signed-off-by: Robert Jarzmik
    Acked-by: Vinod Koul

    Robert Jarzmik
     

16 Nov, 2015

1 commit


01 Oct, 2015

2 commits

  • A very tiny temporal window exists in the residue calculation where :
    - upon entering residue calculation, the transfer is ongoing
    - when reading the current transfer pointer, it just changed to
    the "finisher/linker" descriptor

    In this case, the residue returned is the whole transfer length instead
    of 0. Fix it.

    This appears almost in one extreme case, where the driver is used
    by older clients which inquire for residue in interrupt context, such
    as the smsc91x ethernet driver, in a tight loop :
    interrupt_handler()
    dmaengine_submit()
    do {
    dmaengine_tx_status()
    } while (residue > 0 || status != DMA_ERROR)

    Signed-off-by: Robert Jarzmik
    Signed-off-by: Vinod Koul

    Robert Jarzmik
     
  • A very small number of devices don't use the flow control offered by
    requestor lines. In these specific cases, the pxa dma driver should be
    aware of that and not try to use a requestor line.

    Signed-off-by: Robert Jarzmik
    Signed-off-by: Vinod Koul

    Robert Jarzmik
     

25 Sep, 2015

1 commit

  • Since the commit to have an allocated list of virtual descriptors was
    reverted, the pxa_dma driver is broken, as it assumes the descriptor is
    placed on the allocated list upon allocation.

    Fix the issue in pxa_dma by making an allocated virtual descriptor a
    singleton.

    Fixes: 8c8fe97b2b8a ("Revert "dmaengine: virt-dma: don't always free descriptor upon completion"")
    Signed-off-by: Robert Jarzmik
    Signed-off-by: Vinod Koul

    Robert Jarzmik
     

19 Aug, 2015

1 commit

  • This fixes the following error:
    drivers/dma/pxa_dma.c: In function ‘dbg_show_requester_chan’:
    drivers/dma/pxa_dma.c:192:2: error: void value not ignored as it ought to be
    pos += seq_printf(s, "DMA channel %d requester :\n", phy->idx);
    ^
    drivers/dma/pxa_dma.c:197:8: error: void value not ignored as it ought to be
    !!(drcmr & DRCMR_MAPVLD));
    ^
    scripts/Makefile.build:258: recipe for target 'drivers/dma/pxa_dma.o' failed

    Signed-off-by: Robert Jarzmik
    Signed-off-by: Vinod Koul

    Robert Jarzmik
     

17 Aug, 2015

1 commit


29 May, 2015

1 commit

  • In order to achieve smooth transition of pxa drivers from old legacy dma
    handling to new dmaengine, introduce a function to "hide" dma physical
    channels from dmaengine.

    This is temporary situation where pxa dma will be handled in 2 places :
    - arch/arm/plat-pxa/dma.c
    - drivers/dma/pxa_dma.c

    The resources, ie. dma channels, will be controlled by pxa_dma. The
    legacy code will request or release a channel with
    pxad_toggle_reserved_channel().

    This is not very pretty, but it ensures both legacy and dmaengine
    consumers can live in the same kernel until the conversion is done.

    Signed-off-by: Robert Jarzmik
    Acked-by: Arnd Bergmann
    Signed-off-by: Vinod Koul

    Robert Jarzmik
     

26 May, 2015

2 commits

  • Reuse the debugging features which were available in pxa architecture.
    This is a copy of the code from arch/arm/plat-pxa/dma, which is doomed
    to disappear once the conversion is completed towards dmaengine.

    This is a transfer of the commit "[ARM] pxa/dma: add debugfs
    entries" (d294948c2ce4e1c85f452154469752cc9b8e876d).

    Signed-off-by: Robert Jarzmik
    Signed-off-by: Vinod Koul

    Robert Jarzmik
     
  • This is a new driver for pxa SoCs, which is also compatible with the former
    mmp_pdma.

    The rationale behind a new driver (as opposed to incremental patching) was :

    - the new driver relies on virt-dma, which obsoletes all the internal
    structures of mmp_pdma (sw_desc, hw_desc, ...), and by consequence all the
    functions

    - mmp_pdma allocates dma coherent descriptors containing not only hardware
    descriptors but linked list information
    The new driver only puts the dma hardware descriptors (ie. 4 u32) into the
    dma pool allocated memory. This changes completely the way descriptors are
    handled

    - the architecture behind the interrupt/tasklet management was rewritten to be
    more conforming to virt-dma

    - the buffers alignment is handled differently
    The former driver assumed that the DMA channel stopped between each
    descriptor. The new one chains descriptors to let the channel running. This
    is a necessary guarantee for real-time high bandwidth usecases such as video
    capture on "old" architectures such as pxa.

    - hot chaining / cold chaining / no chaining
    Whenever possible, submitting a descriptor "hot chains" it to a running
    channel. There is still no guarantee that the descriptor will be issued, as
    the channel might be stopped just before the descriptor is submitted. Yet
    this allows to submit several video buffers, and resubmit a buffer while
    another is under handling.
    As before, dma_async_issue_pending() is the only guarantee to have all the
    buffers issued.
    When an alignment issue is detected (ie. one address in a descriptor is not
    a multiple of 8), if the already running channel is in "aligned mode", the
    channel will stop, and restarted in "misaligned mode" to finished the issued
    list.

    - descriptors reusing
    A submitted, issued and completed descriptor can be reused, ie resubmitted if
    it was prepared with the proper flag (DMA_PREP_ACK). Only a channel
    resources release will in this case release that buffer.
    This allows a rolling ring of buffers to be reused, where there are several
    thousands of hardware descriptors used (video buffer for example).

    Additionally, a set of more casual features is introduced :
    - debugging traces
    - lockless way to know if a descriptor is terminated or not

    The driver was tested on zylonite board (pxa3xx) and mioa701 (pxa27x),
    with dmatest, pxa_camera and pxamci.

    Signed-off-by: Robert Jarzmik
    Signed-off-by: Vinod Koul

    Robert Jarzmik