31 May, 2019

1 commit

  • Based on 1 normalized pattern(s):

    this program is free software you can redistribute it and or modify
    it under the terms of the gnu general public license as published by
    the free software foundation either version 2 of the license or at
    your option any later version

    extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-or-later

    has been chosen to replace the boilerplate/reference in 3029 file(s).

    Signed-off-by: Thomas Gleixner
    Reviewed-by: Allison Randal
    Cc: linux-spdx@vger.kernel.org
    Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de
    Signed-off-by: Greg Kroah-Hartman

    Thomas Gleixner
     

30 Aug, 2017

1 commit

  • Up until now we have open-coded checks for whether CPUs are siblings,
    with slight variations on whether we consider the package ID or not.

    This will only get more complex when we introduce cluster support, so in
    preparation for that this patch introduces a cpus_are_siblings()
    function which can be used to check whether or not 2 CPUs are siblings
    in a consistent manner.

    By checking globalnumber with the VP ID masked out this also has the
    neat side effect of being ready for multi-cluster systems already.

    Signed-off-by: Paul Burton
    Acked-by: Rafael J. Wysocki
    Acked-by: Thomas Gleixner
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/17011/
    Signed-off-by: Ralf Baechle

    Paul Burton
     

19 Jul, 2017

1 commit

  • Drop static on a local variable, when the variable is initialized before
    any possible use. Thus, the static has no benefit.

    The semantic patch that fixes this problem is as follows:
    (http://coccinelle.lip6.fr/)

    //
    @bad exists@
    position p;
    identifier x;
    type T;
    @@
    static T x@p;
    ...
    x =

    @@
    identifier x;
    expression e;
    type T;
    position p != bad.p;
    @@
    -static
    T x@p;
    ... when != x
    when strict
    ?x = e;
    //

    Signed-off-by: Julia Lawall
    Signed-off-by: Thomas Gleixner
    Cc: Marc Zyngier
    Cc: kernel-janitors@vger.kernel.org
    Cc: keescook@chromium.org
    Cc: Jason Cooper
    Link: http://lkml.kernel.org/r/1500149266-32357-7-git-send-email-Julia.Lawall@lip6.fr

    Julia Lawall
     

23 Jun, 2017

1 commit


13 Apr, 2017

3 commits

  • Introduce support for registering an IPI IRQ domain suitable for use by
    systems using the MIPS MT (multithreading) ASE within a single core.
    This will allow for such systems to be supported generically, without
    the current kludge of IPI code split between the MIPS arch & the malta
    board support code.

    Signed-off-by: Paul Burton
    Acked-by: Thomas Gleixner
    Cc: Jason Cooper
    Cc: Marc Zyngier
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/15836/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • The various struct irq_chip callbacks in the MIPS CPU interrupt
    controller driver have been calculating the hardware interrupt number by
    subtracting MIPS_CPU_IRQ_BASE from the virq number. This presumes a
    linear mapping beginning from MIPS_CPU_IRQ_BASE, and this will not hold
    once an IPI IRQ domain is introduced. Switch to using the hwirq field of
    struct irq_data which already contains the hardware interrupt number
    instead of attempting to calculate it.

    Similarly, plat_irq_dispatch calculated the virq number by adding
    MIPS_CPU_IRQ_BASE to the hardware interrupt number. Ready this for the
    introduction of an IPI IRQ domain by instead using irq_linear_revmap.

    Signed-off-by: Paul Burton
    Acked-by: Thomas Gleixner
    Cc: Jason Cooper
    Cc: Marc Zyngier
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/15835/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • Replace use of the magic number 0x100 (ie. bit 8) with the more
    explanatory IE_SW0 (ie. interrupt enable for software interrupt 0) or
    C_SW0 (ie. cause bit for software interrupt 0) as appropriate.

    Signed-off-by: Paul Burton
    Acked-by: Thomas Gleixner
    Cc: Jason Cooper
    Cc: Marc Zyngier
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/15834/
    Signed-off-by: Ralf Baechle

    Paul Burton
     

12 Jul, 2015

1 commit

  • The IRQCHIP_DECLARE macro moved to to 'include/linux/irqchip.h', so
    the local irqchip.h became an empty shell, which solely includes
    include/linux/irqchip.h

    Include the global header in all irqchip drivers instead of the local
    header, so we can remove it.

    Signed-off-by: Joel Porquet
    Cc: vgupta@synopsys.com
    Cc: monstr@monstr.eu
    Cc: ralf@linux-mips.org
    Cc: jason@lakedaemon.net
    Link: http://lkml.kernel.org/r/1882096.X39jVG8e0D@joel-zenbook
    Signed-off-by: Thomas Gleixner

    Joel Porquet
     

22 Jun, 2015

2 commits

  • Allow the MIPS CPU interrupt controller to be probed from DT using the
    generic __irqchip_of_table for platforms which use irqchip_init. This
    will avoid such platforms needing to duplicate the compatible string &
    init function pointer.

    [ralf@linux-mips.org: Resolved conflict due the preceeding commit that
    moves irq-cpu.c.

    Signed-off-by: Paul Burton
    Cc: Lars-Peter Clausen
    Cc: linux-mips@linux-mips.org
    Cc: Qais Yousef
    Cc: Andrew Bresticker
    Cc: linux-kernel@vger.kernel.org
    Cc: Felix Fietkau
    Patchwork: https://patchwork.linux-mips.org/patch/10131/
    Signed-off-by: Ralf Baechle

    Paul Burton
     
  • While at it, rename it because in drivers/irqchip no longer every CPU is
    a MIPS.

    Signed-off-by: Ralf Baechle

    Ralf Baechle