30 Dec, 2020
1 commit
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[ Upstream commit b10d5fd489b0c67f59cbdd28d95f4bd9f76a62f2 ]
On a successful probe, the driver tries to print a success message with
INTA device id. It uses pdev->id for printing the id but id is stored in
inta->ti_sci_id. Fix it by correcting the dev_info parameter.Fixes: 5c4b585d2910 ("irqchip/ti-sci-inta: Add support for INTA directly connecting to GIC")
Signed-off-by: Lokesh Vutla
Signed-off-by: Marc Zyngier
Link: https://lore.kernel.org/r/20201102120614.11109-1-lokeshvutla@ti.com
Signed-off-by: Sasha Levin
01 Nov, 2020
1 commit
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The DMA (BCDMA/PKTDMA and their rings/flows) events are under the INTA's
supervision as unmapped events in AM64.In order to keep the current SW stack working, the INTA driver must replace
the dev_id with it's own when a request comes for BCDMA or PKTDMA
resources.Implement parsing of the optional "ti,unmapped-event-sources" phandle array
to get the sci-dev-ids of the devices where the unmapped events originate.Signed-off-by: Peter Ujfalusi
Signed-off-by: Marc Zyngier
Link: https://lore.kernel.org/r/20201020073243.19255-3-peter.ujfalusi@ti.com
10 Oct, 2020
1 commit
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Signed-off-by: Marc Zyngier
14 Sep, 2020
1 commit
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Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and the error value gets printed.There is also no need to assign NULL to 'intr->sci' as it is part of
devm-allocated memory.Signed-off-by: Krzysztof Kozlowski
Signed-off-by: Marc Zyngier
Link: https://lore.kernel.org/r/20200902174615.24695-1-krzk@kernel.org
13 Sep, 2020
1 commit
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ti_sci_inta_xlate_irq() return -ENOENT on fail, p_hwirq
should be int type.Fixes: 5c4b585d2910 ("irqchip/ti-sci-inta: Add support for INTA directly connecting to GIC")
Signed-off-by: YueHaibing
Signed-off-by: Marc Zyngier
Acked-by: Lokesh Vutla
Link: https://lore.kernel.org/r/20200826035430.21060-1-yuehaibing@huawei.com
17 Aug, 2020
2 commits
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Driver assumes that Interrupt parent to Interrupt Aggregator is always
Interrupt router. This is not true always and GIC can be a parent to
Interrupt Aggregator. Update the driver to detect the parent and request
the parent irqs accordingly.Signed-off-by: Lokesh Vutla
Signed-off-by: Marc Zyngier
Link: https://lore.kernel.org/r/20200806074826.24607-11-lokeshvutla@ti.com -
Even though DT doesn't make active use of id field in platform_device, we cannot
hijack it to store TISCI device id. So create a field in struct ti_sci_inta
for storing TISCI id and drop usage of id field in platform_device.Signed-off-by: Lokesh Vutla
Signed-off-by: Marc Zyngier
Link: https://lore.kernel.org/r/20200806074826.24607-10-lokeshvutla@ti.com
05 Aug, 2020
1 commit
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Pull irq updates from Thomas Gleixner:
"The usual boring updates from the interrupt subsystem:- Infrastructure to allow building irqchip drivers as modules
- Consolidation of irqchip ACPI probing
- Removal of the EOI-preflow interrupt handler which was required for
SPARC support and became obsolete after SPARC was converted to use
sparse interrupts.- Cleanups, fixes and improvements all over the place"
* tag 'irq-core-2020-08-04' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (51 commits)
irqchip/loongson-pch-pic: Fix the misused irq flow handler
irqchip/loongson-htvec: Support 8 groups of HT vectors
irqchip/loongson-liointc: Fix misuse of gc->mask_cache
dt-bindings: interrupt-controller: Update Loongson HTVEC description
irqchip/imx-intmux: Fix irqdata regs save in imx_intmux_runtime_suspend()
irqchip/imx-intmux: Implement intmux runtime power management
irqchip/gic-v4.1: Use GFP_ATOMIC flag in allocate_vpe_l1_table()
irqchip: Fix IRQCHIP_PLATFORM_DRIVER_* compilation by including module.h
irqchip/stm32-exti: Map direct event to irq parent
irqchip/mtk-cirq: Convert to a platform driver
irqchip/mtk-sysirq: Convert to a platform driver
irqchip/qcom-pdc: Switch to using IRQCHIP_PLATFORM_DRIVER helper macros
irqchip: Add IRQCHIP_PLATFORM_DRIVER_BEGIN/END and IRQCHIP_MATCH helper macros
irqchip: irq-bcm2836.h: drop a duplicated word
irqchip/gic-v4.1: Ensure accessing the correct RD when writing INVALLR
irqchip/irq-bcm7038-l1: Guard uses of cpu_logical_map
irqchip/gic-v3: Remove unused register definition
irqchip/qcom-pdc: Allow QCOM_PDC to be loadable as a permanent module
genirq: Export irq_chip_retrigger_hierarchy and irq_chip_set_vcpu_affinity_parent
irqdomain: Export irq_domain_update_bus_token
...
25 Jul, 2020
1 commit
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Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.Signed-off-by: Alexander A. Klimov
Acked-by: Rob Herring
Signed-off-by: Santosh Shilimkar
27 Jun, 2020
3 commits
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It should be "ti.com" instead of "ticom".
Fixes: 9f1463b86c13 ("irqchip/ti-sci-inta: Add support for Interrupt Aggregator driver")
Signed-off-by: Tiezhu Yang
Signed-off-by: Marc Zyngier
Reviewed-by: Grygorii Strashko
Link: https://lore.kernel.org/r/1591437017-5295-3-git-send-email-yangtiezhu@loongson.cn -
When call function devm_ioremap_resource(), we should use IS_ERR()
to check the return value and return PTR_ERR() if failed.Fixes: 9f1463b86c13 ("irqchip/ti-sci-inta: Add support for Interrupt Aggregator driver")
Signed-off-by: Tiezhu Yang
Signed-off-by: Marc Zyngier
Reviewed-by: Grygorii Strashko
Link: https://lore.kernel.org/r/1591437017-5295-2-git-send-email-yangtiezhu@loongson.cn -
In the function ti_sci_inta_set_type(), the statement "return -EINVAL;"
out of switch case is dead code, remove it.Fixes: 9f1463b86c13 ("irqchip/ti-sci-inta: Add support for Interrupt Aggregator driver")
Signed-off-by: Tiezhu Yang
Signed-off-by: Marc Zyngier
Reviewed-by: Grygorii Strashko
Link: https://lore.kernel.org/r/1591437017-5295-1-git-send-email-yangtiezhu@loongson.cn
17 Apr, 2020
1 commit
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The ti_sci_inta_irq_handler() does not take into account INTA IRQs state
(masked/unmasked) as it uses INTA_STATUS_CLEAR_j register to get INTA IRQs
status, which provides raw status value.
This causes hard IRQ handlers to be called or threaded handlers to be
scheduled many times even if corresponding INTA IRQ is masked.
Above, first of all, affects the LEVEL interrupts processing and causes
unexpected behavior up the system stack or crash.Fix it by using the Interrupt Masked Status INTA_STATUSM_j register which
provides masked INTA IRQs status.Fixes: 9f1463b86c13 ("irqchip/ti-sci-inta: Add support for Interrupt Aggregator driver")
Signed-off-by: Grygorii Strashko
Signed-off-by: Marc Zyngier
Reviewed-by: Lokesh Vutla
Link: https://lore.kernel.org/r/20200408191532.31252-1-grygorii.strashko@ti.com
Cc: stable@vger.kernel.org
11 Nov, 2019
1 commit
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A coccicheck run provided information like the following.
drivers/irqchip/irq-ti-sci-inta.c:250:9-16: WARNING: ERR_CAST can be used
with vint_desc.Generated by: scripts/coccinelle/api/err_cast.cocci
Thus adjust the exception handling in one if branch.
Signed-off-by: Markus Elfring
Signed-off-by: Marc Zyngier
Reviewed-by: Lokesh Vutla
Link: https://lore.kernel.org/r/776b7135-26af-df7d-c3a9-4339f7bf1f15@web.de
05 Jun, 2019
1 commit
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irq_create_fwspec_mapping() can fail, returning 0 as parent_virq. In this
case vint_desc is going to be NULL in ti_sci_inta_alloc_irq() which will
cause NULL pointer dereference.Also note that irq_create_fwspec_mapping() returns 'unsigned int' so the
check '
Signed-off-by: Marc Zyngier
01 May, 2019
2 commits
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Add a msi domain that is child to the INTA domain. Clients
uses the INTA MSI bus layer to allocate irqs in this
MSI domain.Signed-off-by: Lokesh Vutla
Signed-off-by: Marc Zyngier -
Texas Instruments' K3 generation SoCs has an IP Interrupt Aggregator
which is an interrupt controller that does the following:
- Converts events to interrupts that can be understood by
an interrupt router.
- Allows for multiplexing of events to interrupts.Configuration of the interrupt aggregator registers can only be done by
a system co-processor and the driver needs to send a message to this
co processor over TISCI protocol. Add the required infrastructure to
allow the allocation and routing of these events.Signed-off-by: Lokesh Vutla
Signed-off-by: Marc Zyngier