20 Nov, 2020
12 commits
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The blk-ctl register allow access to set the MIPI DSI LDO trim value.
Signed-off-by: Oliver Brown
Reviewed-by: Laurentiu Palcu -
Add support for reading fuse to get iMX8mp LDO trim.
Signed-off-by: Oliver Brown
Reviewed-by: Laurentiu Palcu -
Enable ADC monomix for fixing only one channel in recording
Signed-off-by: Shengjiu Wang
-
Enable support for Hifiberry dacplus audio hats on
iMX8MMini EVK.Signed-off-by: Adrian Alonso
Reviewed-by: Shengjiu Wang
(cherry picked from commit ec6d8970ba79fc7cef371eea888d24e5bd347f2a) -
Enable support for IQauidio dacpro audio hats on
iMX8MMini EVK.Signed-off-by: Adrian Alonso
Reviewed-by: Shengjiu Wang
(cherry picked from commit f4122d1b5c3e66c3fe731ea19e6e6e17c2000af6) -
Enable support for IQauidio dacplus audio hats on
iMX8MMini EVK.Signed-off-by: Adrian Alonso
Reviewed-by: Shengjiu Wang
(cherry picked from commit 95b3f81802fe52fbe66ce6fbb28ae43f78d85f04) -
Enable support for Hifiberry dacplus audio hats on
iMX8MNano EVK.Signed-off-by: Adrian Alonso
Reviewed-by: Shengjiu Wang
(cherry picked from commit c0bee3e1d91937b49e22e635f2bca53e8b25f57c) -
Enable support for IQauidio dacpro audio hats on
iMX8MNano EVK.Signed-off-by: Adrian Alonso
Reviewed-by: Shengjiu Wang
(cherry picked from commit 9ebf35bcd2ce93b3595dee2b3a3f662b70f10088) -
Enable support for IQauidio dacplus audio hats on
iMX8MNano EVK.Signed-off-by: Adrian Alonso
Reviewed-by: Shengjiu Wang
(cherry picked from commit 0fe19d3f2e949c65ffa636d4971b9f5f463497fd) -
Add set_sysclk function to select preferred master input
clock on pcm512x codec, support multiple input system clocks
on SCLK master mode.Signed-off-by: Adrian Alonso
Reviewed-by: Shengjiu Wang
(cherry picked from commit 5ca64840578f9dad359d5c2e6821805df68a1608) -
Enable imx-pcm512x sound driver as built-in module
for iMX8M EVK supportSigned-off-by: Adrian Alonso
Reviewed-by: Shengjiu Wang
(cherry picked from commit 84db7260f5a350f6e3d5418e7a90e8b352aaa183) -
ASoC machine sound driver for IQAudio PiDAC plus/pro
Rev3 for iMX SoC, high resolution codec supporting
upto 384khz sample rate on SAI; Include support for
Hifiberry audio hats that uses external oscillators for
dac system clock.Signed-off-by: Adrian Alonso
Reviewed-by: Shengjiu Wang
(cherry picked from commit b52d3587cba2b3db60cf316430478969918fed7a)
19 Nov, 2020
27 commits
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firmware
move timestamp to firmware, it will make our driver more easy to
upstreamSigned-off-by: Ming Qian
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firmware
move timestamp to firmware, it will make our driver more easy to
upstreamSigned-off-by: Ming Qian
-
We hit the problem with below sequence:
- ci_udc_vbus_session() update vbus_active flag and ci->driver
is valid,
- before calling the ci_hdrc_gadget_connect(),
usb_gadget_udc_stop() is called by application remove gadget
driver,
- ci_udc_vbus_session() will contine do ci_hdrc_gadget_connect() as
gadget_ready is 1, so udc interrupt is enabled, but ci->driver is
NULL.
- USB connection irq generated but ci->driver is NULL.As udc irq only should be enabled when gadget driver is binded, so
add spinlock to protect the usb irq enable for vbus session handling.Signed-off-by: Jun Li
Signed-off-by: Peter Chen
(cherry picked from commit 72dc8df7920fc24eba0f586c56e900a1643ff2b3)
(cherry picked from commit 0fe900249814f73ecb79c6fb2ae75d46ed9d3a3e) -
The 'lcdif_crtc' allocated by devm_kzalloc() in bind() will
be freed automatically during unbind() stage if any other
component bind failed and this will cause use-after-free
issue in drm_mode_config_cleanup().Kasan reports below error related with this issue:
[ 2.188122] ==================================================================
[ 2.195370] BUG: KASAN: use-after-free in drm_mode_config_cleanup+0x274/0x478
[ 2.202524] Read of size 8 at addr ffff000069c1e098 by task swapper/0/1
[ 2.209145]
[ 2.210659] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 5.4.70-00056-g8e43cd16c8bb-dirty #139
[ 2.219020] Hardware name: FSL i.MX8MM EVK board (DT)
[ 2.224080] Call trace:
[ 2.226546] dump_backtrace+0x0/0x1e8
[ 2.230220] show_stack+0x14/0x20
[ 2.233554] dump_stack+0xe0/0x14c
[ 2.236981] print_address_description.isra.0+0x68/0x34c
[ 2.242311] __kasan_report+0x118/0x220
[ 2.246165] kasan_report+0xc/0x18
[ 2.249587] __asan_load8+0x94/0xb8
[ 2.253090] drm_mode_config_cleanup+0x274/0x478
[ 2.257728] imx_drm_bind+0xd8/0x1b0
[ 2.261324] try_to_bring_up_master+0x24c/0x2c8
[ 2.265870] __component_add+0x110/0x258
[ 2.269812] component_add+0x10/0x18
[ 2.273407] imx_sec_dsim_probe+0x74/0xa0
[ 2.277438] platform_drv_probe+0x6c/0xc8
[ 2.281462] really_probe+0x148/0x440
[ 2.285140] driver_probe_device+0x74/0x130
[ 2.289340] device_driver_attach+0x94/0xa0
[ 2.293537] __driver_attach+0x70/0x110
[ 2.297390] bus_for_each_dev+0xe4/0x158
[ 2.301329] driver_attach+0x30/0x40
[ 2.304918] bus_add_driver+0x21c/0x2b8
[ 2.308771] driver_register+0xbc/0x1d0
[ 2.312627] __platform_driver_register+0x7c/0x88
[ 2.317350] imx_sec_dsim_driver_init+0x18/0x20
[ 2.321897] do_one_initcall+0xa4/0x24c
[ 2.325751] kernel_init_freeable+0x238/0x2e8
[ 2.330128] kernel_init+0x10/0x114
[ 2.333635] ret_from_fork+0x10/0x1c
[ 2.337215]
[ 2.338717] Allocated by task 1:
[ 2.341963] save_stack+0x24/0xb0
[ 2.345296] __kasan_kmalloc.isra.0+0xc0/0xe0
[ 2.349671] kasan_slab_alloc+0x14/0x20
[ 2.353525] __kmalloc_node_track_caller+0x118/0x2c8
[ 2.358512] devm_kmalloc+0x48/0xc8
[ 2.362016] lcdif_crtc_bind+0x38/0x278
[ 2.365868] component_bind_all+0x1c0/0x3c8
[ 2.370070] imx_drm_bind+0x104/0x1b0
[ 2.373750] try_to_bring_up_master+0x24c/0x2c8
[ 2.378298] __component_add+0x110/0x258
[ 2.382235] component_add+0x10/0x18
[ 2.385827] imx_sec_dsim_probe+0x74/0xa0
[ 2.389854] platform_drv_probe+0x6c/0xc8
[ 2.393877] really_probe+0x148/0x440
[ 2.397555] driver_probe_device+0x74/0x130
[ 2.401757] device_driver_attach+0x94/0xa0
[ 2.405954] __driver_attach+0x70/0x110
[ 2.409803] bus_for_each_dev+0xe4/0x158
[ 2.413740] driver_attach+0x30/0x40
[ 2.417330] bus_add_driver+0x21c/0x2b8
[ 2.421180] driver_register+0xbc/0x1d0
[ 2.425035] __platform_driver_register+0x7c/0x88
[ 2.429754] imx_sec_dsim_driver_init+0x18/0x20
[ 2.434300] do_one_initcall+0xa4/0x24c
[ 2.438150] kernel_init_freeable+0x238/0x2e8
[ 2.442526] kernel_init+0x10/0x114
[ 2.446031] ret_from_fork+0x10/0x1c
[ 2.449612]
[ 2.451112] Freed by task 1:
[ 2.454010] save_stack+0x24/0xb0
[ 2.457343] __kasan_slab_free+0x108/0x180
[ 2.461456] kasan_slab_free+0x10/0x18
[ 2.465219] kfree+0x80/0x298
[ 2.468207] release_nodes+0x358/0x3e8
[ 2.471975] devres_release_group+0xd0/0x140
[ 2.476261] component_unbind.isra.0+0x98/0xb8
[ 2.480724] component_bind_all+0x25c/0x3c8
[ 2.484924] imx_drm_bind+0x104/0x1b0
[ 2.488605] try_to_bring_up_master+0x24c/0x2c8
[ 2.493153] __component_add+0x110/0x258
[ 2.497090] component_add+0x10/0x18
[ 2.500682] imx_sec_dsim_probe+0x74/0xa0
[ 2.504707] platform_drv_probe+0x6c/0xc8
[ 2.508732] really_probe+0x148/0x440
[ 2.512411] driver_probe_device+0x74/0x130
[ 2.516610] device_driver_attach+0x94/0xa0
[ 2.520807] __driver_attach+0x70/0x110
[ 2.524657] bus_for_each_dev+0xe4/0x158
[ 2.528594] driver_attach+0x30/0x40
[ 2.532183] bus_add_driver+0x21c/0x2b8
[ 2.536036] driver_register+0xbc/0x1d0
[ 2.539889] __platform_driver_register+0x7c/0x88
[ 2.544608] imx_sec_dsim_driver_init+0x18/0x20
[ 2.549152] do_one_initcall+0xa4/0x24c
[ 2.553006] kernel_init_freeable+0x238/0x2e8
[ 2.557380] kernel_init+0x10/0x114
[ 2.560884] ret_from_fork+0x10/0x1c
[ 2.564464]
[ 2.565972] The buggy address belongs to the object at ffff000069c1e000
[ 2.565972] which belongs to the cache kmalloc-2k of size 2048
[ 2.578510] The buggy address is located 152 bytes inside of
[ 2.578510] 2048-byte region [ffff000069c1e000, ffff000069c1e800)
[ 2.590343] The buggy address belongs to the page:
[ 2.595154] page:fffffe0001870600 refcount:1 mapcount:0 mapping:ffff000068003400 index:0x0 compound_mapcount: 0
[ 2.605260] flags: 0xffff00000010200(slab|head)
[ 2.609820] raw: 0ffff00000010200 dead000000000100 dead000000000122 ffff000068003400
[ 2.617583] raw: 0000000000000000 0000000080080008 00000001ffffffff 0000000000000000
[ 2.625339] page dumped because: kasan: bad access detected
[ 2.630917]
[ 2.632417] Memory state around the buggy address:
[ 2.637225] ffff000069c1df80: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
[ 2.644463] ffff000069c1e000: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
[ 2.651700] >ffff000069c1e080: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
[ 2.658931] ^
[ 2.662954] ffff000069c1e100: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
[ 2.670193] ffff000069c1e180: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
[ 2.677421] ==================================================================Signed-off-by: Fancy Fang
Reported-by: Bo Zhang
(cherry picked from commit 6c91a51df9425a93157409546feca7107baaf4dd) -
Due to commit b3a420c9cf3f (MLK-24998-4 drm/bridge: sec-dsim:
use 12MHz for default PHY REF clock), the dsi PHY reference
clock source need to be assigned to osc_24m clock.Signed-off-by: Fancy Fang
Reviewed-by: Jacky Bai
(cherry picked from commit 8e43cd16c8bbfe5b7e3c0fc1e7c3ddf738d8db01) -
Due to commit b3a420c9cf3f (MLK-24998-4 drm/bridge: sec-dsim:
use 12MHz for default PHY REF clock), the dsi PHY reference
clock source need to be assigned to osc_24m clock.Signed-off-by: Fancy Fang
Reviewed-by: Jacky Bai
(cherry picked from commit 2972241b831ed65f641ccdb80b504cadef0ba591) -
Add mode_valid() implementation for CRTC to filter out any
mode which cannot be supported by LCDIFv3. Only check the
CEA and DMT modes for pixel clock round rate is same with
the value from mode.Signed-off-by: Fancy Fang
Reviewed-by: Liu Ying
(cherry picked from commit f252a44da9f90951614c0bf513df6bd4d145e76e) -
Due to commit 82586f0aa1c2 (arm64: dts: imx8mp: correct
assigned-clock-rates for video_pll1), so remove unused
2079M clock from imx_pll1443x_tbl.Signed-off-by: Fancy Fang
Reviewed-by: Jacky Bai
(cherry picked from commit b96af227c28b1dfdbdf656de2a77bc4de99136e2) -
According to i.MX8MP Architecture Defition Document, the maximum
clock rate comes generated by 'ccm_media_disp2_pix_clk_root' is
160MHz, so 1039.5MHz clock rate is not supported. And besides,
this clock rate will be set to the matched rate with display mode
in lcdif driver, so it is not necessary to set its rate in its
assigned-clock-rates property, and just leave it to be 0.Signed-off-by: Fancy Fang
Reviewed-by: Liu Ying
(cherry picked from commit 0e3556f282466e6b91def024afc815ef77733161) -
After using osc_24m for MIPI PHY reference clock source,
the default PHY reference clock rate should be changed
also accordingly. Here choose 12MHz rate for this since
below usual DSI output DDR clock rates can be derived
from 12MHz reference:891000,
810000,
792000,
648000,
472500,
445500,
390000,
297000,
240000,
189000,Signed-off-by: Fancy Fang
Reviewed-by: Liu Ying
(cherry picked from commit b3a420c9cf3fe40c408d4eb58841a0d047c186a4) -
Due to commit 26ef2488a2ef (MLK-24998-1 arm64: dts: imx8mp: correct
assigned-clock-rates for video_pll1), default 27MHz dsi PHY reference
clock cannot be derived from 'vide_pll1', so change to use osc_24m
for the clock source and use 12MHz for dsi reference clock rate, since
below usual DDR clock rates can be derived through 12MHz clock rate:891000,
810000,
792000,
648000,
472500,
445500,
390000,
297000,
240000,
189000,All these clock rates comes from ADV7535 bridge driver.
Signed-off-by: Fancy Fang
Reviewed-by: Jacky Bai
(cherry picked from commit f3915cb61639821fbdcdc9db3cf3a8e0880cbca3) -
According to i.MX8MP Architecture Defition Document, the maximum
output frequency generated by video_pll1 is 1190MHz, so correct
its assigned-clock-rates to be 1039.5MHz to meet the spec.Signed-off-by: Fancy Fang
Reviewed-by: Jacky Bai
(cherry picked from commit 1dff13053bf83c2d4fb818562a086ad834f2a0bf) -
According to i.MX8MP Architecture Defition Document, the maximum
output frequency generated by video_pll1 is 1190MHz, so correct
its assigned-clock-rates to be 1039.5MHz to meet the spec.Signed-off-by: Fancy Fang
Reviewed-by: Jacky Bai
(cherry picked from commit b935595aa00859887a407dc6900763bfd41dfac2) -
kernel debug file is moved to linux osal part,
Fix: "MGS-6060 gpu-viv: sync 20201116 patch release"Signed-off-by: Xianzhong
-
The config for lcdif should be removed, and need to add vpu
qos setting by default. this patch is just to add back the
vpu qos config that is missed when resolving cherry-pick
conflict for patch:
3a3f54750294: MLK-19380 driver: soc: update the noc QoS setting on imx8mqSigned-off-by: Jacky Bai
Reviewed-by: Anson Huang -
include critical bug-fixings for 6.4.3.p1 driver
Signed-off-by: Xianzhong
-
fix drm header and function related changes for new kernel
Signed-off-by: Xianzhong
-
weston-simple-dmabuf-egl has failure without drm render node,
need enable vivante drm to fix dmabuf failure issue.Signed-off-by: Xianzhong
-
checked return value
Date:30th Oct,2020
Signed-off-by Ya Zhou -
Signed-off-by: Jiyu Yang
-
Signed-off-by: Jiyu Yang
-
Signed-off-by: Jiyu Yang
-
this also fix LF-2472
Signed-off-by: Jiyu Yang -
Signed-off-by: Jiyu Yang
-
Signed-off-by: Jiyu Yang
-
checked return value
Date:30th Oct,2020
Signed-off-by Ya Zhou -
Signed-off-by: Xianzhong
18 Nov, 2020
1 commit
-
For 88w8987/88w8997 wireless chips requires many module parameters
set by user and don't expect to be auto-loaded, remove the module
device table.Fixes: 04b2fa2cd5d3 ("MLK-25013 net: wireless: nxp: mxm_wifiex: upgrade to mxm5x16210 release")
Reviewed-by: yang.tian
Signed-off-by: Fugang Duan
