08 Jun, 2019
1 commit
-
When a gpio_chip wants to request a descriptor from itself
using gpiochip_request_own_desc() it needs to be able to specify
fully how to use the descriptor, notably line inversion
semantics. The workaround in the gpiolib.c can be removed
and cases (such as SPI CS) where we need at times to request
a GPIO with line inversion semantics directly on a chip for
workarounds, can be fully supported with this call.Fix up some users of the API that weren't really using the
last flag to set up the line as input or output properly
but instead just calling direction setting explicitly
after requesting the line.Cc: Martin Sperl
Signed-off-by: Linus Walleij
05 Apr, 2019
1 commit
-
Use the new helper that wraps the calls to platform_get_resource()
and devm_ioremap_resource() together.Signed-off-by: Enrico Weigelt, metux IT consult
Signed-off-by: Linus Walleij
10 Jan, 2019
1 commit
-
struct gpio_chip documentation recommends to always implement this
callback function.A more concrete motivation is to be able (in combination with
GPIOD_ASIS) to detect whether the bootloader has changed the state of a
GPIO signal.Signed-off-by: Baruch Siach
Signed-off-by: Linus Walleij
29 Dec, 2018
1 commit
-
Pull GPIO updates from Linus Walleij:
"This is the bulk of GPIO changes for the v4.21 kernel series.Core changes:
- Some core changes are already in outside of this pull request as
they came through the regulator tree, most notably
devm_gpiod_unhinge() that removes devres refcount management from a
GPIO descriptor. This is needed in subsystems such as regulators
where the regulator core need to take over the reference counting
and lifecycle management for a GPIO descriptor.- We dropped devm_gpiochip_remove() and devm_gpio_chip_match() as
nothing needs it. We can bring it back if need be.- Add a global TODO so people see where we are going. This helps
setting the direction now that we are two GPIO maintainers.- Handle the MMC CD/WP properties in the device tree core. (The bulk
of patches activating this code is already merged through the
MMC/SD tree.)- Augment gpiochip_request_own_desc() to pass a flag so we as
gpiochips can request lines as active low or open drain etc even
from ourselves.New drivers:
- New driver for Cadence GPIO blocks.
- New driver for Atmel SAMA5D2 PIOBU GPIO lines.
Driver improvements:
- A major refactoring of the PCA953x driver - this driver has been
around for ages, and is now modernized to reduce code duplication
that has stacked up and is using regmap to read write and cache
registers.- Intel drivers are now maintained in a separate tree and start with
a round of cleanups and unifications"* tag 'gpio-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (99 commits)
gpio: sama5d2-piobu: Depend on OF_GPIO
gpio: Add Cadence GPIO driver
dt-bindings: gpio: Add bindings for Cadence GPIO
gpiolib-acpi: remove unused variable 'err', cleans up build warning
gpio: mxs: read pin level directly instead of using .get
gpio: aspeed: remove duplicated statement
gpio: add driver for SAMA5D2 PIOBU pins
dt-bindings: arm: atmel: describe SECUMOD usage as a GPIO controller
gpio/mmc/of: Respect polarity in the device tree
dt-bindings: gpio: rcar: Add r8a774c0 (RZ/G2E) support
memory: omap-gpmc: Get the header of the enum
ARM: omap1: Fix new user of gpiochip_request_own_desc()
gpio: pca953x: Add regmap dependency for PCA953x driver
gpio: raspberrypi-exp: decrease refcount on firmware dt node
gpiolib: Fix return value of gpio_to_desc() stub if !GPIOLIB
gpio: pca953x: Restore registers after suspend/resume cycle
gpio: pca953x: Zap single use of pca953x_read_single()
gpio: pca953x: Zap ad-hoc reg_output cache
gpio: pca953x: Zap ad-hoc reg_direction cache
gpio: pca953x: Perform basic regmap conversion
...
21 Dec, 2018
1 commit
-
The gpio IP on Armada 370 at offset 0x18180 has neither a clk nor pwm
registers. So there is no need for a clk as the pwm isn't used anyhow.
So only check for the clk in the presence of the pwm registers. This fixes
a failure to probe the gpio driver for the above mentioned gpio device.Fixes: 757642f9a584 ("gpio: mvebu: Add limited PWM support")
Signed-off-by: Uwe Kleine-König
Reviewed-by: Gregory CLEMENT
Signed-off-by: Linus Walleij
14 Dec, 2018
1 commit
-
Before things go out of hand, make it possible to pass
flags when requesting "own" descriptors from a gpio_chip.
This is necessary if the chip wants to request a GPIO with
active low semantics, for example.Cc: Janusz Krzysztofik
Cc: Thomas Petazzoni
Cc: Jason Cooper
Cc: Jiri Kosina
Cc: Roger Quadros
Reviewed-by: Gregory CLEMENT
Signed-off-by: Linus Walleij
16 May, 2018
1 commit
-
The MVEBU driver is requesting GPIO descriptors from itself, which
is fine, but we have proper APIs to do this in a controlled way, so
stop calling into the private functions of the GPIO library and use
the gpiochip_* functions instead. Only include
and since we are both producers and consumers
in this case.Cc: Gregory CLEMENT
Cc: Thomas Petazzoni
Cc: Jason Cooper
Signed-off-by: Linus Walleij
14 Aug, 2017
1 commit
-
When switching to regmap, the way to compute the irq cause was
reorganized. However while doing it, a typo was introduced: a 'xor'
replaced a 'and'.This lead to wrong behavior in the interrupt handler ans one of the
symptom was wrong irq handler called on the Armada 388 GP:
"->handle_irq(): c016303c,
handle_bad_irq+0x0/0x278
->irq_data.chip(): c0b0ec0c,
0xc0b0ec0c
->action(): (null)
IRQ_NOPROBE set
IRQ_NOREQUEST set
unexpected IRQ trap at vector 00
irq 0, desc: ee804800, depth: 1, count: 0, unhandled: 0"Fixes: 2233bf7a92e7 ("gpio: mvebu: switch to regmap for register access")
Signed-off-by: Gregory CLEMENT
Signed-off-by: Linus Walleij
08 Jul, 2017
1 commit
-
Pull GPIO updates from Linus Walleij:
"This is the bulk of GPIO changes for the v4.13 series.Some administrativa:
I have a slew of 8250 serial patches and the new IOT2040 serial+GPIO
driver coming in through this tree, along with a whole bunch of Exar
8250 fixes. These are ACKed by Greg and also hit drivers/platform/*
where they are ACKed by Andy Shevchenko.Speaking about drivers/platform/* there is also a bunch of ACPI stuff
coming through that route, again ACKed by Andy.The MCP23S08 changes are coming in here as well. You already have the
commits in your tree, so this is just a result of sharing an immutable
branch between pin control and GPIO.Core:
- Export add/remove for lookup tables so that modules can export GPIO
descriptor tables.
- Handle GPIO sleep states: it is now possible to flag that a GPIO
line may loose its state during suspend/resume of the system to
save power. This is used in the Wolfson Micro Arizona driver.
- ACPI-based GPIO was tightened up a lot around the edges.
- Use bitmap_fill() to speed up a loop.New drivers:
- Exar XRA1403 SPI-based GPIO.
- MVEBU driver now supports Armada 7K and 8K.
- LP87565 PMIC GPIO.
- Renesas R-CAR R8A7743 (RZ/G1M).
- The new IOT2040 8250 serial/GPIO also comes in through this
changeset.Substantial driver changes:
- Seriously fix the Exar 8250 GPIO portions to work.
- The MCP23S08 was moved out to a pin control driver.
- Convert MEVEBU to use regmap for register access.
- Drop Vulcan support from the Broadcom driver.
- Serious cleanup and improvement of the mockup driver, giving us a
better test coverage.Misc:
- Lots of janitorial clean up.
- A bunch of documentation fixes"* tag 'gpio-v4.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (70 commits)
serial: exar: Add support for IOT2040 device
gpio-exar/8250-exar: Make set of exported GPIOs configurable
platform: Accept const properties
serial: exar: Factor out platform hooks
gpio-exar/8250-exar: Rearrange gpiochip parenthood
gpio: exar: Fix iomap request
gpio-exar/8250-exar: Do not even instantiate a GPIO device for Commtech cards
serial: uapi: Add support for bus termination
gpio: rcar: Add R8A7743 (RZ/G1M) support
gpio: gpio-wcove: Fix GPIO control register offset calculation
gpio: lp87565: Add support for GPIO
gpio: dwapb: fix missing first irq for edgeboth irq type
MAINTAINERS: Take maintainership for GPIO ACPI support
gpio: exar: Fix reading of directions and values
gpio: exar: Allocate resources on behalf of the platform device
gpio-exar/8250-exar: Fix passing in of parent PCI device
gpio: mockup: use devm_kcalloc() where applicable
gpio: mockup: add myself as author
gpio: mockup: improve the error message
gpio: mockup: don't return magic numbers from probe()
...
20 Jun, 2017
1 commit
-
As it turns out more than just Armada 370 and XP support using GPIO
lines as PWM lines. For example the Armada 38x family has the same
hardware support. As such "marvell,armada-370-xp-gpio" for the
compatible string is a misnomer.Change the compatible string to "marvell,armada-370-gpio" before the
driver makes it out of the -rc stage. This also follows the practice of
using only the first device family supported as part of the name.Also update the documentation and comments in the code accordingly.
Fixes: 757642f9a584 ("gpio: mvebu: Add limited PWM support")
Signed-off-by: Ralph Sennhauser
Acked-by: Gregory CLEMENT
Acked-by: Rob Herring
Signed-off-by: Linus Walleij
16 Jun, 2017
2 commits
-
The Armada 7K and 8K SoCs use the same gpio controller as most of the
other mvebu SoCs. However, the main difference is that the GPIO
controller is part of a bigger system controller, and a syscon is used to
control the overall system controller. Therefore, the driver needs to be
adjusted to retrieve the regmap of the syscon to access registers, and
account for the fact that registers are located at a certain offset
within the regmap.This commit add the support of the syscon and introduce a new variant for
this case.It was based on the preliminary work of Thomas Petazzoni.
Tested-by: Thomas Petazzoni
Signed-off-by: Gregory CLEMENT
Signed-off-by: Linus Walleij -
In some place in the driver regmap_update_bits was misused. Indeed the
last argument is not the value of the bit (or group of bits) itself but
the mask value inside the register.So when setting the bit N, then the value must be BIT(N) and not 1.
CC: Ralph Sennhauser
Signed-off-by: Gregory CLEMENT
Reviewed-by: Thomas Petazzoni
Tested-by: Ralph Sennhauser
Tested-by: Chris Packham
Signed-off-by: Linus Walleij
09 Jun, 2017
2 commits
-
If more than one gpio bank has the "pwm" property, only one will be
registered successfully, all the others will fail with:
mvebu-gpio: probe of f1018140.gpio failed with error -17That's because in alloc_pwms(), the chip->base (aka "int pwm"), was not
set (thus, ==0) ; and 0 is a meaningful start value in alloc_pwm().
What was intended is mvpwm->chip->base = -1.
Like that, the numbering will be done auto-magicallyMoreover, as the region might be already occupied by another pwm, we
shouldn't force:
mvpwm->chip->base = 0
nor
mvpwm->chip->base = id * MVEBU_MAX_GPIO_PER_BANK;Tested on clearfog-pro (Marvell 88F6828)
Fixes: 757642f9a584 ("gpio: mvebu: Add limited PWM support")
Signed-off-by: Richard Genoud
Reviewed-by: Gregory CLEMENT
Signed-off-by: Linus Walleij -
The blink counter A was always selected because 0 was forced in the
blink select counter register.
The variable 'set' was obviously there to be used as the register value,
selecting the B counter when id==1 and A counter when id==0.Tested on clearfog-pro (Marvell 88F6828)
Fixes: 757642f9a584 ("gpio: mvebu: Add limited PWM support")
Reviewed-by: Gregory CLEMENT
Reviewed-by: Ralph Sennhauser
Signed-off-by: Richard Genoud
Signed-off-by: Linus Walleij
23 May, 2017
2 commits
-
In order to be able to use this driver with the Armada 7K/8K SoCs, we
need to use the regmap to access the registers. Indeed for these new SoCs,
the gpio node will be part of a syscon.[gregory.clement@free-electrons.com:
- fixed merge conflcit from 4.10 to 4.12-rc1
- added a commit log]Signed-off-by: Thomas Petazzoni
Signed-off-by: Gregory CLEMENT
Signed-off-by: Linus Walleij -
This commit sorts alphabetically the header files.
Reviewed-by: Thomas Petazzoni
Signed-off-by: Gregory CLEMENT
Signed-off-by: Linus Walleij
24 Apr, 2017
1 commit
-
Armada 370/XP devices can 'blink' GPIO lines with a configurable on
and off period. This can be modelled as a PWM.However, there are only two sets of PWM configuration registers for
all the GPIO lines. This driver simply allows a single GPIO line per
GPIO chip of 32 lines to be used as a PWM. Attempts to use more return
EBUSY.Due to the interleaving of registers it is not simple to separate the
PWM driver from the GPIO driver. Thus the GPIO driver has been
extended with a PWM driver.Signed-off-by: Andrew Lunn
URL: https://patchwork.ozlabs.org/patch/427287/
URL: https://patchwork.ozlabs.org/patch/427295/
[Ralph Sennhauser:
* Port forward
* Merge PWM portion into gpio-mvebu.c
* Switch to atomic PWM API
* Add new compatible string marvell,armada-370-xp-gpio
* Update and merge documentation patch
* Update MAINTAINERS]
Signed-off-by: Ralph Sennhauser
Tested-by: Andrew Lunn
Acked-by: Thierry Reding
Acked-by: Rob Herring
Signed-off-by: Linus Walleij
23 Mar, 2017
1 commit
-
Use the BIT macro instead of explicitly shifting bits for some added
clarity.Signed-off-by: Ralph Sennhauser
Signed-off-by: Linus Walleij
17 Mar, 2017
6 commits
-
A modern compiler should know better when to inline, so drop the inline
keywords.Signed-off-by: Ralph Sennhauser
Signed-off-by: Linus Walleij -
Fix whitespace errors missed by checkpatch.
Signed-off-by: Ralph Sennhauser
Signed-off-by: Linus Walleij -
Fix whitespace errors reported by checkpatch.
Signed-off-by: Ralph Sennhauser
Signed-off-by: Linus Walleij -
Use unsigned int instead of plain unsigned as reported by checkpatch.
Signed-off-by: Ralph Sennhauser
Signed-off-by: Linus Walleij -
While this isn't an issue according to checkpatch two styles are used.
Add a blank line to the block comments missing a blank line at the start
so multiline block comments look the same across the file.Signed-off-by: Ralph Sennhauser
Signed-off-by: Linus Walleij -
Fix issues in block comments reported by checkpatch.
Signed-off-by: Ralph Sennhauser
Signed-off-by: Linus Walleij
11 Jan, 2017
1 commit
-
Casting a pointer to an int is not portable, and provokes a compiler
warning. Cast to unsigned long instead to avoid the warning.drivers/gpio/gpio-mvebu.c: In function 'mvebu_gpio_probe':
drivers/gpio/gpio-mvebu.c:662:17: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
soc_variant = (int) match->data;
^This will be needed when building gpio-mvebu for Armada 7k/8k ARM64
SoCs.Signed-off-by: Russell King
Signed-off-by: Linus Walleij
02 Nov, 2016
1 commit
-
This fixes the irq allocation in this driver to not print:
irq: Cannot allocate irq_descs @ IRQ34, assuming pre-allocated
irq: Cannot allocate irq_descs @ IRQ66, assuming pre-allocatedWhich happens because the driver already called irq_alloc_descs()
and so the change to use irq_domain_add_simple resulted in calling
irq_alloc_descs() twice.Modernize the irq allocation in this driver to use the
irq_domain_add_linear flow directly and eliminate the use of
irq_domain_add_simple/legacyFixes: ce931f571b6d ("gpio/mvebu: convert to use irq_domain_add_simple()")
Signed-off-by: Jason Gunthorpe
Signed-off-by: Linus Walleij
31 Mar, 2016
1 commit
-
The Kconfig currently controlling compilation of this code is:
drivers/gpio/Kconfig:config GPIO_MVEBU
drivers/gpio/Kconfig: def_bool y...meaning that it currently is not being built as a module by anyone.
Lets remove the couple traces of modularity so that when reading the
driver there is no doubt it is builtin-only.Since module_platform_driver() uses the same init level priority as
builtin_platform_driver() the init ordering remains unchanged with
this commit.Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
Cc: Alexandre Courbot
Cc: linux-gpio@vger.kernel.org
Signed-off-by: Paul Gortmaker
Signed-off-by: Linus Walleij
23 Feb, 2016
1 commit
-
Use devm_gpiochip_add_data() for GPIO registration and clean the
error path.Signed-off-by: Laxman Dewangan
05 Jan, 2016
1 commit
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This makes the driver use the data pointer added to the gpio_chip
to store a pointer to the state container instead of relying on
container_of().Cc: Gregory CLEMENT
Cc: Thomas Petazzoni
Signed-off-by: Linus Walleij
19 Nov, 2015
1 commit
-
The name .dev in a struct is normally reserved for a struct device
that is let us say a superclass to the thing described by the struct.
struct gpio_chip stands out by confusingly using a struct device *dev
to point to the parent device (such as a platform_device) that
represents the hardware. As we want to give gpio_chip:s real devices,
this is not working. We need to rename this member to parent.This was done by two coccinelle scripts, I guess it is possible to
combine them into one, but I don't know such stuff. They look like
this:@@
struct gpio_chip *var;
@@
-var->dev
+var->parentand:
@@
struct gpio_chip var;
@@
-var.dev
+var.parentand:
@@
struct bgpio_chip *var;
@@
-var->gc.dev
+var->gc.parentPlus a few instances of bgpio that I couldn't figure out how
to teach Coccinelle to rewrite.This patch hits all over the place, but I *strongly* prefer this
solution to any piecemal approaches that just exercise patch
mechanics all over the place. It mainly hits drivers/gpio and
drivers/pinctrl which is my own backyard anyway.Cc: Haavard Skinnemoen
Cc: Rafał Miłecki
Cc: Richard Purdie
Cc: Mauro Carvalho Chehab
Cc: Alek Du
Cc: Jaroslav Kysela
Cc: Takashi Iwai
Acked-by: Dmitry Torokhov
Acked-by: Greg Kroah-Hartman
Acked-by: Lee Jones
Acked-by: Jiri Kosina
Acked-by: Hans-Christian Egtvedt
Acked-by: Jacek Anaszewski
Signed-off-by: Linus Walleij
17 Oct, 2015
1 commit
-
Replace all trivial request/free callbacks that do nothing but call into
pinctrl code with the generic versions.Signed-off-by: Jonas Gorski
Reviewed-by: Thomas Petazzoni
Acked-by: James Hogan
Acked-by: Stefan Agner
Acked-by: Joachim Eastwood
Acked-by: Gregory CLEMENT
Signed-off-by: Linus Walleij
16 Sep, 2015
1 commit
-
Most interrupt flow handlers do not use the irq argument. Those few
which use it can retrieve the irq number from the irq descriptor.Remove the argument.
Search and replace was done with coccinelle and some extra helper
scripts around it. Thanks to Julia for her help!Signed-off-by: Thomas Gleixner
Cc: Julia Lawall
Cc: Jiang Liu
14 Jul, 2015
3 commits
-
The irq argument of most interrupt flow handlers is unused or merily
used instead of a local variable. The handlers which need the irq
argument can retrieve the irq number from the irq descriptor.Search and update was done with coccinelle and the invaluable help of
Julia Lawall.Signed-off-by: Thomas Gleixner
Cc: Julia Lawall
Cc: Jiang Liu
Cc: Linus Walleij
Cc: Alexandre Courbot
Cc: linux-gpio@vger.kernel.org -
Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc while we
already have a pointer to corresponding irq_desc.Preparatory patch for the removal of the 'irq' argument from irq flow
handlers.Signed-off-by: Jiang Liu
Acked-by: Linus Walleij
Cc: Alexandre Courbot
Signed-off-by: Thomas Gleixner -
Chained irq handlers usually set up handler data as well. We now have
a function to set both under irq_desc->lock. Replace the two calls
with one.Search and conversion was done with coccinelle:
Reported-by: Russell King
Signed-off-by: Thomas Gleixner
Cc: Julia Lawall
Cc: Linus Walleij
Cc: Alexandre Courbot
Cc: linux-gpio@vger.kernel.org
08 Apr, 2015
1 commit
-
Level IRQ handlers and edge IRQ handler are managed by tow different
sets of registers. But currently the driver uses the same mask for the
both registers. It lead to issues with the following scenario:First, an IRQ is requested on a GPIO to be triggered on front. After,
this an other IRQ is requested for a GPIO of the same bank but
triggered on level. Then the first one will be also setup to be
triggered on level. It leads to an interrupt storm.The different kind of handler are already associated with two
different irq chip type. With this patch the driver uses a private
mask for each one which solves this issue.It has been tested on an Armada XP based board and on an Armada 375
board. For the both boards, with this patch is applied, there is no
such interrupt storm when running the previous scenario.This bug was already fixed but in a different way in the legacy
version of this driver by Evgeniy Dushistov:
9ece8839b1277fb9128ff6833411614ab6c88d68 "ARM: orion: Fix for certain
sequence of request_irq can cause irq storm". The fact the new version
of the gpio drive could be affected had been discussed there:
http://thread.gmane.org/gmane.linux.ports.arm.kernel/344670/focus=364012Reported-by: Evgeniy A. Dushistov
Signed-off-by: Gregory CLEMENT
Cc: # v3.7 +
Signed-off-by: Linus Walleij
16 Jan, 2015
2 commits
-
Ensure that when there is an error during probe that the gpiochip is
removed and the generic irq chip is removed.Signed-off-by: Andrew Lunn
Signed-off-by: Linus Walleij -
Wrap some long lines.
Prefer seq_puts() over seq_printf().
space to tab conversions.
Spelling error fix.Signed-off-by: Andrew Lunn
Signed-off-by: Linus Walleij
15 Dec, 2014
1 commit
-
Pull driver core update from Greg KH:
"Here's the set of driver core patches for 3.19-rc1.They are dominated by the removal of the .owner field in platform
drivers. They touch a lot of files, but they are "simple" changes,
just removing a line in a structure.Other than that, a few minor driver core and debugfs changes. There
are some ath9k patches coming in through this tree that have been
acked by the wireless maintainers as they relied on the debugfs
changes.Everything has been in linux-next for a while"
* tag 'driver-core-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (324 commits)
Revert "ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries"
fs: debugfs: add forward declaration for struct device type
firmware class: Deletion of an unnecessary check before the function call "vunmap"
firmware loader: fix hung task warning dump
devcoredump: provide a one-way disable function
device: Add dev__once variants
ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries
ath: use seq_file api for ath9k debugfs files
debugfs: add helper function to create device related seq_file
drivers/base: cacheinfo: remove noisy error boot message
Revert "core: platform: add warning if driver has no owner"
drivers: base: support cpu cache information interface to userspace via sysfs
drivers: base: add cpu_device_create to support per-cpu devices
topology: replace custom attribute macros with standard DEVICE_ATTR*
cpumask: factor out show_cpumap into separate helper function
driver core: Fix unbalanced device reference in drivers_probe
driver core: fix race with userland in device_add()
sysfs/kernfs: make read requests on pre-alloc files use the buffer.
sysfs/kernfs: allow attributes to request write buffer be pre-allocated.
fs: sysfs: return EGBIG on write if offset is larger than file size
...
03 Nov, 2014
1 commit
-
This commit adds the implementation of ->suspend() and ->resume()
platform_driver hooks in order to save and restore the state of the
GPIO configuration. In order to achieve that, additional fields are
added to the mvebu_gpio_chip structure.Signed-off-by: Thomas Petazzoni
Acked-by: Alexandre Courbot
Signed-off-by: Linus Walleij