15 Feb, 2020

1 commit


31 May, 2019

1 commit

  • Based on 1 normalized pattern(s):

    this program is free software you can redistribute it and or modify
    it under the terms of the gnu general public license as published by
    the free software foundation either version 2 of the license or at
    your option any later version

    extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-or-later

    has been chosen to replace the boilerplate/reference in 3029 file(s).

    Signed-off-by: Thomas Gleixner
    Reviewed-by: Allison Randal
    Cc: linux-spdx@vger.kernel.org
    Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de
    Signed-off-by: Greg Kroah-Hartman

    Thomas Gleixner
     

21 May, 2019

1 commit


31 Oct, 2018

1 commit

  • Move remaining definitions and declarations from include/linux/bootmem.h
    into include/linux/memblock.h and remove the redundant header.

    The includes were replaced with the semantic patch below and then
    semi-automated removal of duplicated '#include

    @@
    @@
    - #include
    + #include

    [sfr@canb.auug.org.au: dma-direct: fix up for the removal of linux/bootmem.h]
    Link: http://lkml.kernel.org/r/20181002185342.133d1680@canb.auug.org.au
    [sfr@canb.auug.org.au: powerpc: fix up for removal of linux/bootmem.h]
    Link: http://lkml.kernel.org/r/20181005161406.73ef8727@canb.auug.org.au
    [sfr@canb.auug.org.au: x86/kaslr, ACPI/NUMA: fix for linux/bootmem.h removal]
    Link: http://lkml.kernel.org/r/20181008190341.5e396491@canb.auug.org.au
    Link: http://lkml.kernel.org/r/1536927045-23536-30-git-send-email-rppt@linux.vnet.ibm.com
    Signed-off-by: Mike Rapoport
    Signed-off-by: Stephen Rothwell
    Acked-by: Michal Hocko
    Cc: Catalin Marinas
    Cc: Chris Zankel
    Cc: "David S. Miller"
    Cc: Geert Uytterhoeven
    Cc: Greentime Hu
    Cc: Greg Kroah-Hartman
    Cc: Guan Xuetao
    Cc: Ingo Molnar
    Cc: "James E.J. Bottomley"
    Cc: Jonas Bonn
    Cc: Jonathan Corbet
    Cc: Ley Foon Tan
    Cc: Mark Salter
    Cc: Martin Schwidefsky
    Cc: Matt Turner
    Cc: Michael Ellerman
    Cc: Michal Simek
    Cc: Palmer Dabbelt
    Cc: Paul Burton
    Cc: Richard Kuo
    Cc: Richard Weinberger
    Cc: Rich Felker
    Cc: Russell King
    Cc: Serge Semin
    Cc: Thomas Gleixner
    Cc: Tony Luck
    Cc: Vineet Gupta
    Cc: Yoshinori Sato
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Mike Rapoport
     

21 Aug, 2018

1 commit

  • commit 01cf9d524ff0 ("microblaze/PCI: Support generic Xilinx AXI PCIe Host
    Bridge IP driver")

    and

    commit ecf677c8dcaa ("PCI: Add a generic weak pcibios_align_resource()")

    first patched then removed pcibios_align_resource() from the microblaze
    architecture code but failed to remove the comment that was added to
    it.

    Remove it since it has now become stale and it is quite confusing.

    Signed-off-by: Lorenzo Pieralisi
    Cc: Palmer Dabbelt
    Cc: Bjorn Helgaas
    Cc: Bharat Kumar Gogada
    Cc: Michal Simek
    Signed-off-by: Michal Simek

    Lorenzo Pieralisi
     

11 Jul, 2018

1 commit

  • of_iomap() can return NULL. The function is void thus error propagation
    is not possible but at least a WARN_ON() seems warranted here as a silent
    failure might lead to a hard to understand system state.

    Signed-off-by: Nicholas Mc Guire
    Signed-off-by: Michal Simek

    Nicholas Mc Guire
     

08 Jun, 2018

1 commit

  • Pull PCI updates from Bjorn Helgaas:

    - unify AER decoding for native and ACPI CPER sources (Alexandru
    Gagniuc)

    - add TLP header info to AER tracepoint (Thomas Tai)

    - add generic pcie_wait_for_link() interface (Oza Pawandeep)

    - handle AER ERR_FATAL by removing and re-enumerating devices, as
    Downstream Port Containment does (Oza Pawandeep)

    - factor out common code between AER and DPC recovery (Oza Pawandeep)

    - stop triggering DPC for ERR_NONFATAL errors (Oza Pawandeep)

    - share ERR_FATAL recovery path between AER and DPC (Oza Pawandeep)

    - disable ASPM L1.2 substate if we don't have LTR (Bjorn Helgaas)

    - respect platform ownership of LTR (Bjorn Helgaas)

    - clear interrupt status in top half to avoid interrupt storm (Oza
    Pawandeep)

    - neaten pci=earlydump output (Andy Shevchenko)

    - avoid errors when extended config space inaccessible (Gilles Buloz)

    - prevent sysfs disable of device while driver attached (Christoph
    Hellwig)

    - use core interface to report PCIe link properties in bnx2x, bnxt_en,
    cxgb4, ixgbe (Bjorn Helgaas)

    - remove unused pcie_get_minimum_link() (Bjorn Helgaas)

    - fix use-before-set error in ibmphp (Dan Carpenter)

    - fix pciehp timeouts caused by Command Completed errata (Bjorn
    Helgaas)

    - fix refcounting in pnv_php hotplug (Julia Lawall)

    - clear pciehp Presence Detect and Data Link Layer Status Changed on
    resume so we don't miss hotplug events (Mika Westerberg)

    - only request pciehp control if we support it, so platform can use
    ACPI hotplug otherwise (Mika Westerberg)

    - convert SHPC to be builtin only (Mika Westerberg)

    - request SHPC control via _OSC if we support it (Mika Westerberg)

    - simplify SHPC handoff from firmware (Mika Westerberg)

    - fix an SHPC quirk that mistakenly included *all* AMD bridges as well
    as devices from any vendor with device ID 0x7458 (Bjorn Helgaas)

    - assign a bus number even to non-native hotplug bridges to leave
    space for acpiphp additions, to fix a common Thunderbolt xHCI
    hot-add failure (Mika Westerberg)

    - keep acpiphp from scanning native hotplug bridges, to fix common
    Thunderbolt hot-add failures (Mika Westerberg)

    - improve "partially hidden behind bridge" messages from core (Mika
    Westerberg)

    - add macros for PCIe Link Control 2 register (Frederick Lawler)

    - replace IB/hfi1 custom macros with PCI core versions (Frederick
    Lawler)

    - remove dead microblaze and xtensa code (Bjorn Helgaas)

    - use dev_printk() when possible in xtensa and mips (Bjorn Helgaas)

    - remove unused pcie_port_acpi_setup() and portdrv_acpi.c (Bjorn
    Helgaas)

    - add managed interface to get PCI host bridge resources from OF (Jan
    Kiszka)

    - add support for unbinding generic PCI host controller (Jan Kiszka)

    - fix memory leaks when unbinding generic PCI host controller (Jan
    Kiszka)

    - request legacy VGA framebuffer only for VGA devices to avoid false
    device conflicts (Bjorn Helgaas)

    - turn on PCI_COMMAND_IO & PCI_COMMAND_MEMORY in pci_enable_device()
    like everybody else, not in pcibios_fixup_bus() (Bjorn Helgaas)

    - add generic enable function for simple SR-IOV hardware (Alexander
    Duyck)

    - use generic SR-IOV enable for ena, nvme (Alexander Duyck)

    - add ACS quirk for Intel 7th & 8th Gen mobile (Alex Williamson)

    - add ACS quirk for Intel 300 series (Mika Westerberg)

    - enable register clock for Armada 7K/8K (Gregory CLEMENT)

    - reduce Keystone "link already up" log level (Fabio Estevam)

    - move private DT functions to drivers/pci/ (Rob Herring)

    - factor out dwc CONFIG_PCI Kconfig dependencies (Rob Herring)

    - add DesignWare support to the endpoint test driver (Gustavo
    Pimentel)

    - add DesignWare support for endpoint mode (Gustavo Pimentel)

    - use devm_ioremap_resource() instead of devm_ioremap() in dra7xx and
    artpec6 (Gustavo Pimentel)

    - fix Qualcomm bitwise NOT issue (Dan Carpenter)

    - add Qualcomm runtime PM support (Srinivas Kandagatla)

    - fix DesignWare enumeration below bridges (Koen Vandeputte)

    - use usleep() instead of mdelay() in endpoint test (Jia-Ju Bai)

    - add configfs entries for pci_epf_driver device IDs (Kishon Vijay
    Abraham I)

    - clean up pci_endpoint_test driver (Gustavo Pimentel)

    - update Layerscape maintainer email addresses (Minghuan Lian)

    - add COMPILE_TEST to improve build test coverage (Rob Herring)

    - fix Hyper-V bus registration failure caused by domain/serial number
    confusion (Sridhar Pitchai)

    - improve Hyper-V refcounting and coding style (Stephen Hemminger)

    - avoid potential Hyper-V hang waiting for a response that will never
    come (Dexuan Cui)

    - implement Mediatek chained IRQ handling (Honghui Zhang)

    - fix vendor ID & class type for Mediatek MT7622 (Honghui Zhang)

    - add Mobiveil PCIe host controller driver (Subrahmanya Lingappa)

    - add Mobiveil MSI support (Subrahmanya Lingappa)

    - clean up clocks, MSI, IRQ mappings in R-Car probe failure paths
    (Marek Vasut)

    - poll more frequently (5us vs 5ms) while waiting for R-Car data link
    active (Marek Vasut)

    - use generic OF parsing interface in R-Car (Vladimir Zapolskiy)

    - add R-Car V3H (R8A77980) "compatible" string (Sergei Shtylyov)

    - add R-Car gen3 PHY support (Sergei Shtylyov)

    - improve R-Car PHYRDY polling (Sergei Shtylyov)

    - clean up R-Car macros (Marek Vasut)

    - use runtime PM for R-Car controller clock (Dien Pham)

    - update arm64 defconfig for Rockchip (Shawn Lin)

    - refactor Rockchip code to facilitate both root port and endpoint
    mode (Shawn Lin)

    - add Rockchip endpoint mode driver (Shawn Lin)

    - support VMD "membar shadow" feature (Jon Derrick)

    - support VMD bus number offsets (Jon Derrick)

    - add VMD "no AER source ID" quirk for more device IDs (Jon Derrick)

    - remove unnecessary host controller CONFIG_PCIEPORTBUS Kconfig
    selections (Bjorn Helgaas)

    - clean up quirks.c organization and whitespace (Bjorn Helgaas)

    * tag 'pci-v4.18-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (144 commits)
    PCI/AER: Replace struct pcie_device with pci_dev
    PCI/AER: Remove unused parameters
    PCI: qcom: Include gpio/consumer.h
    PCI: Improve "partially hidden behind bridge" log message
    PCI: Improve pci_scan_bridge() and pci_scan_bridge_extend() doc
    PCI: Move resource distribution for single bridge outside loop
    PCI: Account for all bridges on bus when distributing bus numbers
    ACPI / hotplug / PCI: Drop unnecessary parentheses
    ACPI / hotplug / PCI: Mark stale PCI devices disconnected
    ACPI / hotplug / PCI: Don't scan bridges managed by native hotplug
    PCI: hotplug: Add hotplug_is_native()
    PCI: shpchp: Add shpchp_is_native()
    PCI: shpchp: Fix AMD POGO identification
    PCI: mobiveil: Add MSI support
    PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver
    PCI/AER: Decode Error Source Requester ID
    PCI/AER: Remove aer_recover_work_func() forward declaration
    PCI/DPC: Use the generic pcie_do_fatal_recovery() path
    PCI/AER: Pass service type to pcie_do_fatal_recovery()
    PCI/DPC: Disable ERR_NONFATAL handling by DPC
    ...

    Linus Torvalds
     

22 May, 2018

2 commits


23 Apr, 2018

1 commit


19 Mar, 2018

1 commit

  • Commit f719582435 ("PCI: Add pci_mmap_resource_range() and use it for
    ARM64") added this generic function with the intent of using it
    everywhere and ultimately killing the old arch-specific implementations.

    Let's get on with that eradication...

    Signed-off-by: David Woodhouse
    Signed-off-by: Michal Simek

    David Woodhouse
     

02 Nov, 2017

1 commit

  • Many source files in the tree are missing licensing information, which
    makes it harder for compliance tools to determine the correct license.

    By default all files without license information are under the default
    license of the kernel, which is GPL version 2.

    Update the files which contain no license information with the 'GPL-2.0'
    SPDX license identifier. The SPDX identifier is a legally binding
    shorthand, which can be used instead of the full boiler plate text.

    This patch is based on work done by Thomas Gleixner and Kate Stewart and
    Philippe Ombredanne.

    How this work was done:

    Patches were generated and checked against linux-4.14-rc6 for a subset of
    the use cases:
    - file had no licensing information it it.
    - file was a */uapi/* one with no licensing information in it,
    - file was a */uapi/* one with existing licensing information,

    Further patches will be generated in subsequent months to fix up cases
    where non-standard license headers were used, and references to license
    had to be inferred by heuristics based on keywords.

    The analysis to determine which SPDX License Identifier to be applied to
    a file was done in a spreadsheet of side by side results from of the
    output of two independent scanners (ScanCode & Windriver) producing SPDX
    tag:value files created by Philippe Ombredanne. Philippe prepared the
    base worksheet, and did an initial spot review of a few 1000 files.

    The 4.13 kernel was the starting point of the analysis with 60,537 files
    assessed. Kate Stewart did a file by file comparison of the scanner
    results in the spreadsheet to determine which SPDX license identifier(s)
    to be applied to the file. She confirmed any determination that was not
    immediately clear with lawyers working with the Linux Foundation.

    Criteria used to select files for SPDX license identifier tagging was:
    - Files considered eligible had to be source code files.
    - Make and config files were included as candidates if they contained >5
    lines of source
    - File already had some variant of a license header in it (even if
    Reviewed-by: Philippe Ombredanne
    Reviewed-by: Thomas Gleixner
    Signed-off-by: Greg Kroah-Hartman

    Greg Kroah-Hartman
     

09 Sep, 2017

1 commit

  • Pull PCI updates from Bjorn Helgaas:

    - add enhanced Downstream Port Containment support, which prints more
    details about Root Port Programmed I/O errors (Dongdong Liu)

    - add Layerscape ls1088a and ls2088a support (Hou Zhiqiang)

    - add MediaTek MT2712 and MT7622 support (Ryder Lee)

    - add MediaTek MT2712 and MT7622 MSI support (Honghui Zhang)

    - add Qualcom IPQ8074 support (Varadarajan Narayanan)

    - add R-Car r8a7743/5 device tree support (Biju Das)

    - add Rockchip per-lane PHY support for better power management (Shawn
    Lin)

    - fix IRQ mapping for hot-added devices by replacing the
    pci_fixup_irqs() boot-time design with a host bridge hook called at
    probe-time (Lorenzo Pieralisi, Matthew Minter)

    - fix race when enabling two devices that results in upstream bridge
    not being enabled correctly (Srinath Mannam)

    - fix pciehp power fault infinite loop (Keith Busch)

    - fix SHPC bridge MSI hotplug events by enabling bus mastering
    (Aleksandr Bezzubikov)

    - fix a VFIO issue by correcting PCIe capability sizes (Alex
    Williamson)

    - fix an INTD issue on Xilinx and possibly other drivers by unifying
    INTx IRQ domain support (Paul Burton)

    - avoid IOMMU stalls by marking AMD Stoney GPU ATS as broken (Joerg
    Roedel)

    - allow APM X-Gene device assignment to guests by adding an ACS quirk
    (Feng Kan)

    - fix driver crashes by disabling Extended Tags on Broadcom HT2100
    (Extended Tags support is required for PCIe Receivers but not
    Requesters, and we now enable them by default when Requesters support
    them) (Sinan Kaya)

    - fix MSIs for devices that use phantom RIDs for DMA by assuming MSIs
    use the real Requester ID (not a phantom RID) (Robin Murphy)

    - prevent assignment of Intel VMD children to guests (which may be
    supported eventually, but isn't yet) by not associating an IOMMU with
    them (Jon Derrick)

    - fix Intel VMD suspend/resume by releasing IRQs on suspend (Scott
    Bauer)

    - fix a Function-Level Reset issue with Intel 750 NVMe by waiting
    longer (up to 60sec instead of 1sec) for device to become ready
    (Sinan Kaya)

    - fix a Function-Level Reset issue on iProc Stingray by working around
    hardware defects in the CRS implementation (Oza Pawandeep)

    - fix an issue with Intel NVMe P3700 after an iProc reset by adding a
    delay during shutdown (Oza Pawandeep)

    - fix a Microsoft Hyper-V lockdep issue by polling instead of blocking
    in compose_msi_msg() (Stephen Hemminger)

    - fix a wireless LAN driver timeout by clearing DesignWare MSI
    interrupt status after it is handled, not before (Faiz Abbas)

    - fix DesignWare ATU enable checking (Jisheng Zhang)

    - reduce Layerscape dependencies on the bootloader by doing more
    initialization in the driver (Hou Zhiqiang)

    - improve Intel VMD performance allowing allocation of more IRQ vectors
    than present CPUs (Keith Busch)

    - improve endpoint framework support for initial DMA mask, different
    BAR sizes, configurable page sizes, MSI, test driver, etc (Kishon
    Vijay Abraham I, Stan Drozd)

    - rework CRS support to add periodic messages while we poll during
    enumeration and after Function-Level Reset and prepare for possible
    other uses of CRS (Sinan Kaya)

    - clean up Root Port AER handling by removing unnecessary code and
    moving error handler methods to struct pcie_port_service_driver
    (Christoph Hellwig)

    - clean up error handling paths in various drivers (Bjorn Andersson,
    Fabio Estevam, Gustavo A. R. Silva, Harunobu Kurokawa, Jeffy Chen,
    Lorenzo Pieralisi, Sergei Shtylyov)

    - clean up SR-IOV resource handling by disabling VF decoding before
    updating the corresponding resource structs (Gavin Shan)

    - clean up DesignWare-based drivers by unifying quirks to update Class
    Code and Interrupt Pin and related handling of write-protected
    registers (Hou Zhiqiang)

    - clean up by adding empty generic pcibios_align_resource() and
    pcibios_fixup_bus() and removing empty arch-specific implementations
    (Palmer Dabbelt)

    - request exclusive reset control for several drivers to allow cleanup
    elsewhere (Philipp Zabel)

    - constify various structures (Arvind Yadav, Bhumika Goyal)

    - convert from full_name() to %pOF (Rob Herring)

    - remove unused variables from iProc, HiSi, Altera, Keystone (Shawn
    Lin)

    * tag 'pci-v4.14-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (170 commits)
    PCI: xgene: Clean up whitespace
    PCI: xgene: Define XGENE_PCI_EXP_CAP and use generic PCI_EXP_RTCTL offset
    PCI: xgene: Fix platform_get_irq() error handling
    PCI: xilinx-nwl: Fix platform_get_irq() error handling
    PCI: rockchip: Fix platform_get_irq() error handling
    PCI: altera: Fix platform_get_irq() error handling
    PCI: spear13xx: Fix platform_get_irq() error handling
    PCI: artpec6: Fix platform_get_irq() error handling
    PCI: armada8k: Fix platform_get_irq() error handling
    PCI: dra7xx: Fix platform_get_irq() error handling
    PCI: exynos: Fix platform_get_irq() error handling
    PCI: iproc: Clean up whitespace
    PCI: iproc: Rename PCI_EXP_CAP to IPROC_PCI_EXP_CAP
    PCI: iproc: Add 500ms delay during device shutdown
    PCI: Fix typos and whitespace errors
    PCI: Remove unused "res" variable from pci_resource_io()
    PCI: Correct kernel-doc of pci_vpd_srdt_size(), pci_vpd_srdt_tag()
    PCI/AER: Reformat AER register definitions
    iommu/vt-d: Prevent VMD child devices from being remapping targets
    x86/PCI: Use is_vmd() rather than relying on the domain number
    ...

    Linus Torvalds
     

29 Aug, 2017

1 commit


11 Aug, 2017

1 commit

  • 01cf9d524ff0 ("microblaze/PCI: Support generic Xilinx AXI PCIe Host Bridge
    IP driver") removed pcibios calls to:

    pcibios_setup_bus_self()
    pcibios_setup_bus_devices()

    Given that pcibios_fixup_bus() was the only caller of those functions they
    have now become dead code (along with the functions they were calling in
    turn), so they can be removed.

    Signed-off-by: Lorenzo Pieralisi
    [bhelgaas: remove "Fixup resources of a PCIPCI bridge" comment]
    Signed-off-by: Bjorn Helgaas
    Acked-by: Michal Simek
    Cc: Bharat Kumar Gogada
    Cc: Ravi Kiran Gummaluri

    Lorenzo Pieralisi
     

03 Aug, 2017

2 commits

  • Multiple architectures define this as a trivial function, and I'm adding
    another one as part of the RISC-V port. Add a __weak version of
    pcibios_align_resource() and delete the now-obselete ones in a handful of
    ports.

    The only functional change should be that a handful of ports used to export
    pcibios_fixup_bus(). Only some architectures export this, so I just
    dropped it.

    Signed-off-by: Palmer Dabbelt
    Signed-off-by: Bjorn Helgaas

    Palmer Dabbelt
     
  • Multiple architectures define this as an empty function, and I'm adding
    another one as part of the RISC-V port. Add a __weak version of
    pcibios_fixup_bus() and delete the now-obselete ones in a handful of
    ports.

    The only functional change should be that microblaze used to export
    pcibios_fixup_bus(). None of the other architectures exports this, so I
    just dropped it.

    Signed-off-by: Palmer Dabbelt
    Signed-off-by: Bjorn Helgaas

    Palmer Dabbelt
     

20 Apr, 2017

1 commit


25 Feb, 2017

1 commit

  • Remove the prototypes for shmem_mapping() and shmem_zero_setup() from
    linux/mm.h, since they are already provided in linux/shmem_fs.h. But
    shmem_fs.h must then provide the inline stub for shmem_mapping() when
    CONFIG_SHMEM is not set, and a few more cfiles now need to #include it.

    Link: http://lkml.kernel.org/r/alpine.LSU.2.11.1702081658250.1549@eggly.anvils
    Signed-off-by: Hugh Dickins
    Cc: Johannes Weiner
    Cc: Michal Simek
    Cc: Michael Ellerman
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Hugh Dickins
     

13 Sep, 2016

1 commit

  • We create a procfs directory for every PCI bus. Previously, the directory
    name was just the bus number, so using the same bus number in different
    domains caused a kernel crash when we tried to create a duplicate
    directory.

    Make pci_proc_domain() return the domain number, so procfs directories for
    buses in domain 0 are named with just the bus number, and directories for
    buses in other domains include both the domain number and the bus number.

    [bhelgaas: changelog]
    Signed-off-by: Bharat Kumar Gogada
    Signed-off-by: Bjorn Helgaas
    Acked-by: Michal Simek

    Bharat Kumar Gogada
     

18 Jun, 2016

2 commits

  • "User" addresses are shown in /sys/devices/pci.../.../resource and
    /proc/bus/pci/devices and used as mmap offsets for /proc/bus/pci/BB/DD.F
    files. For I/O port resources on microblaze, these are PCI bus addresses,
    i.e., raw BAR values.

    Previously pci_resource_to_user() computed the user address by subtracting
    "hose->io_base_virt - _IO_BASE" from the resource start:

    pci_resource_to_user()
    if (IO)
    offset = (unsigned long)hose->io_base_virt - _IO_BASE;
    *start = rsrc->start - offset;

    We've already told the PCI core about that "hose->io_base_virt - _IO_BASE"
    offset:

    pcibios_setup_phb_resources()
    res = &hose->io_resource;
    pci_add_resource_offset(resources, res, hose->io_base_virt - _IO_BASE);

    so pcibios_resource_to_bus() knows how to do that translation.

    No functional change intended.

    Signed-off-by: Bjorn Helgaas
    Acked-by: Yinghai Lu

    Bjorn Helgaas
     
  • The microblaze __pci_mmap_set_pgprot() was apparently copied from powerpc,
    where it computes either an uncacheable pgprot_t or a write-combining one.
    But on microblaze, we always use the regular uncacheable pgprot_t.

    Remove the useless code in __pci_mmap_set_pgprot() and inline it at the
    only call site.

    Signed-off-by: Bjorn Helgaas
    Acked-by: Yinghai Lu

    Bjorn Helgaas
     

16 May, 2016

1 commit

  • ERROR: "isa_io_base" [sound/pci/vx222/snd-vx222.ko] undefined!
    ERROR: "isa_io_base" [sound/pci/trident/snd-trident.ko] undefined!
    ERROR: "isa_io_base" [sound/pci/snd-via82xx.ko] undefined!
    ...
    ERROR: "isa_io_base" [drivers/watchdog/wdt_pci.ko] undefined!
    ERROR: "isa_io_base" [drivers/watchdog/pcwd_pci.ko] undefined!
    ERROR: "isa_io_base" [drivers/video/vgastate.ko] undefined!
    ...
    ERROR: "isa_io_base" [drivers/video/fbdev/cirrusfb.ko] undefined!
    ERROR: "isa_io_base" [drivers/video/fbdev/arkfb.ko] undefined!
    ERROR: "isa_io_base" [drivers/usb/host/uhci-hcd.ko] undefined!
    ERROR: "isa_io_base" [drivers/usb/host/isp1362-hcd.ko] undefined!
    ERROR: "isa_io_base" [drivers/tty/serial/jsm/jsm.ko] undefined!
    ERROR: "isa_io_base" [drivers/tty/serial/8250/8250_pci.ko] undefined!
    ...
    ERROR: "isa_io_base" [drivers/scsi/qla2xxx/qla2xxx.ko] undefined!
    ERROR: "isa_io_base" [drivers/scsi/ppa.ko] undefined!

    Signed-off-by: Fengguang Wu
    Signed-off-by: Michal Simek

    Fengguang Wu
     

09 Mar, 2016

1 commit


16 Sep, 2015

1 commit

  • Revert dff22d2054b5 ("PCI: Call pci_read_bridge_bases() from core instead
    of arch code").

    Reading PCI bridge windows is not arch-specific in itself, but there is PCI
    core code that doesn't work correctly if we read them too early. For
    example, Hannes found this case on an ARM Freescale i.mx6 board:

    pci_bus 0000:00: root bus resource [mem 0x01000000-0x01efffff]
    pci 0000:00:00.0: PCI bridge to [bus 01-ff]
    pci 0000:00:00.0: BAR 8: no space for [mem size 0x01000000] (mem window)
    pci 0000:01:00.0: BAR 2: failed to assign [mem size 0x00200000]
    pci 0000:01:00.0: BAR 1: failed to assign [mem size 0x00004000]
    pci 0000:01:00.0: BAR 0: failed to assign [mem size 0x00000100]

    The 00:00.0 mem window needs to be at least 3MB: the 01:00.0 device needs
    0x204100 of space, and mem windows are megabyte-aligned.

    Bus sizing can increase a bridge window size, but never *decrease* it (see
    d65245c3297a ("PCI: don't shrink bridge resources")). Prior to
    dff22d2054b5, ARM didn't read bridge windows at all, so the "original size"
    was zero, and we assigned a 3MB window.

    After dff22d2054b5, we read the bridge windows before sizing the bus. The
    firmware programmed a 16MB window (size 0x01000000) in 00:00.0, and since
    we never decrease the size, we kept 16MB even though we only needed 3MB.
    But 16MB doesn't fit in the host bridge aperture, so we failed to assign
    space for the window and the downstream devices.

    I think this is a defect in the PCI core: we shouldn't rely on the firmware
    to assign sensible windows.

    Ray reported a similar problem, also on ARM, with Broadcom iProc.

    Issues like this are too hard to fix right now, so revert dff22d2054b5.

    Reported-by: Hannes
    Reported-by: Ray Jui
    Link: http://lkml.kernel.org/r/CAAa04yFQEUJm7Jj1qMT57-LG7ZGtnhNDBe=PpSRa70Mj+XhW-A@mail.gmail.com
    Link: http://lkml.kernel.org/r/55F75BB8.4070405@broadcom.com
    Signed-off-by: Bjorn Helgaas
    Acked-by: Yinghai Lu
    Acked-by: Lorenzo Pieralisi

    Bjorn Helgaas
     

23 Jul, 2015

1 commit

  • When we scan a PCI bus, we read PCI-PCI bridge window registers with
    pci_read_bridge_bases() so we can validate the resource hierarchy. Most
    architectures call pci_read_bridge_bases() from pcibios_fixup_bus(), but
    PCI-PCI bridges are not arch-specific, so this doesn't need to be in
    arch-specific code.

    Call pci_read_bridge_bases() directly from the PCI core instead of from
    arch code.

    For alpha and mips, we now call pci_read_bridge_bases() always; previously
    we only called it if PCI_PROBE_ONLY was set.

    [bhelgaas: changelog]
    Signed-off-by: Lorenzo Pieralisi
    Signed-off-by: Bjorn Helgaas
    CC: Ralf Baechle
    CC: James E.J. Bottomley
    CC: Michael Ellerman
    CC: Bjorn Helgaas
    CC: Richard Henderson
    CC: Benjamin Herrenschmidt
    CC: David Howells
    CC: Russell King
    CC: Tony Luck
    CC: David S. Miller
    CC: Ingo Molnar
    CC: Guenter Roeck
    CC: Michal Simek
    CC: Chris Zankel

    Lorenzo Pieralisi
     

19 Mar, 2015

1 commit

  • Previously, pci_scan_root_bus() created a root PCI bus, enumerated the
    devices on it, and called pci_bus_add_devices(), which made the devices
    available for drivers to claim them.

    Most callers assigned resources to devices after pci_scan_root_bus()
    returns, which may be after drivers have claimed the devices. This is
    incorrect; the PCI core should not change device resources while a driver
    is managing the device.

    Remove pci_bus_add_devices() from pci_scan_root_bus() and do it after any
    resource assignment in the callers.

    Note that ARM's pci_common_init_dev() already called pci_bus_add_devices()
    after pci_scan_root_bus(), so we only need to remove the first call:

    pci_common_init_dev
    pcibios_init_hw
    pci_scan_root_bus
    pci_bus_add_devices # first call
    pci_bus_assign_resources
    pci_bus_add_devices # second call

    [bhelgaas: changelog, drop "root_bus" var in alpha common_init_pci(),
    return failure earlier in mn10300, add "return" in x86 pcibios_scan_root(),
    return early if xtensa platform_pcibios_fixup() fails]
    Signed-off-by: Yijing Wang
    Signed-off-by: Bjorn Helgaas
    CC: Richard Henderson
    CC: Ivan Kokshaysky
    CC: Matt Turner
    CC: David Howells
    CC: Tony Luck
    CC: Michal Simek
    CC: Ralf Baechle
    CC: Koichi Yasutake
    CC: Sebastian Ott
    CC: "David S. Miller"
    CC: Chris Metcalf
    CC: Chris Zankel
    CC: Max Filippov
    CC: Thomas Gleixner

    Yijing Wang
     

17 Jan, 2015

1 commit

  • Every PCI-PCI bridge window should fit inside an upstream bridge window
    because orphaned address space is unreachable from the primary side of the
    upstream bridge. If we inherit invalid bridge windows that overlap an
    upstream window from firmware, clip them to fit and update the bridge
    accordingly.

    [bhelgaas: changelog]
    Link: https://bugzilla.kernel.org/show_bug.cgi?id=85491
    Reported-by: Marek Kordik
    Fixes: 5b28541552ef ("PCI: Restrict 64-bit prefetchable bridge windows to 64-bit resources")
    Signed-off-by: Yinghai Lu
    Signed-off-by: Bjorn Helgaas
    CC: Michal Simek
    CC: Benjamin Herrenschmidt
    CC: Sebastian Ott

    Yinghai Lu
     

27 Oct, 2014

1 commit


06 Jun, 2014

1 commit

  • Pull Microblaze updates from Michal Simek:
    - cleanup PCI and DMA handling
    - use generic device.h
    - some cleanups

    * tag 'microblaze-3.16-rc1' of git://git.monstr.eu/linux-2.6-microblaze:
    microblaze: Fix typo in head.S s/substract/subtract/
    microblaze: remove check for CONFIG_XILINX_CONSOLE
    microblaze: Use generic device.h
    microblaze: Do not setup empty unmap_sg function
    microblaze: Remove device_to_mask
    microblaze: Clean device dma_ops structure
    microblaze: Cleanup PCI_DRAM_OFFSET handling
    microblaze: Do not setup pci_dma_ops
    microblaze: Return default dma operations
    microblaze: Enable SERIAL_OF_PLATFORM

    Linus Torvalds
     

04 Jun, 2014

2 commits


01 May, 2014

1 commit

  • Move the devspec OF attribute to PCI common code's set of device attributes
    since it's not architecture dependent. As a side effect microblaze and
    powerpc no longer need to use pcibios_add_platform_entries().

    [bhelgaas: fold in #include for compile error]
    Link: https://lkml.kernel.org/r/alpine.LFD.2.11.1404141101500.1529@denkbrett
    Signed-off-by: Sebastian Ott
    Signed-off-by: Bjorn Helgaas
    Acked-by: Benjamin Herrenschmidt

    Sebastian Ott
     

20 Mar, 2014

1 commit


08 Nov, 2013

1 commit


24 Oct, 2013

4 commits

  • The Microblaze PCI code copied the PowerPC irq handling, but powerpc
    needs to handle broken device trees that are not present on Microblaze.
    This patch removes the powerpc special case and replaces it with a
    direct of_irq_parse_and_map_pci() call.

    Signed-off-by: Grant Likely
    Acked-by: Michal Simek

    Grant Likely
     
  • All the callers of irq_create_of_mapping() pass the contents of a struct
    of_phandle_args structure to the function. Since all the callers already
    have an of_phandle_args pointer, why not pass it directly to
    irq_create_of_mapping()?

    Signed-off-by: Grant Likely
    Acked-by: Michal Simek
    Acked-by: Tony Lindgren
    Cc: Thomas Gleixner
    Cc: Russell King
    Cc: Ralf Baechle
    Cc: Benjamin Herrenschmidt

    Grant Likely
     
  • struct of_irq and struct of_phandle_args are exactly the same structure.
    This patch makes the kernel use of_phandle_args everywhere. This in
    itself isn't a big deal, but it makes some follow-on patches simpler.

    Signed-off-by: Grant Likely
    Acked-by: Michal Simek
    Acked-by: Tony Lindgren
    Cc: Russell King
    Cc: Ralf Baechle
    Cc: Benjamin Herrenschmidt

    Grant Likely
     
  • The OF irq handling code has been overloading the term 'map' to refer to
    both parsing the data in the device tree and mapping it to the internal
    linux irq system. This is probably because the device tree does have the
    concept of an 'interrupt-map' function for translating interrupt
    references from one node to another, but 'map' is still confusing when
    the primary purpose of some of the functions are to parse the DT data.

    This patch renames all the of_irq_map_* functions to of_irq_parse_*
    which makes it clear that there is a difference between the parsing
    phase and the mapping phase. Kernel code can make use of just the
    parsing or just the mapping support as needed by the subsystem.

    The patch was generated mechanically with a handful of sed commands.

    Signed-off-by: Grant Likely
    Acked-by: Michal Simek
    Acked-by: Tony Lindgren
    Cc: Ralf Baechle
    Cc: Benjamin Herrenschmidt

    Grant Likely
     

10 Oct, 2013

1 commit

  • While powerpc is a mess of implicit includes by prom.h, microblaze just
    copied this and is easily fixed. Add the necessary explicit includes and
    remove unnecessary includes and other parts from prom.h

    Signed-off-by: Rob Herring
    Acked-by: Grant Likely
    Cc: Michal Simek
    Cc: microblaze-uclinux@itee.uq.edu.au
    Cc: netdev@vger.kernel.org

    Rob Herring