Eric Lee / smarc-fsl-linux-kernel

15 Jul, 2018

1 commit

  • 29de76240   fpga: dfl: fme: add partial reconfiguration sub feature support ... Browse Code ยป

    Partial Reconfiguration (PR) is the most important function for FME. It
    allows reconfiguration for given Port/Accelerated Function Unit (AFU).

    It creates platform devices for fpga-mgr, fpga-regions and fpga-bridges,
    and invokes fpga-region's interface (fpga_region_program_fpga) for PR
    operation once PR request received via ioctl. Below user space interface
    is exposed by this sub feature.

    Ioctl interface:
    * DFL_FPGA_FME_PORT_PR
    Do partial reconfiguration per information from userspace, including
    target port(AFU), buffer size and address info. It returns error code
    to userspace if failed. For detailed PR error information, user needs
    to read fpga-mgr's status sysfs interface.

    Signed-off-by: Tim Whisonant
    Signed-off-by: Enno Luebbers
    Signed-off-by: Shiva Rao
    Signed-off-by: Christopher Rauer
    Signed-off-by: Kang Luwei
    Signed-off-by: Xiao Guangrong
    Signed-off-by: Wu Hao
    Acked-by: Alan Tull
    Signed-off-by: Greg Kroah-Hartman

    Kang Luwei