Eric Lee / smarc-fsl-linux-kernel

16 Jul, 2020

3 commits

  • f59dc5119   MIPS: Loongson: Fix boot warning about hwmon_device_register() ... Browse Code »

    Replace hwmon_device_register() with hwmon_device_register_with_info()
    to fix the following boot warning :

    [ 9.029924] Loongson Hwmon Enter...
    [ 9.106850] (NULL device *): hwmon_device_register() is deprecated. Please convert the driver to use hwmon_device_register_with_info().

    Signed-off-by: Zhi Li
    Signed-off-by: Thomas Bogendoerfer

    Zhi Li
     
  • 17cbb0702   MIPS: Loongson: Reduce possible loop times and add log in do_thermal_timer() ... Browse Code »

    Once the temperature of any CPUs is too high, it can power off immediately,
    no need to check the rest of CPUs, and it is better to print a log before
    power off, this is useful when analysis the abnormal issues.

    Signed-off-by: Tiezhu Yang
    Signed-off-by: Zhi Li
    Signed-off-by: Thomas Bogendoerfer

    Tiezhu Yang
     
  • f17d3f218   MIPS: Loongson: Cleanup cpu_hwmon.c ... Browse Code »

    Fix the following checkpatch warnings and errors:

    ERROR: do not initialise statics to 0
    +static int csr_temp_enable = 0;

    WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
    +static SENSOR_DEVICE_ATTR(name, S_IRUGO, get_hwmon_name, NULL, 0);

    WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
    +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, get_cpu_temp, NULL, 1);

    WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
    +static SENSOR_DEVICE_ATTR(temp1_label, S_IRUGO, cpu_temp_label, NULL, 1);

    WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
    +static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, get_cpu_temp, NULL, 2);

    WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
    +static SENSOR_DEVICE_ATTR(temp2_label, S_IRUGO, cpu_temp_label, NULL, 2);

    WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
    +static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, get_cpu_temp, NULL, 3);

    WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
    +static SENSOR_DEVICE_ATTR(temp3_label, S_IRUGO, cpu_temp_label, NULL, 3);

    WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
    +static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, get_cpu_temp, NULL, 4);

    WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
    +static SENSOR_DEVICE_ATTR(temp4_label, S_IRUGO, cpu_temp_label, NULL, 4);

    WARNING: Missing a blank line after declarations
    + int id = (to_sensor_dev_attr(attr))->index - 1;
    + return sprintf(buf, "CPU %d Temperature\n", id);

    WARNING: Missing a blank line after declarations
    + int value = loongson3_cpu_temp(id);
    + return sprintf(buf, "%d\n", value);

    ERROR: spaces required around that '=' (ctx:VxV)
    + for (i=0; i
    Signed-off-by: Zhi Li
    Signed-off-by: Thomas Bogendoerfer

    Tiezhu Yang
     

08 Jul, 2020

1 commit

  • 520010668   MIPS: Loongson64: Make acpi_registers_setup() static ... Browse Code »

    sparse report build warning as follows:

    drivers/platform/mips/rs780e-acpi.c:72:6: warning:
    symbol 'acpi_registers_setup' was not declared. Should it be static?

    And function acpi_registers_setup() is not used outside of this file,
    so marks it static.

    Reported-by: Hulk Robot
    Signed-off-by: Wei Yongjun
    Signed-off-by: Thomas Bogendoerfer

    Wei Yongjun
     

21 Apr, 2020

1 commit

03 Dec, 2019

1 commit

05 Nov, 2019

1 commit

  • dece3c2a3   MIPS: Loongson: Fix return value of loongson_hwmon_init ... Browse Code »

    When call function hwmon_device_register failed, use the actual
    return value instead of always -ENOMEM.

    Fixes: 64f09aa967e1 ("MIPS: Loongson-3: Add CPU Hwmon platform driver")
    Signed-off-by: Tiezhu Yang
    Signed-off-by: Paul Burton
    Cc: Ralf Baechle
    Cc: James Hogan
    Cc: Huacai Chen
    Cc: Jiaxun Yang
    Cc: linux-mips@vger.kernel.org
    Cc: linux-kernel@vger.kernel.org

    Tiezhu Yang
     

02 Nov, 2019

1 commit

08 Oct, 2019

1 commit

  • 7507445b1   MIPS: Loongson: Add Loongson-3A R4 basic support ... Browse Code »

    All Loongson-3 CPU family:

    Code-name Brand-name PRId
    Loongson-3A R1 Loongson-3A1000 0x6305
    Loongson-3A R2 Loongson-3A2000 0x6308
    Loongson-3A R2.1 Loongson-3A2000 0x630c
    Loongson-3A R3 Loongson-3A3000 0x6309
    Loongson-3A R3.1 Loongson-3A3000 0x630d
    Loongson-3A R4 Loongson-3A4000 0xc000
    Loongson-3B R1 Loongson-3B1000 0x6306
    Loongson-3B R2 Loongson-3B1500 0x6307

    Features of R4 revision of Loongson-3A:

    - All R2/R3 features, including SFB, V-Cache, FTLB, RIXI, DSP, etc.
    - Support variable ASID bits.
    - Support MSA and VZ extensions.
    - Support CPUCFG (CPU config) and CSR (Control and Status Register)
    extensions.
    - 64 entries of VTLB (classic TLB), 2048 entries of FTLB (8-way
    set-associative).

    Now 64-bit Loongson processors has three types of PRID.IMP: 0x6300 is
    the classic one so we call it PRID_IMP_LOONGSON_64C (e.g., Loongson-2E/
    2F/3A1000/3B1000/3B1500/3A2000/3A3000), 0x6100 is for some processors
    which has reduced capabilities so we call it PRID_IMP_LOONGSON_64R
    (e.g., Loongson-2K), 0xc000 is supposed to cover all new processors in
    general (e.g., Loongson-3A4000+) so we call it PRID_IMP_LOONGSON_64G.

    Signed-off-by: Huacai Chen
    Signed-off-by: Jiaxun Yang
    Signed-off-by: Paul Burton
    Cc: Ralf Baechle
    Cc: James Hogan
    Cc: linux-mips@linux-mips.org
    Cc: linux-mips@vger.kernel.org
    Cc: Fuxin Zhang
    Cc: Zhangjin Wu
    Cc: Huacai Chen

    Huacai Chen
     

21 May, 2019

2 commits

20 Nov, 2018

1 commit

  • f3ade2536   MIPS: Loongson: Add Loongson-3A R2.1 basic support ... Browse Code »

    Loongson-3A R2.1 is the bugfix revision of Loongson-3A R2.

    All Loongson-3 CPU family:

    Code-name Brand-name PRId
    Loongson-3A R1 Loongson-3A1000 0x6305
    Loongson-3A R2 Loongson-3A2000 0x6308
    Loongson-3A R2.1 Loongson-3A2000 0x630c
    Loongson-3A R3 Loongson-3A3000 0x6309
    Loongson-3A R3.1 Loongson-3A3000 0x630d
    Loongson-3B R1 Loongson-3B1000 0x6306
    Loongson-3B R2 Loongson-3B1500 0x6307

    Signed-off-by: Huacai Chen
    Signed-off-by: Paul Burton
    Patchwork: https://patchwork.linux-mips.org/patch/21128/
    Cc: Ralf Baechle
    Cc: James Hogan
    Cc: Steven J . Hill
    Cc: linux-mips@linux-mips.org
    Cc: Fuxin Zhang
    Cc: Zhangjin Wu

    Huacai Chen
     

24 Jul, 2018

1 commit

  • 7cff3f168   MIPS: Loongson: Add Loongson-3A R3.1 basic support ... Browse Code »

    Loongson-3A R3.1 is the bugfix revision of Loongson-3A R3.

    All Loongson-3 CPU family:

    Code-name Brand-name PRId
    Loongson-3A R1 Loongson-3A1000 0x6305
    Loongson-3A R2 Loongson-3A2000 0x6308
    Loongson-3A R3 Loongson-3A3000 0x6309
    Loongson-3A R3.1 Loongson-3A3000 0x630d
    Loongson-3B R1 Loongson-3B1000 0x6306
    Loongson-3B R2 Loongson-3B1500 0x6307

    Signed-off-by: Huacai Chen
    Signed-off-by: Paul Burton
    Patchwork: https://patchwork.linux-mips.org/patch/19263/
    Cc: Ralf Baechle
    Cc: James Hogan
    Cc: linux-mips@linux-mips.org
    Cc: Fuxin Zhang
    Cc: Zhangjin Wu
    Cc: Huacai Chen

    Huacai Chen
     

29 Jun, 2017

1 commit

28 Jun, 2017

1 commit

  • 0a00024d7   MIPS: Loongson: Add Loongson-3A R3 basic support ... Browse Code »

    Loongson-3A R3 is very similar to Loongson-3A R2.

    All Loongson-3 CPU family:

    Code-name Brand-name PRId
    Loongson-3A R1 Loongson-3A1000 0x6305
    Loongson-3A R2 Loongson-3A2000 0x6308
    Loongson-3A R3 Loongson-3A3000 0x6309
    Loongson-3B R1 Loongson-3B1000 0x6306
    Loongson-3B R2 Loongson-3B1500 0x6307

    Signed-off-by: Huacai Chen
    Cc: John Crispin
    Cc: Steven J . Hill
    Cc: Fuxin Zhang
    Cc: Zhangjin Wu
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/16585/
    Signed-off-by: Ralf Baechle

    Huacai Chen
     

20 May, 2016

1 commit

  • 07b75260e   Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus ... Browse Code »

    Pull MIPS updates from Ralf Baechle:
    "This is the main pull request for MIPS for 4.7. Here's the summary of
    the changes:

    - ATH79: Support for DTB passuing using the UHI boot protocol
    - ATH79: Remove support for builtin DTB.
    - ATH79: Add zboot debug serial support.
    - ATH79: Add initial support for Dragino MS14 (Dragine 2), Onion Omega
    and DPT-Module.
    - ATH79: Update devicetree clock support for AR9132 and AR9331.
    - ATH79: Cleanup the DT code.
    - ATH79: Support newer SOCs in ath79_ddr_ctrl_init.
    - ATH79: Fix regression in PCI window initialization.
    - BCM47xx: Move SPROM driver to drivers/firmware/
    - BCM63xx: Enable partition parser in defconfig.
    - BMIPS: BMIPS5000 has I cache filing from D cache
    - BMIPS: BMIPS: Add cpu-feature-overrides.h
    - BMIPS: Add Whirlwind support
    - BMIPS: Adjust mips-hpt-frequency for BCM7435
    - BMIPS: Remove maxcpus from BCM97435SVMB DTS
    - BMIPS: Add missing 7038 L1 register cells to BCM7435
    - BMIPS: Various tweaks to initialization code.
    - BMIPS: Enable partition parser in defconfig.
    - BMIPS: Cache tweaks.
    - BMIPS: Add UART, I2C and SATA devices to DT.
    - BMIPS: Add BCM6358 and BCM63268support
    - BMIPS: Add device tree example for BCM6358.
    - BMIPS: Improve Improve BCM6328 and BCM6368 device trees
    - Lantiq: Add support for device tree file from boot loader
    - Lantiq: Allow build with no built-in DT.
    - Loongson 3: Reserve 32MB for RS780E integrated GPU.
    - Loongson 3: Fix build error after ld-version.sh modification
    - Loongson 3: Move chipset ACPI code from drivers to arch.
    - Loongson 3: Speedup irq processing.
    - Loongson 3: Add basic Loongson 3A support.
    - Loongson 3: Set cache flush handlers to nop.
    - Loongson 3: Invalidate special TLBs when needed.
    - Loongson 3: Fast TLB refill handler.
    - MT7620: Fallback strategy for invalid syscfg0.
    - Netlogic: Fix CP0_EBASE redefinition warnings
    - Octeon: Initialization fixes
    - Octeon: Add DTS files for the D-Link DSR-1000N and EdgeRouter Lite
    - Octeon: Enable add Octeon-drivers in cavium_octeon_defconfig
    - Octeon: Correctly handle endian-swapped initramfs images.
    - Octeon: Support CN73xx, CN75xx and CN78xx.
    - Octeon: Remove dead code from cvmx-sysinfo.
    - Octeon: Extend number of supported CPUs past 32.
    - Octeon: Remove some code limiting NR_IRQS to 255.
    - Octeon: Simplify octeon_irq_ciu_gpio_set_type.
    - Octeon: Mark some functions __init in smp.c
    - Octeon: Octeon: Add Octeon III CN7xxx interface detection
    - PIC32: Add serial driver and bindings for it.
    - PIC32: Add PIC32 deadman timer driver and bindings.
    - PIC32: Add PIC32 clock timer driver and bindings.
    - Pistachio: Determine SoC revision during boot
    - Sibyte: Fix Kconfig dependencies of SIBYTE_BUS_WATCHER.
    - Sibyte: Strip redundant comments from bcm1480_regs.h.
    - Panic immediately if panic_on_oops is set.
    - module: fix incorrect IS_ERR_VALUE macro usage.
    - module: Make consistent use of pr_*
    - Remove no longer needed work_on_cpu() call.
    - Remove CONFIG_IPV6_PRIVACY from defconfigs.
    - Fix registers of non-crashing CPUs in dumps.
    - Handle MIPSisms in new vmcore_elf32_check_arch.
    - Select CONFIG_HANDLE_DOMAIN_IRQ and make it work.
    - Allow RIXI to be used on non-R2 or R6 cores.
    - Reserve nosave data for hibernation
    - Fix siginfo.h to use strict POSIX types.
    - Don't unwind user mode with EVA.
    - Fix watchpoint restoration
    - Ptrace watchpoints for R6.
    - Sync icache when it fills from dcache
    - I6400 I-cache fills from dcache.
    - Various MSA fixes.
    - Cleanup MIPS_CPU_* definitions.
    - Signal: Move generic copy_siginfo to signal.h
    - Signal: Fix uapi include in exported asm/siginfo.h
    - Timer fixes for sake of KVM.
    - XPA TLB refill fixes.
    - Treat perf counter feature
    - Update John Crispin's email address
    - Add PIC32 watchdog and bindings.
    - Handle R10000 LL/SC bug in set_pte()
    - cpufreq: Various fixes for Longson1.
    - R6: Fix R2 emulation.
    - mathemu: Cosmetic fix to ADDIUPC emulation, plenty of other small fixes
    - ELF: ABI and FP fixes.
    - Allow for relocatable kernel and use that to support KASLR.
    - Fix CPC_BASE_ADDR mask
    - Plenty fo smp-cps, CM, R6 and M6250 fixes.
    - Make reset_control_ops const.
    - Fix kernel command line handling of leading whitespace.
    - Cleanups to cache handling.
    - Add brcm, bcm6345-l1-intc device tree bindings.
    - Use generic clkdev.h header
    - Remove CLK_IS_ROOT usage.
    - Misc small cleanups.
    - CM: Fix compilation error when !MIPS_CM
    - oprofile: Fix a preemption issue
    - Detect DSP ASE v3 support:1"

    * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (275 commits)
    MIPS: pic32mzda: fix getting timer clock rate.
    MIPS: ath79: fix regression in PCI window initialization
    MIPS: ath79: make ath79_ddr_ctrl_init() compatible for newer SoCs
    MIPS: Fix VZ probe gas errors with binutils of MSA context in non-MSA kernels
    MIPS: cevt-r4k: Dynamically calculate min_delta_ns
    MIPS: malta-time: Take seconds into account
    MIPS: malta-time: Start GIC count before syncing to RTC
    MIPS: Force CPUs to lose FP context during mode switches
    ...

    Linus Torvalds
     

13 May, 2016

2 commits

  • b2edcfc81   MIPS: Loongson: Add Loongson-3A R2 basic support ... Browse Code »

    Loongson-3 CPU family:

    Code-name Brand-name PRId
    Loongson-3A R1 Loongson-3A1000 0x6305
    Loongson-3A R2 Loongson-3A2000 0x6308
    Loongson-3B R1 Loongson-3B1000 0x6306
    Loongson-3B R2 Loongson-3B1500 0x6307

    Features of R2 revision of Loongson-3A:

    - Primary cache includes I-Cache, D-Cache and V-Cache (Victim Cache).
    - I-Cache, D-Cache and V-Cache are 16-way set-associative, linesize is
    64 bytes.
    - 64 entries of VTLB (classic TLB), 1024 entries of FTLB (8-way
    set-associative).
    - Supports DSP/DSPv2 instructions, UserLocal register and Read-Inhibit/
    Execute-Inhibit.

    [ralf@linux-mips.org: Resolved merge conflicts.]

    Signed-off-by: Huacai Chen
    Cc: Aurelien Jarno
    Cc: Steven J . Hill
    Cc: Fuxin Zhang
    Cc: Zhangjin Wu
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/12751/
    Patchwork: https://patchwork.linux-mips.org/patch/13136/
    Signed-off-by: Ralf Baechle

    Huacai Chen
     
  • d05147282   MIPS: Loongson-3: Move chipset ACPI code from drivers to arch ... Browse Code »

    SB700/SB710/SB800 chipset ACPI code is mostly Loongson-3 specific
    routines rather than a "platform driver".

    Signed-off-by: Huacai Chen
    Cc: John Crispin
    Cc: Steven J. Hill
    Cc: Fuxin Zhang
    Cc: Zhangjin Wu
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/11273/
    Signed-off-by: Ralf Baechle

    Huacai Chen
     

28 Apr, 2016

1 commit

01 Apr, 2015

2 commits

  • 9c057b3e0   MIPS: Loongson-3: Add chipset ACPI platform driver ... Browse Code »

    This add south-bridge (SB700/SB710/SB800 chipset) ACPI platform driver
    for Loongson-3. This will be used by EC (Embedded Controller, used by
    laptops) driver and STR (Suspend To RAM).

    [ralf@linux-mips.org: Fix build error if !CONFIG_CPU_LOONGSON3. Build
    doesn't like it if no obj-* variable is defined at all in a Makefile.
    Obviously this has not been tested on other platforms.]

    Signed-off-by: Huacai Chen
    Cc: Steven J. Hill
    Cc: linux-mips@linux-mips.org
    Cc: Fuxin Zhang
    Cc: Zhangjin Wu
    Patchwork: https://patchwork.linux-mips.org/patch/9619/
    Signed-off-by: Ralf Baechle

    Huacai Chen
     
  • 64f09aa96   MIPS: Loongson-3: Add CPU Hwmon platform driver ... Browse Code »

    This add CPU Hwmon (temperature sensor) platform driver for Loongson-3.

    Signed-off-by: Huacai Chen
    Cc: Steven J. Hill
    Cc: linux-mips@linux-mips.org
    Cc: Fuxin Zhang
    Cc: Zhangjin Wu
    Patchwork: https://patchwork.linux-mips.org/patch/9617/
    Signed-off-by: Ralf Baechle

    Huacai Chen