24 Sep, 2020

1 commit

  • Since commit 7484c727b636 ("ARM: realview: delete the RealView board
    files") and commit 16956fed35fe ("ARM: versatile: switch to DT only
    booting and remove legacy code"), there's no one to use the functions
    defined or declared in include/clocksource/timer-sp804.h. Delete it.

    Signed-off-by: Zhen Lei
    Signed-off-by: Daniel Lezcano
    Link: https://lore.kernel.org/r/20200918132237.3552-3-thunder.leizhen@huawei.com

    Zhen Lei
     

13 Aug, 2020

1 commit

  • Rationale:
    Reduces attack surface on kernel devs opening the links for MITM
    as HTTPS traffic is much harder to manipulate.

    Signed-off-by: Alexander A. Klimov
    Signed-off-by: Andrew Morton
    Reviewed-by: Kees Cook
    Link: http://lkml.kernel.org/r/20200726110117.16346-1-grandmaster@al2klimov.de
    Signed-off-by: Linus Torvalds

    Alexander A. Klimov
     

31 Mar, 2020

1 commit

  • pwm_omap_dmtimer.h is used only:
    - to typedef struct omap_dm_timer to pwm_omap_dmtimer
    - for macro PWM_OMAP_DMTIMER_TRIGGER_OVERFLOW_AND_COMPARE
    Rest of the file is pretty mush unsed. So reuse omap_dm_timer
    and OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE in pwm-omap-dmtimer.c
    and delete the header file.

    Acked-by: Tony Lindgren
    Signed-off-by: Lokesh Vutla
    Acked-by: Uwe Kleine-König
    Signed-off-by: Thierry Reding

    Lokesh Vutla
     

16 Mar, 2020

2 commits

  • omap_dm_timer_enable() restores the entire context(including counter)
    based on 2 conditions:
    - If get_context_loss_count is populated and context is lost.
    - If get_context_loss_count is not populated update unconditionally.

    Case2 has a side effect of updating the counter register even though
    context is not lost. When timer is configured in pwm mode, this is
    causing undesired behaviour in the pwm period.

    Instead of using get_context_loss_count call back, implement cpu_pm
    notifier with context save and restore support. And delete the
    get_context_loss_count callback all together.

    Suggested-by: Tony Lindgren
    Signed-off-by: Lokesh Vutla
    [tony@atomide.com: removed pm_runtime calls from cpuidle calls]
    Signed-off-by: Tony Lindgren
    Signed-off-by: Daniel Lezcano
    Link: https://lore.kernel.org/r/20200316111453.15441-1-lokeshvutla@ti.com

    Lokesh Vutla
     
  • Let's add runtime_suspend and resume functions and atomic enabled
    flag. This way we can use these when converting to use cpuidle
    for saving and restoring device context.

    And we need to maintain the driver state in the driver as documented
    in "9. Autosuspend, or automatically-delayed suspends" in the
    Documentation/power/runtime_pm.rst document related to using driver
    private lock and races with runtime_suspend().

    Signed-off-by: Tony Lindgren
    Signed-off-by: Lokesh Vutla
    Signed-off-by: Daniel Lezcano
    Link: https://lore.kernel.org/r/20200305082715.15861-3-lokeshvutla@ti.com

    Tony Lindgren
     

17 Jan, 2020

1 commit

  • hyperv_timer.c exports hyperv_cs, which is used by stimers and the
    timesync mechanism. However, the clocksource dependency is not
    needed: these mechanisms only depend on the partition reference
    counter (which can be read via a MSR or via the TSC Reference Page).

    Introduce the (function) pointer hv_read_reference_counter, as an
    embodiment of the partition reference counter read, and export it
    in place of the hyperv_cs pointer. The latter can be removed.

    This should clarify that there's no relationship between Hyper-V
    stimers & timesync and the Linux clocksource abstractions. No
    functional or semantic change.

    Suggested-by: Michael Kelley
    Signed-off-by: Andrea Parri
    Reviewed-by: Michael Kelley
    Signed-off-by: Daniel Lezcano
    Link: https://lore.kernel.org/r/20200109160650.16150-2-parri.andrea@gmail.com

    Andrea Parri
     

15 Nov, 2019

1 commit

  • Hyper-V has historically initialized stimer-based clockevents late in the
    process of onlining a CPU because clockevents depend on stimer
    interrupts. In the original Hyper-V design, stimer interrupts generate a
    VMbus message, so the VMbus machinery must be running first, and VMbus
    can't be initialized until relatively late. On x86/64, LAPIC timer based
    clockevents are used during early initialization before VMbus and
    stimer-based clockevents are ready, and again during CPU offlining after
    the stimer clockevents have been shut down.

    Unfortunately, this design creates problems when offlining CPUs for
    hibernation or other purposes. stimer-based clockevents are shut down
    relatively early in the offlining process, so clockevents_unbind_device()
    must be used to fallback to the LAPIC-based clockevents for the remainder
    of the offlining process. Furthermore, the late initialization and early
    shutdown of stimer-based clockevents doesn't work well on ARM64 since there
    is no other timer like the LAPIC to fallback to. So CPU onlining and
    offlining doesn't work properly.

    Fix this by recognizing that stimer Direct Mode is the normal path for
    newer versions of Hyper-V on x86/64, and the only path on other
    architectures. With stimer Direct Mode, stimer interrupts don't require any
    VMbus machinery. stimer clockevents can be initialized and shut down
    consistent with how it is done for other clockevent devices. While the old
    VMbus-based stimer interrupts must still be supported for backward
    compatibility on x86, that mode of operation can be treated as legacy.

    So add a new Hyper-V stimer entry in the CPU hotplug state list, and use
    that new state when in Direct Mode. Update the Hyper-V clocksource driver
    to allocate and initialize stimer clockevents earlier during boot. Update
    Hyper-V initialization and the VMbus driver to use this new design. As a
    result, the LAPIC timer is no longer used during boot or CPU
    onlining/offlining and clockevents_unbind_device() is not called. But
    retain the old design as a legacy implementation for older versions of
    Hyper-V that don't support Direct Mode.

    Signed-off-by: Michael Kelley
    Signed-off-by: Thomas Gleixner
    Tested-by: Dexuan Cui
    Reviewed-by: Dexuan Cui
    Link: https://lkml.kernel.org/r/1573607467-9456-1-git-send-email-mikelley@microsoft.com

    Michael Kelley
     

23 Aug, 2019

1 commit

  • There is no particular reason to not enable TSC page clocksource on
    32-bit. mul_u64_u64_shr() is available and despite the increased
    computational complexity (compared to 64bit) TSC page is still a huge win
    compared to MSR-based clocksource.

    In-kernel reads:
    MSR based clocksource: 3361 cycles
    TSC page clocksource: 49 cycles

    Reads from userspace (utilizing vDSO in case of TSC page):
    MSR based clocksource: 5664 cycles
    TSC page clocksource: 131 cycles

    Enabling TSC page on 32bits allows to get rid of CONFIG_HYPERV_TSCPAGE as
    it is now not any different from CONFIG_HYPERV_TIMER.

    Signed-off-by: Vitaly Kuznetsov
    Signed-off-by: Thomas Gleixner
    Reviewed-by: Michael Kelley
    Link: https://lkml.kernel.org/r/20190822083630.17059-1-vkuznets@redhat.com

    Vitaly Kuznetsov
     

03 Jul, 2019

3 commits

  • Continue consolidating Hyper-V clock and timer code into an ISA
    independent Hyper-V clocksource driver.

    Move the existing clocksource code under drivers/hv and arch/x86 to the new
    clocksource driver while separating out the ISA dependencies. Update
    Hyper-V initialization to call initialization and cleanup routines since
    the Hyper-V synthetic clock is not independently enumerated in ACPI.

    Update Hyper-V clocksource users in KVM and VDSO to get definitions from
    the new include file.

    No behavior is changed and no new functionality is added.

    Suggested-by: Marc Zyngier
    Signed-off-by: Michael Kelley
    Signed-off-by: Thomas Gleixner
    Reviewed-by: Vitaly Kuznetsov
    Cc: "bp@alien8.de"
    Cc: "will.deacon@arm.com"
    Cc: "catalin.marinas@arm.com"
    Cc: "mark.rutland@arm.com"
    Cc: "linux-arm-kernel@lists.infradead.org"
    Cc: "gregkh@linuxfoundation.org"
    Cc: "linux-hyperv@vger.kernel.org"
    Cc: "olaf@aepfle.de"
    Cc: "apw@canonical.com"
    Cc: "jasowang@redhat.com"
    Cc: "marcelo.cerri@canonical.com"
    Cc: Sunil Muthuswamy
    Cc: KY Srinivasan
    Cc: "sashal@kernel.org"
    Cc: "vincenzo.frascino@arm.com"
    Cc: "linux-arch@vger.kernel.org"
    Cc: "linux-mips@vger.kernel.org"
    Cc: "linux-kselftest@vger.kernel.org"
    Cc: "arnd@arndb.de"
    Cc: "linux@armlinux.org.uk"
    Cc: "ralf@linux-mips.org"
    Cc: "paul.burton@mips.com"
    Cc: "daniel.lezcano@linaro.org"
    Cc: "salyzyn@android.com"
    Cc: "pcc@google.com"
    Cc: "shuah@kernel.org"
    Cc: "0x7f454c46@gmail.com"
    Cc: "linux@rasmusvillemoes.dk"
    Cc: "huw@codeweavers.com"
    Cc: "sfr@canb.auug.org.au"
    Cc: "pbonzini@redhat.com"
    Cc: "rkrcmar@redhat.com"
    Cc: "kvm@vger.kernel.org"
    Link: https://lkml.kernel.org/r/1561955054-1838-3-git-send-email-mikelley@microsoft.com

    Michael Kelley
     
  • Hyper-V clock/timer code and data structures are currently mixed
    in with other code in the ISA independent drivers/hv directory as
    well as the ISA dependent Hyper-V code under arch/x86.

    Consolidate this code and data structures into a Hyper-V clocksource driver
    to better follow the Linux model. In doing so, separate out the ISA
    dependent portions so the new clocksource driver works for x86 and for the
    in-process Hyper-V on ARM64 code.

    To start, move the existing clockevents code to create the new clocksource
    driver. Update the VMbus driver to call initialization and cleanup routines
    since the Hyper-V synthetic timers are not independently enumerated in
    ACPI.

    No behavior is changed and no new functionality is added.

    Suggested-by: Marc Zyngier
    Signed-off-by: Michael Kelley
    Signed-off-by: Thomas Gleixner
    Reviewed-by: Vitaly Kuznetsov
    Cc: "bp@alien8.de"
    Cc: "will.deacon@arm.com"
    Cc: "catalin.marinas@arm.com"
    Cc: "mark.rutland@arm.com"
    Cc: "linux-arm-kernel@lists.infradead.org"
    Cc: "gregkh@linuxfoundation.org"
    Cc: "linux-hyperv@vger.kernel.org"
    Cc: "olaf@aepfle.de"
    Cc: "apw@canonical.com"
    Cc: "jasowang@redhat.com"
    Cc: "marcelo.cerri@canonical.com"
    Cc: Sunil Muthuswamy
    Cc: KY Srinivasan
    Cc: "sashal@kernel.org"
    Cc: "vincenzo.frascino@arm.com"
    Cc: "linux-arch@vger.kernel.org"
    Cc: "linux-mips@vger.kernel.org"
    Cc: "linux-kselftest@vger.kernel.org"
    Cc: "arnd@arndb.de"
    Cc: "linux@armlinux.org.uk"
    Cc: "ralf@linux-mips.org"
    Cc: "paul.burton@mips.com"
    Cc: "daniel.lezcano@linaro.org"
    Cc: "salyzyn@android.com"
    Cc: "pcc@google.com"
    Cc: "shuah@kernel.org"
    Cc: "0x7f454c46@gmail.com"
    Cc: "linux@rasmusvillemoes.dk"
    Cc: "huw@codeweavers.com"
    Cc: "sfr@canb.auug.org.au"
    Cc: "pbonzini@redhat.com"
    Cc: "rkrcmar@redhat.com"
    Cc: "kvm@vger.kernel.org"
    Link: https://lkml.kernel.org/r/1561955054-1838-2-git-send-email-mikelley@microsoft.com

    Michael Kelley
     
  • so the hyper-v clocksource update can be applied.

    Thomas Gleixner
     

26 Jun, 2019

1 commit

  • Currently the clocksource and clockevent support for davinci platforms
    lives in mach-davinci. It hard-codes many things, uses global variables,
    implements functionalities unused by any platform and has code fragments
    scattered across many (often unrelated) files.

    Implement a new, modern and simplified timer driver and put it into
    drivers/clocksource. We still need to support legacy board files so
    export a config structure and a function that allows machine code to
    register the timer.

    The timer we're using is 64-bit but can be programmed in dual 32-bit
    mode (both chained and unchained).

    On all davinci SoCs except for da830 we're using both halves. Lower half
    for clockevents and upper half for clocksource. On da830 we're using the
    lower half for both with the help of a compare register.

    This patch contains the core code and support for clockevent. The
    clocksource code will be included in a subsequent patch.

    Signed-off-by: Bartosz Golaszewski
    Signed-off-by: Daniel Lezcano

    Bartosz Golaszewski
     

19 Jun, 2019

1 commit

  • Based on 1 normalized pattern(s):

    this program is free software you can redistribute it and or modify
    it under the terms of the gnu general public license version 2 as
    published by the free software foundation this program is
    distributed in the hope that it will be useful but without any
    warranty without even the implied warranty of merchantability or
    fitness for a particular purpose see the gnu general public license
    for more details you should have received a copy of the gnu general
    public license along with this program if not see http www gnu org
    licenses

    extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

    has been chosen to replace the boilerplate/reference in 503 file(s).

    Signed-off-by: Thomas Gleixner
    Reviewed-by: Alexios Zavras
    Reviewed-by: Allison Randal
    Reviewed-by: Enrico Weigelt
    Cc: linux-spdx@vger.kernel.org
    Link: https://lkml.kernel.org/r/20190602204653.811534538@linutronix.de
    Signed-off-by: Greg Kroah-Hartman

    Thomas Gleixner
     

05 Jun, 2019

1 commit

  • Based on 1 normalized pattern(s):

    this program is free software you can redistribute it and or modify
    it under the terms of the gnu general public license as published by
    the free software foundation version 2 of the license

    extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

    has been chosen to replace the boilerplate/reference in 315 file(s).

    Signed-off-by: Thomas Gleixner
    Reviewed-by: Allison Randal
    Reviewed-by: Armijn Hemel
    Cc: linux-spdx@vger.kernel.org
    Link: https://lkml.kernel.org/r/20190531190115.503150771@linutronix.de
    Signed-off-by: Greg Kroah-Hartman

    Thomas Gleixner
     

20 Feb, 2019

1 commit

  • A host running in VHE mode gets the EL2 physical timer as its time
    source (accessed using the EL1 sysreg accessors, which get re-directed
    to the EL2 sysregs by VHE).

    The EL1 physical timer remains unused by the host kernel, allowing us to
    pass that on directly to a KVM guest and saves us from emulating this
    timer for the guest on VHE systems.

    Store the EL1 Physical Timer's IRQ number in
    struct arch_timer_kvm_info on VHE systems to allow KVM to use it.

    Acked-by: Daniel Lezcano
    Signed-off-by: Andre Przywara
    Signed-off-by: Marc Zyngier
    Signed-off-by: Christoffer Dall

    Andre Przywara
     

06 Apr, 2018

1 commit

  • Pull ARM SoC platform updates from Arnd Bergmann:
    "This release brings up a new platform based on the old ARM9 core: the
    Nuvoton NPCM is used as a baseboard management controller, competing
    with the better known ASpeed AST2xx series.

    Another important change is the addition of ARMv7-A based chips in
    mach-stm32. The older parts in this platform are ARMv7-M based
    microcontrollers, now they are expanding to general-purpose workloads.

    The other changes are the usual defconfig updates to enable additional
    drivers, lesser bugfixes. The largest updates as often are the ongoing
    OMAP cleanups, but we also have a number of changes for the older PXA
    and davinci platforms this time.

    For the Renesas shmobile/r-car platform, some new infrastructure is
    needed to make the watchdog work correctly.

    Supporting Multiprocessing on Allwinner A80 required a significant
    amount of new code, but is not doing anything unexpected"

    * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (179 commits)
    arm: npcm: modify configuration for the NPCM7xx BMC.
    MAINTAINERS: update entry for ARM/berlin
    ARM: omap2: fix am43xx build without L2X0
    ARM: davinci: da8xx: simplify CFGCHIP regmap_config
    ARM: davinci: da8xx: fix oops in USB PHY driver due to stack allocated platform_data
    ARM: multi_v7_defconfig: add NXP FlexCAN IP support
    ARM: multi_v7_defconfig: enable thermal driver for i.MX devices
    ARM: multi_v7_defconfig: add RN5T618 PMIC family support
    ARM: multi_v7_defconfig: add NXP graphics drivers
    ARM: multi_v7_defconfig: add GPMI NAND controller support
    ARM: multi_v7_defconfig: add OCOTP driver for NXP SoCs
    ARM: multi_v7_defconfig: configure I2C driver built-in
    arm64: defconfig: add CONFIG_UNIPHIER_THERMAL and CONFIG_SNI_AVE
    ARM: imx: fix imx6sll-only build
    ARM: imx: select ARM_CPU_SUSPEND for CPU_IDLE as well
    ARM: mxs_defconfig: Re-sync defconfig
    ARM: imx_v4_v5_defconfig: Use the generic fsl-asoc-card driver
    ARM: imx_v4_v5_defconfig: Re-sync defconfig
    arm64: defconfig: enable stmmac ethernet to defconfig
    ARM: EXYNOS: Simplify code in coupled CPU idle hot path
    ...

    Linus Torvalds
     

01 Mar, 2018

1 commit


23 Feb, 2018

3 commits


16 Nov, 2017

1 commit

  • Pull arm64 updates from Will Deacon:
    "The big highlight is support for the Scalable Vector Extension (SVE)
    which required extensive ABI work to ensure we don't break existing
    applications by blowing away their signal stack with the rather large
    new vector context ( of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (97 commits)
    arm64: Make ARMV8_DEPRECATED depend on SYSCTL
    arm64: Implement __lshrti3 library function
    arm64: support __int128 on gcc 5+
    arm64/sve: Add documentation
    arm64/sve: Detect SVE and activate runtime support
    arm64/sve: KVM: Hide SVE from CPU features exposed to guests
    arm64/sve: KVM: Treat guest SVE use as undefined instruction execution
    arm64/sve: KVM: Prevent guests from using SVE
    arm64/sve: Add sysctl to set the default vector length for new processes
    arm64/sve: Add prctl controls for userspace vector length management
    arm64/sve: ptrace and ELF coredump support
    arm64/sve: Preserve SVE registers around EFI runtime service calls
    arm64/sve: Preserve SVE registers around kernel-mode NEON use
    arm64/sve: Probe SVE capabilities and usable vector lengths
    arm64: cpufeature: Move sys_caps_initialised declarations
    arm64/sve: Backend logic for setting the vector length
    arm64/sve: Signal handling support
    arm64/sve: Support vector length resetting for new processes
    arm64/sve: Core task context handling
    arm64/sve: Low-level CPU setup
    ...

    Linus Torvalds
     

02 Nov, 2017

1 commit

  • Many source files in the tree are missing licensing information, which
    makes it harder for compliance tools to determine the correct license.

    By default all files without license information are under the default
    license of the kernel, which is GPL version 2.

    Update the files which contain no license information with the 'GPL-2.0'
    SPDX license identifier. The SPDX identifier is a legally binding
    shorthand, which can be used instead of the full boiler plate text.

    This patch is based on work done by Thomas Gleixner and Kate Stewart and
    Philippe Ombredanne.

    How this work was done:

    Patches were generated and checked against linux-4.14-rc6 for a subset of
    the use cases:
    - file had no licensing information it it.
    - file was a */uapi/* one with no licensing information in it,
    - file was a */uapi/* one with existing licensing information,

    Further patches will be generated in subsequent months to fix up cases
    where non-standard license headers were used, and references to license
    had to be inferred by heuristics based on keywords.

    The analysis to determine which SPDX License Identifier to be applied to
    a file was done in a spreadsheet of side by side results from of the
    output of two independent scanners (ScanCode & Windriver) producing SPDX
    tag:value files created by Philippe Ombredanne. Philippe prepared the
    base worksheet, and did an initial spot review of a few 1000 files.

    The 4.13 kernel was the starting point of the analysis with 60,537 files
    assessed. Kate Stewart did a file by file comparison of the scanner
    results in the spreadsheet to determine which SPDX license identifier(s)
    to be applied to the file. She confirmed any determination that was not
    immediately clear with lawyers working with the Linux Foundation.

    Criteria used to select files for SPDX license identifier tagging was:
    - Files considered eligible had to be source code files.
    - Make and config files were included as candidates if they contained >5
    lines of source
    - File already had some variant of a license header in it (even if
    Reviewed-by: Philippe Ombredanne
    Reviewed-by: Thomas Gleixner
    Signed-off-by: Greg Kroah-Hartman

    Greg Kroah-Hartman
     

14 Oct, 2017

2 commits

  • The current delay implementation uses the yield instruction, which is a
    hint that it is beneficial to schedule another thread. As this is a hint,
    it may be implemented as a NOP, causing all delays to be busy loops. This
    is the case for many existing CPUs.

    Taking advantage of the generic timer sending periodic events to all
    cores, we can use WFE during delays to reduce power consumption. This is
    beneficial only for delays longer than the period of the timer event
    stream.

    If timer event stream is not enabled, delays will behave as yield/busy
    loops.

    Signed-off-by: Julien Thierry
    Cc: Catalin Marinas
    Cc: Will Deacon
    Cc: Mark Rutland
    Signed-off-by: Will Deacon

    Julien Thierry
     
  • The arch timer configuration for a CPU might get reset after suspending
    said CPU.

    In order to reliably use the event stream in the kernel (e.g. for delays),
    we keep track of the state where we can safely consider the event stream as
    properly configured. After writing to cntkctl, we issue an ISB to ensure
    that subsequent delay loops can rely on the event stream being enabled.

    Signed-off-by: Julien Thierry
    Acked-by: Mark Rutland
    Cc: Marc Zyngier
    Cc: Russell King
    Cc: Catalin Marinas
    Cc: Will Deacon
    Signed-off-by: Will Deacon

    Julien Thierry
     

19 Apr, 2017

1 commit

  • In preparation for ACPI GTDT support, this patch adds structs to
    describe the MMIO timers indepedent of the firmware interface.

    Subsequent patches will use these to split the FW/HW probing logic, so
    that the HW probing logic can be shared by ACPI and DT.

    Signed-off-by: Fu Wei
    Reviewed-by: Hanjun Guo
    Signed-off-by: Mark Rutland

    Fu Wei
     

10 Apr, 2017

2 commits


18 Oct, 2016

1 commit


28 Jun, 2016

1 commit

  • The init functions do not return any error. They behave as the following:

    - panic, thus leading to a kernel crash while another timer may work and
    make the system boot up correctly

    or

    - print an error and let the caller unaware if the state of the system

    Change that by converting the init functions to return an error conforming
    to the CLOCKSOURCE_OF_RET prototype.

    Proper error handling (rollback, errno value) will be changed later case
    by case, thus this change just return back an error or success in the init
    function.

    Signed-off-by: Daniel Lezcano

    Daniel Lezcano
     

03 May, 2016

3 commits


14 Dec, 2015

1 commit


02 Jun, 2015

1 commit

  • The ARM Dual-Timer SP804 module is peripheral found not only on ARM32
    platforms but also on ARM64 platforms.

    This patch moves the driver out of arch/arm to driver/clocksource
    so that it can be used on ARM64 platforms also.

    Cc: Daniel Lezcano
    Cc: Rob Herring
    Cc: Arnd Bergmann
    Cc: Catalin Marinas
    Cc: Olof Johansson
    Acked-by: Thomas Gleixner
    Signed-off-by: Sudeep Holla
    Signed-off-by: Russell King

    Sudeep Holla
     

31 Dec, 2014

1 commit


23 Jul, 2014

1 commit

  • As clocksource pxa_timer was moved to clocksource framework, the
    pxa_timer initialization needs to be a bit amended, to pass the
    necessary informations to clocksource, ie :
    - the timer interrupt (mach specific)
    - the timer registers base (ditto)
    - the timer clockrate

    Signed-off-by: Robert Jarzmik
    Signed-off-by: Daniel Lezcano

    Robert Jarzmik
     

26 Sep, 2013

2 commits

  • The ARM architected timer can generate events (used for waking up
    CPUs executing the wfe instruction) at a frequency represented as a
    power-of-2 divisor of the clock rate.

    An event stream might be used:
    - To implement wfe-based timeouts for userspace locking implementations.
    - To impose a timeout on a wfe for safeguarding against any programming
    error in case an expected event is not generated.

    This patch computes the event stream frequency aiming for a period
    of 100us between events. It uses ARM/ARM64 specific backends to configure
    and enable the event stream.

    Cc: Lorenzo Pieralisi
    Reviewed-by: Catalin Marinas
    Acked-by: Olof Johansson
    Signed-off-by: Will Deacon
    [sudeep: moving ARM/ARM64 changes into separate patches
    and adding Kconfig option]
    Signed-off-by: Sudeep KarkadaNagesha

    Will Deacon
     
  • Add macros to describe the bitfields in the ARM architected timer
    control register to make code easy to understand.

    Reviewed-by: Lorenzo Pieralisi
    Reviewed-by: Will Deacon
    Acked-by: Catalin Marinas
    Acked-by: Olof Johansson
    Signed-off-by: Sudeep KarkadaNagesha

    Sudeep KarkadaNagesha
     

07 Sep, 2013

1 commit

  • Pull ARM SoC cleanups from Olof Johansson:
    "This branch contains code cleanups, moves and removals for 3.12.

    There's a large number of various cleanups, and a nice net removal of
    13500 lines of code.

    Highlights worth mentioning are:

    - A series of patches from Stephen Boyd removing the ARM local timer
    API.
    - Move of Qualcomm MSM IOMMU code to drivers/iommu.
    - Samsung PWM driver cleanups from Tomasz Figa, removing legacy PWM
    driver and switching over to the drivers/pwm one.
    - Removal of some unusued auto-generated headers for OMAP2+ (PRM/CM).

    There's also a move of a header file out of include/linux/i2c/ to
    platform_data, where it really belongs. It touches mostly ARM
    platform code for include changes so we took it through our tree"

    * tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
    ARM: OMAP2+: Add back the define for AM33XX_RST_GLOBAL_WARM_SW_MASK
    gpio: (gpio-pca953x) move header to linux/platform_data/
    arm: zynq: hotplug: Remove unreachable code
    ARM: SAMSUNG: Remove unnecessary exynos4_default_sdhci*()
    tegra: simplify use of devm_ioremap_resource
    ARM: SAMSUNG: Remove plat/regs-timer.h header
    ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header
    ARM: SAMSUNG: Remove pwm-clock infrastructure
    ARM: SAMSUNG: Remove old PWM timer platform devices
    pwm: Remove superseded pwm-samsung-legacy driver
    ARM: SAMSUNG: Modify board files to use new PWM platform device
    ARM: SAMSUNG: Rework private data handling in dev-backlight
    pwm: Add new pwm-samsung driver
    ARM: mach-mvebu: remove redundant DT parsing and validation
    ARM: msm: Only compile io.c on platforms that use it
    iommu/msm: Move mach includes to iommu directory
    ARM: msm: Remove devices-iommu.c
    ARM: msm: Move mach/board.h contents to common.h
    ARM: msm: Migrate msm_timer to CLOCKSOURCE_OF_DECLARE
    ARM: msm: Remove TMR and TMR0 static mappings
    ...

    Linus Torvalds
     

13 Aug, 2013

1 commit

  • This patch introduces new Samsung PWM driver, which is completely
    rewritten to be multiplatform- and DeviceTree-aware.

    In addition, remaining problems of old driver are fixed, such as:
    - proper handling of hardware variants,
    - synchronization on SMP systems,
    - handling of boundary parameter values,
    - hardware sharing with PWM clocksource driver,
    - undefined state of PWM output after stopping PWM channel.

    Signed-off-by: Tomasz Figa
    Reviewed-by: Sylwester Nawrocki
    Tested-by: Heiko Stuebner
    Tested-by: Mark Brown
    Tested-by: Sylwester Nawrocki
    Acked-by: Arnd Bergmann
    Acked-by: Thierry Reding

    Tomasz Figa