30 Aug, 2021
2 commits
-
MSM8953 has an APCS block similar to MSM8916 but with different clocks
which are spread over 2MB IO region next to it.Signed-off-by: Vladimir Lypak
Signed-off-by: Sireesh Kodali
Signed-off-by: Jassi Brar -
Qcom SM4250/6115, have APCS mailbox setup similar to msm8998 and
msm8916.Signed-off-by: Iskren Chernev
Signed-off-by: Jassi Brar
27 Jun, 2021
3 commits
-
Enable MSM8939 APCS support by adding the compatible. It reuses
msm8916_apcs_data.Signed-off-by: Shawn Guo
Signed-off-by: Jassi Brar -
In adding APCS clock support for MSM8939, the second clock registration
fails due to duplicate device name like below.[ 0.519657] sysfs: cannot create duplicate filename '/bus/platform/devices/qcom-apcs-msm8916-clk'
...
[ 0.661158] qcom_apcs_ipc b111000.mailbox: failed to register APCS clkThis is because MSM8939 has 3 APCS instances for Cluster0 (little cores),
Cluster1 (big cores) and CCI (Cache Coherent Interconnect). Although
only APCS of Cluster0 and Cluster1 have IPC bits, each of 3 APCS has
A53PLL clock control bits. That said, 3 'qcom-apcs-msm8916-clk' devices
need to be registered to instantiate all 3 clocks. Use PLATFORM_DEVID_AUTO
rather than PLATFORM_DEVID_NONE for platform_device_register_data() call
to fix the issue above.Signed-off-by: Shawn Guo
Reviewed-by: Bjorn Andersson
Signed-off-by: Jassi Brar -
This commit adds compatible for the SM6125 SoC
Signed-off-by: Martin Botka
Signed-off-by: Jassi Brar
15 Feb, 2021
2 commits
-
In SDX55, the IPC bits are located in the APCS GCC block. Also, this block
can provide clock functionality. Hence, add support for IPC with correct
offset and name of the clock provider.Signed-off-by: Manivannan Sadhasivam
Signed-off-by: Jassi Brar -
The Qualcomm SC8180X platform has a APSS block exposing the usual IPC
bits, add a compatible for this.Signed-off-by: Bjorn Andersson
Signed-off-by: Jassi Brar
04 Aug, 2020
2 commits
-
MSM8994 has an APCS block similar to 8916, but
with a different clock driver due to the former
one having 2 clusters.Signed-off-by: Konrad Dybcio
Acked-by: Rob Herring
Reviewed-by: Bjorn Andersson
Signed-off-by: Jassi Brar -
The Qualcomm SDM660 platform has a APCS HMSS GLOBAL block, add the
compatible for this.Signed-off-by: Konrad Dybcio
Reviewed-by: Bjorn Andersson
Acked-by: Rob Herring
Signed-off-by: Jassi Brar
11 Jun, 2020
2 commits
-
The Qualcomm ipq6018 has apcs block, add compatible for the same. Also,
the ipq6018 apcs provides a clock functionality similar to msm8916 but
the clock driver is different.Create a child device based on the apcs compatible for the clock
controller functionality.Signed-off-by: Sivaprakash Murugesan
Signed-off-by: Jassi Brar -
Some apcs mailbox devices supports a clock driver, the compatible
strings of devices supporting clock driver along with the clock driver
name are maintained in a separate structure within the mailbox driver.
And the clock driver is added based on device match.With increase in number of devices supporting the clock feature move the
clock driver name inside the driver data. so that we can use a single
API to get the register offset of mailbox driver and clock driver name
together, and the clock driver will be added based on the driver data.Signed-off-by: Sivaprakash Murugesan
Signed-off-by: Jassi Brar
17 Sep, 2019
5 commits
-
The mailbox length is 0x1000 hence the max_register value is 0xFFC.
Fixes: c6a8b171ca8e ("mailbox: qcom: Convert APCS IPC driver to use
regmap")
Signed-off-by: Jorge Ramirez-Ortiz
Signed-off-by: Jassi Brar -
Add support of IPQ8074 with IPC register offset as 8.
Signed-off-by: Gokul Sriram Palanisamy
Signed-off-by: Sricharan R
Signed-off-by: Jassi Brar -
Add the corresponding APSS shared offset for SM8150 and SC7180 SoCs.
Reviewed-by: Bjorn Andersson
Signed-off-by: Sibi Sankar
Signed-off-by: Jassi Brar -
Use the correct macro when registering the platform device.
Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
Reviewed-by: Stephen Boyd
Signed-off-by: Jassi Brar -
There is clock controller functionality in the APCS hardware block of
qcs404 devices similar to msm8916.Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
Reviewed-by: Stephen Boyd
Signed-off-by: Jassi Brar
05 Jun, 2019
1 commit
-
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 and
only version 2 as published by the free software foundation this
program is distributed in the hope that it will be useful but
without any warranty without even the implied warranty of
merchantability or fitness for a particular purpose see the gnu
general public license for more detailsextracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 294 file(s).
Signed-off-by: Thomas Gleixner
Reviewed-by: Allison Randal
Reviewed-by: Alexios Zavras
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141900.825281744@linutronix.de
Signed-off-by: Greg Kroah-Hartman
22 Dec, 2018
1 commit
-
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.Reviewed-by: Bjorn Andersson
Signed-off-by: Thierry Reding
Signed-off-by: Jassi Brar
29 Sep, 2018
1 commit
-
Add support for the QCS404 APPS Global block with IPC register at offset
8.Signed-off-by: Bjorn Andersson
Reviewed-by: Vinod Koul
Reviewed-by: Rob Herring
Signed-off-by: Jassi Brar
07 Jun, 2018
2 commits
-
Add the corresponding APSS shared offset for SDM845 SoC
Signed-off-by: Sibi Sankar
Reviewed-by: Bjorn Andersson
Signed-off-by: Jassi Brar -
The Qualcomm MSM8998 platform has a APCS HMSS GLOBAL block, add the
compatible for this.Signed-off-by: Bjorn Andersson
Reviewed-by: Rob Herring
Signed-off-by: Jassi Brar
04 Feb, 2018
2 commits
-
There is a clock controller functionality provided by the APCS hardware
block of msm8916 devices. The device-tree would represent an APCS node
with both mailbox and clock provider properties.
Create a platform child device for the clock controller functionality so
the driver can probe and use APCS as parent.Signed-off-by: Georgi Djakov
Acked-by: Bjorn Andersson
Signed-off-by: Jassi Brar -
This hardware block provides more functionalities that just IPC. Convert
it to regmap to allow other child platform devices to use the same regmap.Signed-off-by: Georgi Djakov
Acked-by: Bjorn Andersson
Signed-off-by: Jassi Brar
14 Jun, 2017
1 commit
-
This implements a driver that exposes the IPC bits found in the APCS
Global block in various Qualcomm platforms. The bits are used to signal
inter-processor communication signals from the application CPU to other
masters.Signed-off-by: Bjorn Andersson
Signed-off-by: Jassi Brar