06 Jun, 2011

1 commit

  • This patch fixes the lockdep warning of "unannotated irqs-off"[1].

    After entering __irq_usr, arm core will disable interrupt automatically,
    but __irq_usr does not annotate the irq disable, so lockdep may complain
    the warning if it has chance to check this in irq handler.

    This patch adds trace_hardirqs_off in __irq_usr before entering irq_handler
    to handle the irq, also calls ret_to_user_from_irq to avoid calling
    disable_irq again.

    This is also a fix for irq off tracer.

    [1], lockdep warning log of "unannotated irqs-off"

    [ 13.804687] ------------[ cut here ]------------
    [ 13.809570] WARNING: at kernel/lockdep.c:3335 check_flags+0x78/0x1d0()
    [ 13.816467] Modules linked in:
    [ 13.819732] Backtrace:
    [ 13.822357] [] (dump_backtrace+0x0/0x100) from [] (dump_stack+0x20/0x24)
    [ 13.831268] r6:c07d8c2c r5:00000d07 r4:00000000 r3:00000000
    [ 13.837280] [] (dump_stack+0x0/0x24) from [] (warn_slowpath_common+0x5c/0x74)
    [ 13.846649] [] (warn_slowpath_common+0x0/0x74) from [] (warn_slowpath_null+0x2c/0x34)
    [ 13.856781] r8:00000000 r7:00000000 r6:c18b8194 r5:60000093 r4:ef182000
    [ 13.863708] r3:00000009
    [ 13.866485] [] (warn_slowpath_null+0x0/0x34) from [] (check_flags+0x78/0x1d0)
    [ 13.875823] [] (check_flags+0x0/0x1d0) from [] (lock_acquire+0x4c/0x150)
    [ 13.884704] [] (lock_acquire+0x0/0x150) from [] (_raw_spin_lock+0x4c/0x84)
    [ 13.893798] [] (_raw_spin_lock+0x0/0x84) from [] (sched_ttwu_pending+0x58/0x8c)
    [ 13.903320] r6:ef92d040 r5:00000003 r4:c18b8180
    [ 13.908233] [] (sched_ttwu_pending+0x0/0x8c) from [] (scheduler_ipi+0x18/0x1c)
    [ 13.917663] r6:ef183fb0 r5:00000003 r4:00000000 r3:00000001
    [ 13.923645] [] (scheduler_ipi+0x0/0x1c) from [] (do_IPI+0x9c/0xfc)
    [ 13.932006] [] (do_IPI+0x0/0xfc) from [] (__irq_usr+0x48/0xe0)
    [ 13.939971] Exception stack(0xef183fb0 to 0xef183ff8)
    [ 13.945281] 3fa0: ffffffc3 0001500c 00000001 0001500c
    [ 13.953948] 3fc0: 00000050 400b45f0 400d9000 00000000 00000001 400d9600 6474e552 bea05b3c
    [ 13.962585] 3fe0: 400d96c0 bea059c0 400b6574 400b65d8 20000010 ffffffff
    [ 13.969573] r6:00000403 r5:fa240100 r4:ffffffff r3:20000010
    [ 13.975585] ---[ end trace efc4896ab0fb62cb ]---
    [ 13.980468] possible reason: unannotated irqs-off.
    [ 13.985534] irq event stamp: 1610
    [ 13.989044] hardirqs last enabled at (1610): [] no_work_pending+0x8/0x2c
    [ 13.997131] hardirqs last disabled at (1609): [] ret_slow_syscall+0xc/0x1c
    [ 14.005371] softirqs last enabled at (0): [] copy_process+0x2cc/0xa24
    [ 14.013183] softirqs last disabled at (0): [< (null)>] (null)

    Signed-off-by: Ming Lei
    Signed-off-by: Russell King

    Ming Lei
     

06 Jan, 2011

1 commit


24 Dec, 2010

1 commit

  • If the irqsoff tracer is in use, stop tracing the interrupt disable
    interval when returning to userspace. Tracing userspace execution time
    as interrupts disabled time is not helpful for kernel performance
    analysis purposes. Only do so if the irqsoff tracer is enabled, to
    avoid overhead for lockdep, which doesn't care.

    Signed-off-by: Todd Poynor
    Signed-off-by: Russell King

    Todd Android Poynor
     

20 Nov, 2010

3 commits


20 Oct, 2010

1 commit


19 Oct, 2010

1 commit


02 Oct, 2010

1 commit


28 Sep, 2010

1 commit

  • * master.kernel.org:/home/rmk/linux-2.6-arm: (28 commits)
    ARM: 6411/1: vexpress: set RAM latencies to 1 cycle for PL310 on ct-ca9x4 tile
    ARM: 6409/1: davinci: map sram using MT_MEMORY_NONCACHED instead of MT_DEVICE
    ARM: 6408/1: omap: Map only available sram memory
    ARM: 6407/1: mmu: Setup MT_MEMORY and MT_MEMORY_NONCACHED L1 entries
    ARM: pxa: remove pr_ uses of KERN_
    ARM: pxa168fb: clear enable bit when not active
    ARM: pxa: fix cpu_is_pxa*() not expanding to zero when not configured
    ARM: pxa168: fix corrected reset vector
    ARM: pxa: Use PIO for PI2C communication on Palm27x
    ARM: pxa: Fix Vpac270 gpio_power for MMC
    ARM: 6401/1: plug a race in the alignment trap handler
    ARM: 6406/1: at91sam9g45: fix i2c bus speed
    leds: leds-ns2: fix locking
    ARM: dove: fix __io() definition to use bus based offset
    dmaengine: fix interrupt clearing for mv_xor
    ARM: kirkwood: Unbreak PCIe I/O port
    ARM: Fix build error when using KCONFIG_CONFIG
    ARM: 6383/1: Implement phys_mem_access_prot() to avoid attributes aliasing
    ARM: 6400/1: at91: fix arch_gettimeoffset fallout
    ARM: 6398/1: add proc info for ARM11MPCore/Cortex-A9 from ARM
    ...

    Linus Torvalds
     

18 Sep, 2010

1 commit

  • If a signal hits us outside of a syscall and another gets delivered
    when we are in sigreturn (e.g. because it had been in sa_mask for
    the first one and got sent to us while we'd been in the first handler),
    we have a chance of returning from the second handler to location one
    insn prior to where we ought to return. If r0 happens to contain -513
    (-ERESTARTNOINTR), sigreturn will get confused into doing restart
    syscall song and dance.

    Incredible joy to debug, since it manifests as random, infrequent and
    very hard to reproduce double execution of instructions in userland
    code...

    The fix is simple - mark it "don't bother with restarts" in wrapper,
    i.e. set r8 to 0 in sys_sigreturn and sys_rt_sigreturn wrappers,
    suppressing the syscall restart handling on return from these guys.
    They can't legitimately return a restart-worthy error anyway.

    Testcase:
    #include
    #include
    #include
    #include
    #include

    void f(int n)
    {
    __asm__ __volatile__(
    "ldr r0, [%0]\n"
    "b 1f\n"
    "b 2f\n"
    "1:b .\n"
    "2:\n" : : "r"(&n));
    }

    void handler1(int sig) { }
    void handler2(int sig) { raise(1); }
    void handler3(int sig) { exit(0); }

    main()
    {
    struct sigaction s = {.sa_handler = handler2};
    struct itimerval t1 = { .it_value = {1} };
    struct itimerval t2 = { .it_value = {2} };

    signal(1, handler1);

    sigemptyset(&s.sa_mask);
    sigaddset(&s.sa_mask, 1);
    sigaction(SIGALRM, &s, NULL);

    signal(SIGVTALRM, handler3);

    setitimer(ITIMER_REAL, &t1, NULL);
    setitimer(ITIMER_VIRTUAL, &t2, NULL);

    f(-513); /* -ERESTARTNOINTR */

    write(1, "buggered\n", 9);
    return 1;
    }

    Signed-off-by: Al Viro
    Acked-by: Russell King
    Cc: stable@kernel.org
    Signed-off-by: Linus Torvalds

    Al Viro
     

17 Sep, 2010

1 commit

  • Al Viro reports that calling "sys_sigsuspend(-ERESTARTNOHAND, 0, 0)"
    with two signals coming and being handled in kernel space results
    in the syscall restart being done twice.

    Avoid this by clearing the 'why' flag when we call the signal handling
    code to prevent further syscall restarts after the first.

    Acked-by: Al Viro
    Signed-off-by: Russell King

    Russell King
     

02 Sep, 2010

4 commits

  • This adds mcount recording and updates dynamic ftrace for ARM to work
    with the new ftrace dyamic tracing implementation. It also adds support
    for the mcount format used by newer ARM compilers.

    With dynamic tracing, mcount() is implemented as a nop. Callsites are
    patched on startup with nops, and dynamically patched to call to the
    ftrace_caller() routine as needed.

    Acked-by: Steven Rostedt [recordmcount.pl change]
    Signed-off-by: Rabin Vincent
    Signed-off-by: Russell King

    Rabin Vincent
     
  • Fix the mcount routines to build and run on a kernel built with the
    Thumb-2 instruction set by correcting the following errors using the
    fixes suggested by Catalin Marinas:

    - Problem: The following assembler errors appear at the "adr r0,
    ftrace_stub" instruction:

    entry-common.S: Assembler messages:
    entry-common.S:179: Error: invalid immediate for address calculation (value = 0x00000004)

    Fix: The errors don't occur with a non-global symbol, so use one.

    - Problem: The "mov lr, pc" does not set the lsb when storing the pc in
    lr. The called function returns with "bx lr", and the mode changes
    to ARM.

    Fix: Add a label on the return address and use "adr lr, BSYM(label)".

    We don't modify the old mcount because it won't be built when using
    Thumb-2.

    Acked-by: Catalin Marinas
    Signed-off-by: Rabin Vincent
    Signed-off-by: Russell King

    Rabin Vincent
     
  • When building as Thumb-2, the ".type foo, %function" annotation in
    ENDPROC seems to be required in order for the assembly routines to be
    recognized as Thumb-2 code. If the ENDPROC annotations are not present,
    calls to these routines are generated as BLX instead of BL.

    Acked-by: Catalin Marinas
    Signed-off-by: Rabin Vincent
    Signed-off-by: Russell King

    Rabin Vincent
     
  • With a new enough GCC, ARM function tracing can be supported without the
    need for frame pointers. This is essential for Thumb-2 support, since
    frame pointers aren't available then.

    Acked-by: Catalin Marinas
    Acked-by: Steven Rostedt
    Signed-off-by: Rabin Vincent
    Signed-off-by: Russell King

    Rabin Vincent
     

11 Aug, 2010

2 commits


11 Dec, 2009

1 commit


03 Oct, 2009

1 commit

  • Instruction fault status register, IFSR, was introduced on ARMv6 to
    provide status information about the last insturction fault. It
    needed for proper prefetch abort handling.

    Now we have three prefetch abort model:

    * legacy - for CPUs before ARMv6. They doesn't provide neither
    IFSR nor IFAR. We simulate IFSR with section translation fault
    status for them to generalize code;
    * ARMv6 - provides IFSR, but not IFAR;
    * ARMv7 - provides both IFSR and IFAR.

    Signed-off-by: Kirill A. Shutemov
    Signed-off-by: Russell King

    Kirill A. Shutemov
     

01 Oct, 2009

1 commit

  • Commit 181f817eaaca4c1f introduced some new code to entry-common.S
    Sadly, this new code uses 'bx' instruction which is available only on
    ARMv5 and higher CPUs. This causes following compilation errors when
    building kernel for StrongARM (ARMv4):

    arch/arm/kernel/entry-common.S: Assembler messages:
    arch/arm/kernel/entry-common.S:129: Error: selected processor does not
    support `bx ip'
    arch/arm/kernel/entry-common.S:138: Error: selected processor does not
    support `bx ip'

    Fix these errors by using 'mov pc' instead of 'bx'.

    Signed-off-by: Dmitry Artamonow
    Acked-by: Uwe Kleine-König
    Signed-off-by: Russell King

    Dmitry Artamonow
     

15 Sep, 2009

1 commit

  • * 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (257 commits)
    [ARM] Update mach-types
    ARM: 5636/1: Move vendor enum to AMBA include
    ARM: Fix pfn_valid() for sparse memory
    [ARM] orion5x: Add LaCie NAS 2Big Network support
    [ARM] pxa/sharpsl_pm: zaurus c3000 aka spitz: fix resume
    ARM: 5686/1: at91: Correct AC97 reset line in at91sam9263ek board
    ARM: 5640/1: This patch modifies the support of AC97 on the at91sam9263 ek board
    ARM: 5689/1: Update default config of HP Jornada 700-series machines
    ARM: 5691/1: fix cache aliasing issues between kmap() and kmap_atomic() with highmem
    ARM: 5688/1: ks8695_serial: disable_irq() lockup
    ARM: 5687/1: fix an oops with highmem
    ARM: 5684/1: Add nuc960 platform to w90x900
    ARM: 5683/1: Add nuc950 platform to w90x900
    ARM: 5682/1: Add cpu.c and dev.c and modify some files of w90p910 platform
    ARM: 5626/1: add suspend/resume functions to amba-pl011 serial driver
    ARM: 5625/1: fix hard coded 4K resource size in amba bus detection
    MMC: MMCI: convert realview MMC to use gpiolib
    ARM: 5685/1: Make MMCI driver compile without gpiolib
    ARM: implement highpte
    ARM: Show FIQ in /proc/interrupts on CONFIG_FIQ
    ...

    Fix up trivial conflict in arch/arm/kernel/signal.c.

    It was due to the TIF_NOTIFY_RESUME addition in commit d0420c83f ("KEYS:
    Extend TIF_NOTIFY_RESUME to (almost) all architectures") and follow-ups.

    Linus Torvalds
     

12 Sep, 2009

2 commits


02 Sep, 2009

1 commit

  • Implement TIF_NOTIFY_RESUME for most of those architectures in which isn't yet
    available, and, whilst we're at it, have it call the appropriate tracehook.

    After this patch, blackfin, m68k* and xtensa still lack support and need
    alteration of assembly code to make it work.

    Resume notification can then be used (by a later patch) to install a new
    session keyring on the parent of a process.

    Signed-off-by: David Howells
    Acked-by: Russell King

    cc: linux-arch@vger.kernel.org
    Signed-off-by: James Morris

    David Howells
     

15 Aug, 2009

2 commits

  • Russell King
     
  • This patch adds support for TIF_RESTORE_SIGMASK to ARM's
    signal handling, which allows to hook up the pselect6, ppoll,
    and epoll_pwait syscalls on ARM.

    Tested here with eabi userspace and a test program with a
    deliberate race between a child's exit and the parent's
    sigprocmask/select sequence. Using sys_pselect6() instead
    of sigprocmask/select reliably prevents the race.

    The other arch's support for TIF_RESTORE_SIGMASK has evolved
    over time:

    In 2.6.16:
    - add TIF_RESTORE_SIGMASK which parallels TIF_SIGPENDING
    - test both when checking for pending signal [changed later]
    - reimplement sys_sigsuspend() to use current->saved_sigmask,
    TIF_RESTORE_SIGMASK [changed later], and -ERESTARTNOHAND;
    ditto for sys_rt_sigsuspend(), but drop private code and
    use common code via __ARCH_WANT_SYS_RT_SIGSUSPEND;
    - there are now no "extra" calls to do_signal() so its oldset
    parameter is always ¤t->blocked so need not be passed,
    also its return value is changed to void
    - change handle_signal() to return 0/-errno
    - change do_signal() to honor TIF_RESTORE_SIGMASK:
    + get oldset from current->saved_sigmask if TIF_RESTORE_SIGMASK
    is set
    + if handle_signal() was successful then clear TIF_RESTORE_SIGMASK
    + if no signal was delivered and TIF_RESTORE_SIGMASK is set then
    clear it and restore the sigmask
    - hook up sys_pselect6() and sys_ppoll()

    In 2.6.19:
    - hook up sys_epoll_pwait()

    In 2.6.26:
    - allow archs to override how TIF_RESTORE_SIGMASK is implemented;
    default set_restore_sigmask() sets both TIF_RESTORE_SIGMASK and
    TIF_SIGPENDING; archs need now just test TIF_SIGPENDING again
    when checking for pending signal work; some archs now implement
    TIF_RESTORE_SIGMASK as a secondary/non-atomic thread flag bit
    - call set_restore_sigmask() in sys_sigsuspend() instead of setting
    TIF_RESTORE_SIGMASK

    In 2.6.29-rc:
    - kill sys_pselect7() which no arch wanted

    So for 2.6.31-rc6/ARM this patch does the following:
    - Add TIF_RESTORE_SIGMASK. Use the generic set_restore_sigmask()
    which sets both TIF_SIGPENDING and TIF_RESTORE_SIGMASK, so
    TIF_RESTORE_SIGMASK need not claim one of the scarce low thread
    flags, and existing TIF_SIGPENDING and _TIF_WORK_MASK tests need
    not be extended for TIF_RESTORE_SIGMASK.
    - sys_sigsuspend() is reimplemented to use current->saved_sigmask
    and set_restore_sigmask(), making it identical to most other archs
    - The private code for sys_rt_sigsuspend() is removed, instead
    generic code supplies it via __ARCH_WANT_SYS_RT_SIGSUSPEND.
    - sys_sigsuspend() and sys_rt_sigsuspend() no longer need a pt_regs
    parameter, so their assembly code wrappers are removed.
    - handle_signal() is changed to return 0 on success or -errno.
    - The oldset parameter to do_signal() is now redundant and removed,
    and the return value is now also redundant and changed to void.
    - do_signal() is changed to honor TIF_RESTORE_SIGMASK:
    + get oldset from current->saved_sigmask if TIF_RESTORE_SIGMASK
    is set
    + if handle_signal() was successful then clear TIF_RESTORE_SIGMASK
    + if no signal was delivered and TIF_RESTORE_SIGMASK is set then
    clear it and restore the sigmask
    - Hook up sys_pselect6, sys_ppoll, and sys_epoll_pwait.

    Signed-off-by: Mikael Pettersson
    Signed-off-by: Russell King

    Mikael Pettersson
     

14 Aug, 2009

1 commit

  • Since gcc 4.4 the name and calling convention for function profiling
    on ARM changed. With this patch both types are supported.

    See http://sourceware.org/ml/libc-ports/2008-04/msg00009.html for some
    details.

    Lightly-Tested-by: Anand Gadiyar
    Tested-by: Kevin Hilman
    Signed-off-by: Uwe Kleine-König

    Uwe Kleine-König
     

30 Jul, 2009

1 commit


24 Jul, 2009

1 commit


30 May, 2009

1 commit

  • Starting with ARMv6, the CPUs support the BE-8 variant of big-endian
    (byte-invariant). This patch adds the core support:

    - setting of the BE-8 mode via the CPSR.E register for both kernel and
    user threads
    - big-endian page table walking
    - REV used to rotate instructions read from memory during fault
    processing as they are still little-endian format
    - Kconfig and Makefile support for BE-8. The --be8 option must be passed
    to the final linking stage to convert the instructions to
    little-endian

    Signed-off-by: Catalin Marinas

    Catalin Marinas
     

20 Mar, 2009

1 commit


05 Mar, 2009

1 commit

  • gcc seems to expect that lr isn't clobbered by mcount, because for a
    function starting with:

    static int func(void)
    {
    void *ra = __builtin_return_address(0);

    printk(KERN_EMERG "__builtin_return_address(0) = %pS\n", ra)

    ...

    the following assembler is generated by gcc 4.3.2:

    0: e1a0c00d mov ip, sp
    4: e92dd810 push {r4, fp, ip, lr, pc}
    8: e24cb004 sub fp, ip, #4 ; 0x4
    c: ebfffffe bl 0
    10: e59f0034 ldr r0, [pc, #52]
    14: e1a0100e mov r1, lr
    18: ebfffffe bl 0

    Without this patch obviously __builtin_return_address(0) yields
    func+0x10 instead of the return address of the caller.

    Note this patch fixes a similar issue for the routines used with dynamic
    ftrace even though this isn't currently selectable for ARM.

    Cc: Abhishek Sagar
    Cc: Steven Rostedt
    Cc: Ingo Molnar
    Signed-off-by: Uwe Kleine-König
    Signed-off-by: Russell King

    Uwe Kleine-König
     

19 Feb, 2009

1 commit


31 Jan, 2009

1 commit


21 Oct, 2008

1 commit

  • Due to confusion between the ftrace infrastructure and the gcc profiling
    tracer "ftrace", this patch renames the config options from FTRACE to
    FUNCTION_TRACER. The other two names that are offspring from FTRACE
    DYNAMIC_FTRACE and FTRACE_MCOUNT_RECORD will stay the same.

    This patch was generated mostly by script, and partially by hand.

    Signed-off-by: Steven Rostedt
    Signed-off-by: Ingo Molnar

    Steven Rostedt
     

01 Sep, 2008

1 commit


07 Aug, 2008

1 commit


24 Jun, 2008

1 commit

  • Record the address of the mcount call-site. Currently all archs except sparc64
    record the address of the instruction following the mcount call-site. Some
    general cleanups are entailed. Storing mcount addresses in rec->ip enables
    looking them up in the kprobe hash table later on to check if they're kprobe'd.

    Signed-off-by: Abhishek Sagar
    Cc: davem@davemloft.net
    Cc: Steven Rostedt
    Signed-off-by: Ingo Molnar

    Abhishek Sagar
     

02 Jun, 2008

1 commit