Eric Lee / smarc-fsl-linux-kernel

21 Feb, 2010

1 commit

  • 4b3073e1c   MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itself ... Browse Code »

    On VIVT ARM, when we have multiple shared mappings of the same file
    in the same MM, we need to ensure that we have coherency across all
    copies. We do this via make_coherent() by making the pages
    uncacheable.

    This used to work fine, until we allowed highmem with highpte - we
    now have a page table which is mapped as required, and is not available
    for modification via update_mmu_cache().

    Ralf Beache suggested getting rid of the PTE value passed to
    update_mmu_cache():

    On MIPS update_mmu_cache() calls __update_tlb() which walks pagetables
    to construct a pointer to the pte again. Passing a pte_t * is much
    more elegant. Maybe we might even replace the pte argument with the
    pte_t?

    Ben Herrenschmidt would also like the pte pointer for PowerPC:

    Passing the ptep in there is exactly what I want. I want that
    -instead- of the PTE value, because I have issue on some ppc cases,
    for I$/D$ coherency, where set_pte_at() may decide to mask out the
    _PAGE_EXEC.

    So, pass in the mapped page table pointer into update_mmu_cache(), and
    remove the PTE value, updating all implementations and call sites to
    suit.

    Includes a fix from Stephen Rothwell:

    sparc: fix fallout from update_mmu_cache API change

    Signed-off-by: Stephen Rothwell

    Acked-by: Benjamin Herrenschmidt
    Signed-off-by: Russell King

    Russell King
     

02 Jul, 2008

1 commit

  • b13d618b4   avr32: Clean up and optimize the TLB operations ... Browse Code »

    This and the following patches aim to optimize the code dealing with
    page tables and TLB operations. Each patch reduces the time it takes
    to gzip a 16 MB file slightly, but I expect things like fork() and
    mmap() will improve somewhat more.

    This patch deals with the low-level TLB operations:

    * Remove unused _TLBEHI_I define
    * Use gcc builtins instead of inline assembly
    * Remove a few unnecessary pipeline flushes and nops
    * Introduce NR_TLB_ENTRIES define and use it instead of hardcoding it
    to 32 a few places throughout the code.
    * Use sysreg bitops instead of hardcoded shifts and masks
    * Make a few needlessly global functions static

    Signed-off-by: Haavard Skinnemoen

    Haavard Skinnemoen
     

29 Apr, 2008

1 commit

25 Jan, 2008

1 commit

13 Feb, 2007

1 commit

  • 5dfe4c964   [PATCH] mark struct file_operations const 2 ... Browse Code »

    Many struct file_operations in the kernel can be "const". Marking them const
    moves these to the .rodata section, which avoids false sharing with potential
    dirty data. In addition it'll catch accidental writes at compile time to
    these shared resources.

    [akpm@osdl.org: sparc64 fix]
    Signed-off-by: Arjan van de Ven
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Arjan van de Ven
     

27 Sep, 2006

1 commit

26 Sep, 2006

1 commit

  • 5f97f7f94   [PATCH] avr32 architecture ... Browse Code »

    This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
    CPU and the AT32STK1000 development board.

    AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
    cost-sensitive embedded applications, with particular emphasis on low power
    consumption and high code density. The AVR32 architecture is not binary
    compatible with earlier 8-bit AVR architectures.

    The AVR32 architecture, including the instruction set, is described by the
    AVR32 Architecture Manual, available from

    http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf

    The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
    features a 7-stage pipeline, 16KB instruction and data caches and a full
    Memory Management Unit. It also comes with a large set of integrated
    peripherals, many of which are shared with the AT91 ARM-based controllers from
    Atmel.

    Full data sheet is available from

    http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf

    while the CPU core implementation including caches and MMU is documented by
    the AVR32 AP Technical Reference, available from

    http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf

    Information about the AT32STK1000 development board can be found at

    http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918

    including a BSP CD image with an earlier version of this patch, development
    tools (binaries and source/patches) and a root filesystem image suitable for
    booting from SD card.

    Alternatively, there's a preliminary "getting started" guide available at
    http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
    to the sources and patches you will need in order to set up a cross-compiling
    environment for avr32-linux.

    This patch, as well as the other patches included with the BSP and the
    toolchain patches, is actively supported by Atmel Corporation.

    [dmccr@us.ibm.com: Fix more pxx_page macro locations]
    [bunk@stusta.de: fix `make defconfig']
    Signed-off-by: Haavard Skinnemoen
    Signed-off-by: Adrian Bunk
    Signed-off-by: Dave McCracken
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Haavard Skinnemoen