Eric Lee / smarc-fsl-linux-kernel

07 Oct, 2009

1 commit

  • 96f1050d3   Blackfin: mass clean up of copyright/licensing info ... Browse Code »

    Bill Gatliff & David Brownell pointed out we were missing some
    copyrights, and licensing terms in some of the files in
    ./arch/blackfin, so this fixes things, and cleans them up.

    It also removes:
    - verbose GPL text(refer to the top level ./COPYING file)
    - file names (you are looking at the file)
    - bug url (it's in the ./MAINTAINERS file)
    - "or later" on GPL-2, when we did not have that right

    It also allows some Blackfin-specific assembly files to be under a BSD
    like license (for people to use them outside of Linux).

    Signed-off-by: Robin Getz
    Signed-off-by: Mike Frysinger

    Robin Getz
     

17 Sep, 2009

1 commit

  • eb7bd9c46   Blackfin: cleanup sync handling when enabling/disabling cplbs ... Browse Code »

    The handling of updating the [DI]MEM_CONTROL MMRs does not follow proper
    sync procedures as laid out in the Blackfin programming manual. So rather
    than audit/fix every call location, create helper functions that do the
    right things in order to safely update these MMRs. Then convert all call
    sites to use these new helper functions.

    While we're fixing the code, drop the workaround for anomaly 05000125 as
    that anomaly applies to old versions of silicon that we do not support.

    Signed-off-by: Yi Li
    Signed-off-by: Mike Frysinger

    Yi Li
     

23 Jun, 2009

1 commit

  • 41ba653f2   Blackfin: decouple unrelated cache settings to get exact behavior ... Browse Code »

    The current cache options don't really represent the hardware features.
    They end up setting different aspects of the hardware so that the end
    result is to turn on/off the cache. Unfortunately, when we hit cache
    problems with the hardware, it's difficult to test different settings to
    root cause the problem. The current settings also don't cleanly allow for
    different caching behaviors with different regions of memory.

    So split the configure options such that they properly reflect the settings
    that are applied to the hardware.

    Signed-off-by: Jie Zhang
    Signed-off-by: Mike Frysinger

    Jie Zhang
     

12 Jun, 2009

1 commit

  • 5ba766752   Blackfin: work around anomaly 05000220 ... Browse Code »

    When possible, work around anomaly 05000220 (external memory is write
    back cached, but L2 is not cached). If not possible, detect the
    conditions at build time and reject any qualifying configurations.

    Signed-off-by: Graf Yang
    Signed-off-by: Mike Frysinger

    Graf Yang
     

07 Jan, 2009

1 commit

  • dbdf20db5   Blackfin arch: Faster C implementation of no-MPU CPLB handler ... Browse Code »

    This is a mixture ofcMichael McTernan's patch and the existing cplb-mpu code.

    We ditch the old cplb-nompu implementation, which is a good example of
    why a good algorithm in a HLL is preferrable to a bad algorithm written in
    assembly. Rather than try to construct a table of all posible CPLBs and
    search it, we just create a (smaller) table of memory regions and
    their attributes. Some of the data structures are now unified for both
    the mpu and nompu cases. A lot of needless complexity in cplbinit.c is
    removed.

    Further optimizations:
    * compile cplbmgr.c with a lot of -ffixed-reg options, and omit saving
    these registers on the stack when entering a CPLB exception.
    * lose cli/nop/nop/sti sequences for some workarounds - these don't
    * make
    sense in an exception context

    Additional code unification should be possible after this.

    [Mike Frysinger :
    - convert CPP if statements to C if statements
    - remove redundant statements
    - use a do...while loop rather than a for loop to get slightly better
    optimization and to avoid gcc "may be used uninitialized" warnings ...
    we know that the [id]cplb_nr_bounds variables will never be 0, so this
    is OK
    - the no-mpu code was the last user of MAX_MEM_SIZE and with that rewritten,
    we can punt it
    - add some BUG_ON() checks to make sure we dont overflow the small
    cplb_bounds array
    - add i/d cplb entries for the bootrom because there is functions/data in
    there we want to access
    - we do not need a NULL trailing entry as any time we access the bounds
    arrays, we use the nr_bounds variable
    ]

    Signed-off-by: Michael McTernan
    Signed-off-by: Mike Frysinger
    Signed-off-by: Bernd Schmidt
    Signed-off-by: Bryan Wu

    Bernd Schmidt
     

18 Nov, 2008

1 commit

09 Oct, 2008

1 commit

27 Aug, 2008

1 commit