09 Jan, 2012
1 commit
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Macro name for spi controller driver has been modified, so update default
board file accordingly.Signed-off-by: Sonic Zhang
Signed-off-by: Bob Liu
14 Nov, 2011
1 commit
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The serial TX IRQ is not simply (RX IRQ + 1) on some Blackfin chips,
so move the values to the platform resources.Signed-off-by: Sonic Zhang
Signed-off-by: Mike Frysinger
Signed-off-by: Bob Liu
23 Jul, 2011
3 commits
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Re-architect how we save/restore the gpio/port logic that only pertains
to bf538/bf539 parts by pulling it out of the core code paths and pushing
it out to bf538-specific locations.Signed-off-by: Mike Frysinger
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Signed-off-by: Mike Frysinger
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The default for the Blackfin SPI driver is 8 bits and dma disabled,
so many of the bfin5xx_spi_chip resources are redundant. So punt
those parts.Further, drivers should themselves be declaring 16 bit transfers,
so for those that do, and for the ones which no longer do 16 bit
transfers, drop the bfin5xx_spi_chip resources.Signed-off-by: Mike Frysinger
29 May, 2011
1 commit
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Now that the serial code has been unified in bfin_serial.h, and the
Blackfin UART driver pushed its resources to the boards files, we
don't need these headers anymore.Signed-off-by: Mike Frysinger
25 May, 2011
3 commits
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Signed-off-by: Mike Frysinger
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These files had a lot of whitespace damage, mostly due to copying and
pasting original files that had damage.The BF561 header also had a lot of unused CONFIG_DEF_xxx defines, so
punt them all.Signed-off-by: Mike Frysinger
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Start a new common IRQ header and move all of the CEC pieces there. This
lets the individual part headers worry just about its SIC defines.Signed-off-by: Mike Frysinger
10 Jan, 2011
9 commits
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Signed-off-by: Mike Frysinger
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The SPORT/UART driver doesn't use the secondary channel pins, so don't
try and request them thus keeping other drivers from using them.Signed-off-by: Sonic Zhang
Signed-off-by: Mike Frysinger -
Signed-off-by: Mike Frysinger
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These were only included because of the irq handling of the PLL funcs,
and those PLL funcs have been moved out into their own header now.Signed-off-by: Mike Frysinger
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The main asm/blackfin.h header will pull in mach/blackfin.h to get
all the fun Blackfin defines. So having any of the sub-mach headers
trying to include asm/blackfin.h makes no sense -- punt it.The mach/blackfin.h header takes care of including the part-specific
def headers which in turn will include any other needed def file.
Similarly, it takes care of pulling in the part-specific cdef header.
So move this logic out of the blackfin.h when necessary.Further, make sure the cdef headers do not waste time including the
def headers again.Since all parts need the common def/cdef headers, move this logic
out of the part-specific headers and into the mach/blackfin.h file.Finally, we need to split the BF539 def header since the BF538 does
not have MXVR and we don't want to expose those MMRs.So now all parts should have the same behavior:
mach/blackfin.h
asm/def_LPBlackfin.h
part-specific def.h
if ! asm
asm/cdef_LPBlackfin.h
part-specific cdef.h
And the sub def/cdef headers only tail into what they need.Signed-off-by: Mike Frysinger
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Signed-off-by: Mike Frysinger
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The array of pointers is never written, so constify it.
Signed-off-by: Mike Frysinger
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Use the same naming convention for DMA traffic MMRs (most were legacy
anyways) so we can avoid useless ifdef trees.Same goes for MDMA names -- this actually allows us to undo a bunch of
ifdef redirects that existed for this purpose alone.Signed-off-by: Mike Frysinger
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Each Blackfin port has been duplicating UART structures and defines when
there really is no need for it. So start a new bfin_serial.h header to
unify all these pieces and give ourselves a fresh start.Signed-off-by: Mike Frysinger
23 Oct, 2010
1 commit
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Signed-off-by: Mike Frysinger
22 Oct, 2010
2 commits
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The num_chipselect field for on-chip Blackfin SPI buses is supposed to
be 1 larger than the number of actual CSs available. This is because
the hardware starts counting at 1 and not 0. There is a field for "CS0",
but it is marked as "reserved" everywhere.Signed-off-by: Mike Frysinger
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Now that the common header defines everything and the SPI drivers are
using it, we can drop these duplicated global namespace polluters.Signed-off-by: Mike Frysinger
07 Oct, 2010
2 commits
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Rename h/w IRQ flags handling functions to be in line with what is expected for
the irq renaming patch. This renames local_*_hw() to hard_local_*() using the
following perl command:perl -pi -e 's/local_irq_(restore|enable|disable)_hw/hard_local_irq_\1/ or s/local_irq_save_hw([_a-z]*)[(]flags[)]/flags = hard_local_irq_save\1()/' `find arch/blackfin/ -name "*.[ch]"`
and then fixing up asm/irqflags.h manually.
Additionally, arch/hard_local_save_flags() and arch/hard_local_irq_save() both
return the flags rather than passing it through the argument list.Signed-off-by: David Howells
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Split the PLL control code from the Blackfin machine-specific cdef headers so
that the irqflags functions can be renamed without incurring a header loop.Signed-off-by: David Howells
28 Aug, 2010
1 commit
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The common bfin_sport.h header now has unified definitions of these, so
stop polluting the global namespace.Signed-off-by: Mike Frysinger
07 Aug, 2010
4 commits
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The standard short name for control is CTL and not CTRL. Use TWI0_xxx
even on parts that only have one TWI bus to keep things simple. Drop
all the cdef helpers since the bus driver takes care of everything.Signed-off-by: Mike Frysinger
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Random tabs instead of spaces, mixes of the two, and unicode spaces
instead of ascii spaces.Signed-off-by: Mike Frysinger
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This is parallel to the existing P_DEFAULT_BOOT_SPI_CS, but in terms of
the GPIO value so it can be used with the normal gpio API.Signed-off-by: Mike Frysinger
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Signed-off-by: Mike Frysinger
21 May, 2010
1 commit
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Now that there's a common header with everything unified, drop the defines
from the global namespace. Pollution sucks.Signed-off-by: Mike Frysinger
09 Mar, 2010
6 commits
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This makes room for off-chip IRQ controllers.
Signed-off-by: Michael Hennerich
Signed-off-by: Mike Frysinger -
Signed-off-by: Michael Hennerich
Signed-off-by: Mike Frysinger -
This lets us support the new BF527-EZKIT V2.1 via platform resources
tweaks only.Signed-off-by: Michael Hennerich
Signed-off-by: Mike Frysinger -
This lets people easily select the UART/SPORT consoles for early printk
while leveraging the pins declared in the boards file.Signed-off-by: Sonic Zhang
Signed-off-by: Mike Frysinger -
Rather than keeping the pins in the actual driver and worrying about a
mess of Kconfig options, declare all the desired pin resources in the
boards file. This lets people easily select the specific pins/ports for
the normal emulated UART as well as GPIOs for CTS/RTS.Signed-off-by: Sonic Zhang
Signed-off-by: Mike Frysinger -
Rather than keeping the pins in the actual driver and worrying about a
mess of Kconfig options, declare all the desired pin resources in the
boards file. This lets people easily select the specific pins/ports for
the normal UART as well as GPIOs for CTS/RTS.Signed-off-by: Sonic Zhang
Signed-off-by: Mike Frysinger
15 Dec, 2009
5 commits
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Signed-off-by: Barry Song
Signed-off-by: Mike Frysinger -
Every Blackfin variant has the same DMA bit masks, so avoid duplicating
them over and over in each mach header.Signed-off-by: Mike Frysinger
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Signed-off-by: Mike Frysinger
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There are no MXVR device drivers, and if someday there is, we can put
these in a dedicated header rather than polluting the global namespace.Signed-off-by: Mike Frysinger
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The watchdog code doesn't need these, and the other parts had these
punted, so keep the global namespace clean.Signed-off-by: Mike Frysinger
