09 Jan, 2012
2 commits
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Signed-off-by: Scott Jiang
Signed-off-by: Bob Liu -
Macro name for spi controller driver has been modified, so update default
board file accordingly.Signed-off-by: Sonic Zhang
Signed-off-by: Bob Liu
14 Nov, 2011
1 commit
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The serial TX IRQ is not simply (RX IRQ + 1) on some Blackfin chips,
so move the values to the platform resources.Signed-off-by: Sonic Zhang
Signed-off-by: Mike Frysinger
Signed-off-by: Bob Liu
23 Jul, 2011
4 commits
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Have the logic that uses peripheral interrupt blocks key off of pint
defines rather than CPU names so that things are generalized across
families.Signed-off-by: Mike Frysinger
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The hardware block uses the name "request" rather than "irq", so update
the struct accordingly.Signed-off-by: Mike Frysinger
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Signed-off-by: Mike Frysinger
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The default for the Blackfin SPI driver is 8 bits and dma disabled,
so many of the bfin5xx_spi_chip resources are redundant. So punt
those parts.Further, drivers should themselves be declaring 16 bit transfers,
so for those that do, and for the ones which no longer do 16 bit
transfers, drop the bfin5xx_spi_chip resources.Signed-off-by: Mike Frysinger
29 May, 2011
2 commits
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The bf52x/bf54x have the incorrect addresses for USB_EP_NI7_RXINTERVAL
and USB_EP_NI7_TXCOUNT, so adjust those.Further, the bf54x header puts the USB defines in the wrong place, so
shuffle them back to the right grouping.Signed-off-by: Mike Frysinger
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Now that the serial code has been unified in bfin_serial.h, and the
Blackfin UART driver pushed its resources to the boards files, we
don't need these headers anymore.Signed-off-by: Mike Frysinger
25 May, 2011
5 commits
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Now that the Blackfin machine drivers have been updated to the
multicomponent support, update the resources to match. The pin
settings are now a board issue and removed from the driver.Signed-off-by: Scott Jiang
Signed-off-by: Mike Frysinger -
Both the BF548-EZKIT and the BF561-EZKIT use top boot flashes, so now
that Das U-Boot uses the last small sector for its environment, update
their nor layout in the kernel accordingly.Signed-off-by: Mike Frysinger
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Signed-off-by: Mike Frysinger
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These files had a lot of whitespace damage, mostly due to copying and
pasting original files that had damage.The BF561 header also had a lot of unused CONFIG_DEF_xxx defines, so
punt them all.Signed-off-by: Mike Frysinger
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Start a new common IRQ header and move all of the CEC pieces there. This
lets the individual part headers worry just about its SIC defines.Signed-off-by: Mike Frysinger
23 Mar, 2011
1 commit
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Even though the anomaly sheet says that the the bootrom is fixed, tests
have shown that the fix itself does not handle all cases. So until we
get a ROM update, assume the reset code is still broken and we need to
handle things ourselves.Signed-off-by: Mike Frysinger
18 Mar, 2011
3 commits
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No code uses these, and the short define names are polluting the global
namespace where they collide with things like common irq files. So just
punt the damned things. If in the future we need HDMA support, we can
make a standalone header for these things.Signed-off-by: Mike Frysinger
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Signed-off-by: Aaron Wu
Signed-off-by: Mike Frysinger -
The BF54x lacks dedicated DMA channels for the UART peripherals and need
to be muxed between others. So add a kconfig option so people can select
which channels the UARTs will use so they can pick between SPORTs and the
less commonly used EPPI/PIXC peripherals.Signed-off-by: steven miao
Signed-off-by: Mike Frysinger
10 Jan, 2011
12 commits
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Signed-off-by: Mike Frysinger
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The SPORT/UART driver doesn't use the secondary channel pins, so don't
try and request them thus keeping other drivers from using them.Signed-off-by: Sonic Zhang
Signed-off-by: Mike Frysinger -
Signed-off-by: Mike Frysinger
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Signed-off-by: Mike Frysinger
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These were only included because of the irq handling of the PLL funcs,
and those PLL funcs have been moved out into their own header now.Signed-off-by: Mike Frysinger
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The main asm/blackfin.h header will pull in mach/blackfin.h to get
all the fun Blackfin defines. So having any of the sub-mach headers
trying to include asm/blackfin.h makes no sense -- punt it.The mach/blackfin.h header takes care of including the part-specific
def headers which in turn will include any other needed def file.
Similarly, it takes care of pulling in the part-specific cdef header.
So move this logic out of the blackfin.h when necessary.Further, make sure the cdef headers do not waste time including the
def headers again.Since all parts need the common def/cdef headers, move this logic
out of the part-specific headers and into the mach/blackfin.h file.Finally, we need to split the BF539 def header since the BF538 does
not have MXVR and we don't want to expose those MMRs.So now all parts should have the same behavior:
mach/blackfin.h
asm/def_LPBlackfin.h
part-specific def.h
if ! asm
asm/cdef_LPBlackfin.h
part-specific cdef.h
And the sub def/cdef headers only tail into what they need.Signed-off-by: Mike Frysinger
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Signed-off-by: Mike Frysinger
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Signed-off-by: Mike Frysinger
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The array of pointers is never written, so constify it.
Signed-off-by: Mike Frysinger
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Use the same naming convention for DMA traffic MMRs (most were legacy
anyways) so we can avoid useless ifdef trees.Same goes for MDMA names -- this actually allows us to undo a bunch of
ifdef redirects that existed for this purpose alone.Signed-off-by: Mike Frysinger
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Each Blackfin port has been duplicating UART structures and defines when
there really is no need for it. So start a new bfin_serial.h header to
unify all these pieces and give ourselves a fresh start.Signed-off-by: Mike Frysinger
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In order to not touch the driver file for different xtal usage,
push the clkin value to board file and calculate the register
value instead of hardcoding it.Signed-off-by: Bob Liu
Signed-off-by: Mike Frysinger
10 Dec, 2010
2 commits
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Just adding its own platform_driver, not really
using it yet.Later patches will come to split power management
code from musb_core and move it completely to HW
glue layer.Signed-off-by: Felipe Balbi
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change all ocurrences of musb_hdrc to musb-hdrc.
We will call glue layer drivers musb-,
so in order to keep things somewhat standard, let's
change the underscore into a dash.Signed-off-by: Felipe Balbi
01 Dec, 2010
1 commit
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Soon resource data will get automatically
populated from a set of autogenerated data
from TI's hardware database for the OMAP
platform.Such database, might not have resources at
the expected order by the current drivers.While we could hack in some exceptions to
that tool to generate resources in a specific
order, it seems less fragile to use the
resource name instead. That way, no matter
what order the resources are generated, the
driver still work.Modified the OMAP, Blackfin and Davinci
architecture files to add the name of the IRQs
in the resource structures and musb driver to
use the platform_get_irq_byname() api to get
the device and dma irq numbers instead of using
the index.Cc: Tony Lindgren
Acked-by: Kevin Hilman
Acked-by: Mike Frysinger
Signed-off-by: Hema HK
Signed-off-by: Felipe Balbi
23 Oct, 2010
1 commit
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Signed-off-by: Mike Frysinger
22 Oct, 2010
6 commits
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Reported-by: D Binderman
Signed-off-by: Mike Frysinger -
The BF54x processor has a ton of on-chip peripherals and in order to
support them all, the u-boot image is quite large. So give it 512KiB
in all bootable flashes to make our lives easier.Signed-off-by: Mike Frysinger
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Signed-off-by: steven miao
Signed-off-by: Mike Frysinger -
The num_chipselect field for on-chip Blackfin SPI buses is supposed to
be 1 larger than the number of actual CSs available. This is because
the hardware starts counting at 1 and not 0. There is a field for "CS0",
but it is marked as "reserved" everywhere.Signed-off-by: Mike Frysinger
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Add platform resources for the on-chip CAN peripheral so we can use it.
Signed-off-by: Michael Hennerich
Signed-off-by: Mike Frysinger -
Make sure we use the right Kconfig names and platform strings.
Signed-off-by: Barry Song
Signed-off-by: Mike Frysinger
