30 Dec, 2011
2 commits
-
The different ColdFire V4e MMU requires its own dedicated paging init
code, and a TLB miss handler for its software driven TLB.Signed-off-by: Greg Ungerer
Acked-by: Geert Uytterhoeven
Acked-by: Matt Waddel
Acked-by: Kurt Mahan -
Basic register level definitions to support the internal MMU of the
V4e ColdFire cores.Signed-off-by: Greg Ungerer
Acked-by: Geert Uytterhoeven
Acked-by: Matt Waddel
Acked-by: Kurt Mahan