11 Jan, 2012

4 commits


08 Dec, 2011

6 commits

  • - Add CPU_XLP and NLM_XLR_BOARD to arch/mips/Kconfig for Netlogic XLP boards
    - Update mips Makefiles to add XLP

    Signed-off-by: Jayachandran C
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2968/
    Signed-off-by: Ralf Baechle

    Jayachandran C
     
  • Add support for Netlogic's XLP MIPS SoC. This patch adds:
    * XLP processor ID in cpu_probe.c and asm/cpu.h
    * XLP case to asm/module.h
    * CPU_XLP case to mm/tlbex.c
    * minor change to r4k cache handling to ignore XLP secondary cache
    * XLP cpu overrides to mach-netlogic/cpu-feature-overrides.h

    Signed-off-by: Jayachandran C
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2966/
    Signed-off-by: Ralf Baechle

    Jayachandran C
     
  • This patch addresses a couple of related problems:

    1) The kernel may reside in physical memory outside of the ranges set
    by plat_mem_setup(). If this is the case, init mem cannot be
    reused as it resides outside of the range of pages that the kernel
    memory allocators control.

    2) initrd images might be loaded in physical memory outside of the
    ranges set by plat_mem_setup(). The memory likewise cannot be
    reused. The patch doesn't handle this specific case, but the
    infrastructure is useful for future patches that do.

    The crux of the problem is that there are memory regions that need be
    memory_present(), but that cannot be free_bootmem() at the time of
    arch_mem_init(). We create a new type of memory (BOOT_MEM_INIT_RAM)
    for use with add_memory_region(). Then arch_mem_init() adds the init
    mem with this type if the init mem is not already covered by existing
    ranges.

    When memory is being freed into the bootmem allocator, we skip the
    BOOT_MEM_INIT_RAM ranges so they are not clobbered, but we do signal
    them as memory_present(). This way when they are later freed, the
    necessary memory manager structures have initialized and the Sparse
    allocater is prevented from crashing.

    The Octeon specific code that handled this case is removed, because
    the new general purpose code handles the case.

    Signed-off-by: David Daney
    To: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/1988/
    Signed-off-by: Ralf Baechle

    David Daney
     
  • Gup is used in a few cases, say futex.

    This work is derived from the x86 version, and operations of pte and pmd are
    adapted to the defines of MIPS in straight forward manner.

    [ralf@linux-mips.org: Fixed up reject in arch/mips/mm/Makefile due to
    whitespace formatting differences. Fixed build error in gup.c due to
    conflicting changes elsewhere in the kernel.]

    Signed-off-by: Hillf Danton
    Cc: David Daney
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2859/
    Signed-off-by: Ralf Baechle

    Hillf Danton
     
  • Move add_wired_entry to its own header file from where it will be
    always included. Patch up other users of add_wired_entry to also include
    the header as needed.

    Signed-off-by: Ralf Baechle

    Ralf Baechle
     
  • Panic() invokes printk() to add a \n internally, so panic arguments should
    not themselves end in \n. Panic invocations in arch/mips and elsewhere
    are inconsistently sometimes terminating in \n, sometimes not.

    Signed-off-by: Ralf Baechle

    Ralf Baechle
     

25 Oct, 2011

1 commit

  • For Alchemy-PCI I need to add a wired entry after resuming from RAM;
    remove the __init from add_wired_entry() so that this actually works.

    Signed-off-by: Manuel Lauss
    To: Linux-MIPS
    Patchwork: https://patchwork.linux-mips.org/patch/2684/
    Signed-off-by: Ralf Baechle

    Manuel Lauss
     

20 Oct, 2011

1 commit

  • Until now flush_kernel_vmap_range() and invalidate_kernel_vmap_range() did
    not exist on MIPS resulting in heavy cache corruption on XFS filesystems.

    Left for the post-3.0 time: optimization and make this work with highmem,
    too. Since the combination of highmem + cache aliases atm doesn't work
    this isn't a regression.

    Signed-off-by: Ralf Baechle
    Patchwork: https://patchwork.linux-mips.org/patch/2505/

    Ralf Baechle
     

21 Sep, 2011

2 commits

  • For the case PM_DEFAULT_MASK == 0, we were placing a branch in the
    delay slot of another branch. This leads to undefined behavior.

    Signed-off-by: David Daney
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2775/
    Signed-off-by: Ralf Baechle

    David Daney
     
  • Only some GCC versions such as gcc 4.2 notice that the variable wr in
    build_r3000_tlb_modify_handler is used uninitialized. When using one
    of those GCCs the build will fail due to -Werror. GCC 4.6 does not
    warn about the uninitialized use of wr.

    This issue was introduced by 7211f4d7a3dcbe57c5d396c334dca525315dceb2
    [MIPS: Close races in TLB modify handlers.]

    Reported-by: Ganesan Ramalingam
    Signed-off-by: Ralf Baechle

    Ralf Baechle
     

17 Sep, 2011

1 commit

  • Fix checkpatch warnings. Rename arch_get_unmapped_area_foo() to
    arch_get_unmapped_area_common(). Make indentations and spacing more
    consistent. Add for likely/unlikely.

    Signed-off-by: Kevin Cernekee
    Cc: Jian Peng
    Cc: David Daney
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2506/
    Signed-off-by: Ralf Baechle

    Kevin Cernekee
     

27 Jul, 2011

1 commit

  • * 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (31 commits)
    MIPS: Close races in TLB modify handlers.
    MIPS: Add uasm UASM_i_SRL_SAFE macro.
    MIPS: RB532: Use hex_to_bin()
    MIPS: Enable cpu_has_clo_clz for MIPS Technologies' platforms
    MIPS: PowerTV: Provide cpu-feature-overrides.h
    MIPS: Remove pointless return statement from empty void functions.
    MIPS: Limit fixrange_init() to the FIXMAP region
    MIPS: Install handlers for software IRQs
    MIPS: Move FIXADDR_TOP into spaces.h
    MIPS: Add SYNC after cacheflush
    MIPS: pfn_valid() is broken on low memory HIGHMEM systems
    MIPS: HIGHMEM DMA on noncoherent MIPS32 processors
    MIPS: topdown mmap support
    MIPS: Remove redundant addr_limit assignment on exec.
    MIPS: AR7: Replace __attribute__((__packed__)) with __packed
    MIPS: AR7: Remove 'space before tabs' in platform.c
    MIPS: Lantiq: Add missing clk_enable and clk_disable functions.
    MIPS: AR7: Fix trailing semicolon bug in clock.c
    MAINTAINERS: Update MIPS entry.
    MIPS: BCM63xx: Remove duplicate PERF_IRQSTAT_REG definition
    ...

    Linus Torvalds
     

26 Jul, 2011

6 commits

  • Page table entries are made invalid by writing a zero into the the PTE
    slot in a page table. This creates a race condition with the TLB
    modify handlers when they are updating the PTE.

    CPU0 CPU1

    Test for _PAGE_PRESENT
    . set to not _PAGE_PRESENT (zero)
    Set to _PAGE_VALID

    So now the page not present value (zero) is suddenly valid and user
    space programs have access to physical page zero.

    We close the race by putting the test for _PAGE_PRESENT and setting of
    _PAGE_VALID into an atomic LL/SC section. This requires more registers
    than just K0 and K1 in the handlers, so we need to save some registers
    to a save area and then restore them when we are done.

    The save area is an array of cacheline aligned structures that should
    not suffer cache line bouncing as they are CPU private.

    [ralf@linux-mips.org: Fix !defined(CONFIG_MIPS_PGD_C0_CONTEXT) build error.]

    Signed-off-by: David Daney
    To: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2577/
    Signed-off-by: Ralf Baechle

    David Daney
     
  • fixrange_init() allocates page tables for all addresses higher than
    FIXADDR_TOP. On processors that override the default FIXADDR_TOP
    address of 0xfffe_0000, this can consume up to 4 pages (1 page per 4MB)
    for pgd's that are never used.

    Signed-off-by: Kevin Cernekee
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/1980/
    Signed-off-by: Ralf Baechle

    Kevin Cernekee
     
  • On processors with deep write buffers, it is likely that many cycles
    will pass between a CACHE instruction and the time the data actually
    gets written out to DRAM. Add a SYNC instruction to ensure that the
    buffers get emptied before the flush functions return.

    Actual problem seen in the wild:

    1) dma_alloc_coherent() allocates cached memory

    2) memset() is called to clear the new pages

    3) dma_cache_wback_inv() is called to flush the zero data out to memory

    4) dma_alloc_coherent() returns an uncached (kseg1) pointer to the
    freshly allocated pages

    5) Caller writes data through the kseg1 pointer

    6) Buffered writeback data finally gets flushed out to DRAM

    7) Part of caller's data is inexplicably zeroed out

    This patch adds SYNC between steps 3 and 4, which fixed the problem.

    Signed-off-by: Kevin Cernekee
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Patchwork:
    Signed-off-by: Ralf Baechle

    Kevin Cernekee
     
  • pfn_valid() compares the PFN to max_mapnr:

    __pfn >= min_low_pfn && __pfn < max_mapnr;

    On HIGHMEM kernels, highend_pfn is used to set the value of max_mapnr.
    Unfortunately, highend_pfn is left at zero if the system does not
    actually have enough RAM to reach into the HIGHMEM range. This causes
    pfn_valid() to always return false, and when debug checks are enabled
    the kernel will fail catastrophically:

    Memory: 22432k/32768k available (2249k kernel code, 10336k reserved, 653k data, 1352k init, 0k highmem)
    NR_IRQS:128
    kfree_debugcheck: out of range ptr 81c02900h.
    Kernel bug detected[#1]:
    Cpu 0
    $ 0 : 00000000 10008400 00000034 00000000
    $ 4 : 8003e160 802a0000 8003e160 00000000
    $ 8 : 00000000 0000003e 00000747 00000747
    ...

    On such a configuration, max_low_pfn should be used to set max_mapnr.

    This was seen on 2.6.34.

    Signed-off-by: Kevin Cernekee
    To: Ralf Baechle
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/1992/
    Signed-off-by: Ralf Baechle

    Kevin Cernekee
     
  • [v4: Patch applies to linux-queue.git with kmap_atomic patches:
    https://patchwork.kernel.org/patch/189932/
    https://patchwork.kernel.org/patch/194552/
    https://patchwork.kernel.org/patch/189912/ ]

    The MIPS DMA coherency functions do not work properly (i.e. kernel oops)
    when HIGHMEM pages are passed in as arguments. Use kmap_atomic() to
    temporarily map high pages for cache maintenance operations.

    Tested on a 2.6.36-rc7 1GB HIGHMEM SMP no-alias system.

    Signed-off-by: Dezhong Diao
    Signed-off-by: Kevin Cernekee
    Cc: Dezhong Diao
    Cc: David Daney
    Cc: David VomLehn
    Cc: Sergei Shtylyov
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/1695/
    Signed-off-by: Ralf Baechle

    Dezhong Diao
     
  • This patch introduced topdown mmap support in user process address
    space allocation policy.

    Recently, we ran some large applications that use mmap heavily and
    lead to OOM due to inflexible mmap allocation policy on MIPS32.

    Since most other major archs supported it for years, it is reasonable
    to follow the trend and reduce the pain of porting applications.

    Due to cache aliasing concern, arch_get_unmapped_area_topdown() and
    other helper functions are implemented in arch/mips/kernel/syscall.c.

    Signed-off-by: Jian Peng
    Cc: David Daney
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2389/
    Signed-off-by: Ralf Baechle

    Jian Peng
     

01 Jul, 2011

1 commit

  • The nmi parameter indicated if we could do wakeups from the current
    context, if not, we would set some state and self-IPI and let the
    resulting interrupt do the wakeup.

    For the various event classes:

    - hardware: nmi=0; PMI is in fact an NMI or we run irq_work_run from
    the PMI-tail (ARM etc.)
    - tracepoint: nmi=0; since tracepoint could be from NMI context.
    - software: nmi=[0,1]; some, like the schedule thing cannot
    perform wakeups, and hence need 0.

    As one can see, there is very little nmi=1 usage, and the down-side of
    not using it is that on some platforms some software events can have a
    jiffy delay in wakeup (when arch_irq_work_raise isn't implemented).

    The up-side however is that we can remove the nmi parameter and save a
    bunch of conditionals in fast paths.

    Signed-off-by: Peter Zijlstra
    Cc: Michael Cree
    Cc: Will Deacon
    Cc: Deng-Cheng Zhu
    Cc: Anton Blanchard
    Cc: Eric B Munson
    Cc: Heiko Carstens
    Cc: Paul Mundt
    Cc: David S. Miller
    Cc: Frederic Weisbecker
    Cc: Jason Wessel
    Cc: Don Zickus
    Link: http://lkml.kernel.org/n/tip-agjev8eu666tvknpb3iaj0fg@git.kernel.org
    Signed-off-by: Ingo Molnar

    Peter Zijlstra
     

25 May, 2011

1 commit

  • Fold all the mmu_gather rework patches into one for submission

    Signed-off-by: Peter Zijlstra
    Reported-by: Hugh Dickins
    Cc: Benjamin Herrenschmidt
    Cc: David Miller
    Cc: Martin Schwidefsky
    Cc: Russell King
    Cc: Paul Mundt
    Cc: Jeff Dike
    Cc: Richard Weinberger
    Cc: Tony Luck
    Cc: KAMEZAWA Hiroyuki
    Cc: Mel Gorman
    Cc: KOSAKI Motohiro
    Cc: Nick Piggin
    Cc: Namhyung Kim
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Peter Zijlstra
     

24 May, 2011

1 commit

  • * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (39 commits)
    b43: fix comment typo reqest -> request
    Haavard Skinnemoen has left Atmel
    cris: typo in mach-fs Makefile
    Kconfig: fix copy/paste-ism for dell-wmi-aio driver
    doc: timers-howto: fix a typo ("unsgined")
    perf: Only include annotate.h once in tools/perf/util/ui/browsers/annotate.c
    md, raid5: Fix spelling error in comment ('Ofcourse' --> 'Of course').
    treewide: fix a few typos in comments
    regulator: change debug statement be consistent with the style of the rest
    Revert "arm: mach-u300/gpio: Fix mem_region resource size miscalculations"
    audit: acquire creds selectively to reduce atomic op overhead
    rtlwifi: don't touch with treewide double semicolon removal
    treewide: cleanup continuations and remove logging message whitespace
    ath9k_hw: don't touch with treewide double semicolon removal
    include/linux/leds-regulator.h: fix syntax in example code
    tty: fix typo in descripton of tty_termios_encode_baud_rate
    xtensa: remove obsolete BKL kernel option from defconfig
    m68k: fix comment typo 'occcured'
    arch:Kconfig.locks Remove unused config option.
    treewide: remove extra semicolons
    ...

    Linus Torvalds
     

19 May, 2011

3 commits


11 May, 2011

2 commits

  • CC arch/mips/mm/tlbex.o
    arch/mips/mm/tlbex.c: In function 'build_r4000_tlb_refill_handler':
    arch/mips/mm/tlbex.c:1155:22: error: variable 'vmalloc_mode' set but not used [-Werror=unused-but-set-variable]
    arch/mips/mm/tlbex.c:1154:28: error: variable 'htlb_info' set but not used [-Werror=unused-but-set-variable]
    cc1: all warnings being treated as errors

    Signed-off-by: Ralf Baechle

    Ralf Baechle
     
  • CC arch/mips/mm/c-r4k.o
    arch/mips/mm/c-r4k.c: In function 'probe_scache':
    arch/mips/mm/c-r4k.c:1078:6: error: variable 'tmp' set but not used [-Werror=unused-but-set-variable]
    cc1: all warnings being treated as errors

    Older GCC versions didn't warn about the unused variable tmp because it was
    getting initialized.

    Signed-off-by: Ralf Baechle

    Ralf Baechle
     

26 Apr, 2011

1 commit


06 Apr, 2011

1 commit


31 Mar, 2011

1 commit


15 Mar, 2011

2 commits


19 Jan, 2011

5 commits

  • On the off chance that uasm ever warns about overflow, there is no way
    to know what the offending instruction is.

    Change the printks to WARNs, so we can get a nice stack trace. It has
    the added benefit of being much more noticeable than the short single
    line warning message, so is less likely to be ignored.

    Signed-off-by: David Daney
    To: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/1905/
    Signed-off-by: Ralf Baechle

    David Daney
     
  • Octeon can use scratch registers in the TLB handlers. Octeon II can
    use LDX instructions.

    Signed-off-by: David Daney
    To: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/1904/
    Signed-off-by: Ralf Baechle

    David Daney
     
  • Needed by Octeon II optimized TLB handlers.

    Signed-off-by: David Daney
    To: linux-mips@linux-mips.org
    Pachwork: https://patchwork.linux-mips.org/patch/1903/
    Signed-off-by: Ralf Baechle

    David Daney
     
  • If the CPU supports BBIT0 and BBIT1, use them in TLB handlers as they
    are more efficient than an AND followed by an branch and then
    restoring the clobbered register.

    Signed-off-by: David Daney
    To: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/1873/
    Signed-off-by: Ralf Baechle

    David Daney
     
  • Decide at runtime to use either Context or KScratch to hold the PGD
    pointer.

    Signed-off-by: David Daney
    To: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/1876/
    Signed-off-by: Ralf Baechle

    David Daney