08 Dec, 2011

4 commits

  • Add new processor ID to asm/cpu.h and kernel/cpu-probe.c.
    Update to new CPU frequency detection code which works on XLP 3XX
    and 8XX.

    Signed-off-by: Jayachandran C
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2971/
    Signed-off-by: Ralf Baechle

    Jayachandran C
     
  • Create a common NMI and reset handler in smpboot.S and use this for
    both XLR and XLP. In the earlier code, the woken up CPUs would
    busy wait until released, switch this to wakeup by NMI.

    The initial wakeup code or XLR and XLP are differ since they are
    started from different bootloaders (XLP from u-boot and XLR from
    netlogic bootloader). But in both platforms the woken up CPUs wait
    and are released by sending an NMI.

    Add support for starting XLR and XLP in 1/2/4 threads per core.

    Signed-off-by: Jayachandran C
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2970/
    Signed-off-by: Ralf Baechle

    Jayachandran C
     
  • - Add CPU_XLP and NLM_XLR_BOARD to arch/mips/Kconfig for Netlogic XLP boards
    - Update mips Makefiles to add XLP

    Signed-off-by: Jayachandran C
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2968/
    Signed-off-by: Ralf Baechle

    Jayachandran C
     
  • - Update common files to support XLP.
    - Add arch/mips/include/asm/netlogic/xlp-hal for register definitions
    and access macros
    - Add arch/mips/netlogic/xlp/ for XLP specific files.

    Signed-off-by: Jayachandran C
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2967/
    Signed-off-by: Ralf Baechle

    Jayachandran C