30 Jun, 2011
1 commit
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Follows the powerpc change, for much the same rationale.
Signed-off-by: Paul Mundt
31 Mar, 2011
1 commit
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Fixes generated by 'codespell' and manually reviewed.
Signed-off-by: Lucas De Marchi
17 Mar, 2011
1 commit
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Trivial conversion, simply encapsulate the NMI stats in the arch code.
Signed-off-by: Paul Mundt
28 Oct, 2010
1 commit
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This fixes up the __cpu_disable() path's IRQ migration for the
irq_data changes.Signed-off-by: Paul Mundt
27 Oct, 2010
1 commit
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Presently the irq chip is found through the irq_desc, but as this is
going away convert over to an irq_data lookup instead.Signed-off-by: Paul Mundt
26 Oct, 2010
1 commit
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Now that the genirq code provides an IRQ bitmap of its own and the
necessary API to manipulate it, there's no need to keep our own version
around anymore.In the process we kill off some unused IRQ reservation code, with future
users now having to tie in to the genirq API as normal.Signed-off-by: Paul Mundt
25 Oct, 2010
1 commit
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* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (110 commits)
sh: i2c-sh7760: Replase from ctrl_* to __raw_*
sh: clkfwk: Shuffle around to match the intc split up.
sh: clkfwk: modify for_each_frequency end condition
sh: fix clk_get() error handling
sh: clkfwk: Fix fault in frequency iterator.
sh: clkfwk: Add a helper for rate rounding by divisor ranges.
sh: clkfwk: Abstract rate rounding helper.
sh: clkfwk: support clock remapping.
sh: pci: Convert to upper/lower_32_bits() helpers.
sh: mach-sdk7786: Add support for the FPGA SRAM.
sh: Provide a generic SRAM pool for tiny memories.
sh: pci: Support secondary FPGA-driven PCIe clocks on SDK7786.
sh: pci: Support slot 4 routing on SDK7786.
sh: Fix up PMB locking.
sh: mach-sdk7786: Add support for fpga gpios.
sh: use pr_fmt for clock framework, too.
sh: remove name and id from struct clk
sh: free-without-alloc fix for sh_mobile_lcdcfb
sh: perf: Set up perf_max_events.
sh: perf: Support SH-X3 hardware counters.
...Fix up trivial conflicts (perf_max_events got removed) in arch/sh/kernel/perf_event.c
12 Oct, 2010
1 commit
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sparse irq sets up NR_IRQS_LEGACY irq descriptors and archs then go
ahead and allocate more.Use the unused return value of arch_probe_nr_irqs() to let the
architecture return the number of early allocations. Fix up all users.Signed-off-by: Thomas Gleixner
Reviewed-by: Ingo Molnar
05 Oct, 2010
1 commit
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Many interrupts that share a single mask source but are on different
hardware vectors will have an associated register tied to an INTEVT that
denotes the precise cause for the interrupt exception being triggered.This introduces the concept of IRQ subgroups in the intc core, where
a virtual IRQ map is constructed for each of the pre-defined cause bits,
and a higher level chained handler takes control of the parent INTEVT.
This enables CPUs with heavily muxed IRQ vectors (especially across
disjoint blocks) to break things out in to a series of managed chained
handlers while being able to dynamically lookup and adopt the IRQs
created for them.This is largely an opt-in interface, requiring CPUs to manually submit
IRQs for subgroup splitting, in addition to providing identifiers in
their enum maps that can be used for lazy lookup via the radix tree.Signed-off-by: Paul Mundt
26 Apr, 2010
1 commit
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This adds preliminary support for CPU hotplug for SH SMP systems.
Signed-off-by: Paul Mundt
15 Apr, 2010
1 commit
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This implements support for hardware-managed IRQ balancing as implemented
by SH-X3 cores (presently only hooked up for SH7786, but can probably be
carried over to other SH-X3 cores, too).CPUs need to specify their distribution register along with the mask
definitions, as these follow the same format. Peripheral IRQs that don't
opt out of balancing will be automatically distributed at the whim of the
hardware block, while each CPU needs to verify whether it is handling the
IRQ or not, especially before clearing the mask.Signed-off-by: Paul Mundt
15 Dec, 2009
1 commit
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Convert locks which cannot be sleeping locks in preempt-rt to
raw_spinlocks.Signed-off-by: Thomas Gleixner
Acked-by: Peter Zijlstra
Acked-by: Ingo Molnar
02 Nov, 2009
1 commit
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Different CPUs will have different starting vectors, with varying
amounts of reserved or unusable vector space prior to the first slot.
This introduces a legacy vector reservation system that inserts itself in
between the CPU vector map registration and the platform specific IRQ
setup. This works fine in practice as the only new vectors that boards
need to establish on their own should be dynamically allocated rather
than arbitrarily assigned. As a plus, this also makes all of the
converted platforms sparseirq ready.Signed-off-by: Paul Mundt
26 Oct, 2009
2 commits
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Conflicts:
arch/sh/kernel/dwarf.c -
This adds an __irq_entry annotation for do_IRQ() so that the IRQ
annotation in the function graph tracer works as advertized. We already
have the IRQENTRY section wired up, so this is just a trivial addition
to actually make use of it.Signed-off-by: Paul Mundt
14 Oct, 2009
1 commit
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This plugs in support for NMI counting per-CPU via irq_cpustat_t.
Modelled after the x86 implementation.Signed-off-by: Paul Mundt
21 Sep, 2009
1 commit
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This patch changes the remaining direct references to
.bss.page_aligned in C and assembly code to use the macros in
include/linux/linkage.h.Signed-off-by: Tim Abbott
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: H. Peter Anvin
Acked-by: Paul Mundt
Cc: Chris Zankel
Signed-off-by: Sam Ravnborg
01 Sep, 2009
1 commit
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This implements support for NMI debugging that was shamelessly copied
from the avr32 port. A bit of special magic is needed in the interrupt
exception path given that the NMI exception handler is stubbed in to the
regular exception handling table despite being reported in INTEVT. So we
mangle the lookup and kick off an EXPEVT-style exception dispatch from
the INTEVT path for exceptions that do_IRQ() has no chance of handling.
As a result, we also drop the evt2irq() conversion from the do_IRQ() path
and just do it in assembly.Signed-off-by: Paul Mundt
24 Aug, 2009
1 commit
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This patch changes the way in which "multi-evt" interrups are handled.
The intc_evt2irq_table and related intc_evt2irq() have been removed and
the "redirecting" handler is installed for the coupled interrupts.Thanks to that the do_IRQ() function don't have to use another level
of indirection for all the interrupts...Signed-off-by: Pawel Moll
Signed-off-by: Stuart Menefy
Signed-off-by: Paul Mundt
17 Aug, 2009
1 commit
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This moves the initialization over to an early_initcall(). This fixes up
some lockdep interaction issues. At the same time, kill off some
superfluous locking in the init path.Signed-off-by: Paul Mundt
14 Aug, 2009
1 commit
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This is a first cut at a generic DWARF unwinder for the kernel. It's
still lacking DWARF64 support and the DWARF expression support hasn't
been tested very well but it is generating proper stacktraces on SH for
WARN_ON() and NULL dereferences.Signed-off-by: Matt Fleming
Signed-off-by: Paul Mundt
11 Jul, 2009
1 commit
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STACK_DEBUG ties in to mcount in order to do function-granular stack
overflow checks as opposed to lazily checking from IRQ context. As the
default is nohz, the frequency of overflow checking is too irregular to
catch much useful information, and so the mcount approach employed by
sparc64 is adopted instead.This kills off the old check entirely from the do_IRQ() path and now
adopts CONFIG_MCOUNT instead.Signed-off-by: Paul Mundt
22 May, 2009
2 commits
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This is just a simple arch_probe_nr_irqs() stub that wraps to the
platform defined number of IRQs. This can be made gradually more
intelligent based on what we can infer from the INTC tables and so on.Signed-off-by: Paul Mundt
-
This converts a few places that were using the old irq_desc[] array over
to the shiny new irq_to_desc() helper. Preperatory work for sparse irq
support.Signed-off-by: Paul Mundt
27 Mar, 2009
1 commit
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* 'irq-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (32 commits)
x86: disable __do_IRQ support
sparseirq, powerpc/cell: fix unused variable warning in interrupt.c
genirq: deprecate obsolete typedefs and defines
genirq: deprecate __do_IRQ
genirq: add doc to struct irqaction
genirq: use kzalloc instead of explicit zero initialization
genirq: make irqreturn_t an enum
genirq: remove redundant if condition
genirq: remove unused hw_irq_controller typedef
irq: export remove_irq() and setup_irq() symbols
irq: match remove_irq() args with setup_irq()
irq: add remove_irq() for freeing of setup_irq() irqs
genirq: assert that irq handlers are indeed running in hardirq context
irq: name 'p' variables a bit better
irq: further clean up the free_irq() code flow
irq: refactor and clean up the free_irq() code flow
irq: clean up manage.c
irq: use GFP_KERNEL for action allocation in request_irq()
kernel/irq: fix sparse warning: make symbol static
irq: optimize init_kstat_irqs/init_copy_kstat_irqs
...
27 Feb, 2009
1 commit
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Instead of keeping the single vector -> single linux irq mapping
we extend the intc code to support merging of vectors to a single
linux irq. This helps processors such as sh7750, sh7780 and sh7785
which have more vectors than masking ability. With this patch in
place we can modify the intc tables to use one irq per maskable
irq source. Please note the following:- If multiple vectors share the same enum then only the
first vector will be available as a linux irq.- Drivers may need to be rewritten to get pending irq
source from the hardware block instead of irq number.This patch together with the sh7785 specific intc tables solves
DMA controller irq issues related to buggy interrupt masking.Reported-by: Yoshihiro Shimoda
Signed-off-by: Magnus Damm
Signed-off-by: Paul Mundt
11 Jan, 2009
1 commit
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Impact: build fix
Ingo Molnar wrote:
> tip/arch/blackfin/kernel/irqchip.c: In function 'show_interrupts':
> tip/arch/blackfin/kernel/irqchip.c:85: error: 'struct kernel_stat' has no member named 'irqs'
> make[2]: *** [arch/blackfin/kernel/irqchip.o] Error 1
> make[2]: *** Waiting for unfinished jobs....
>So could move kstat_irqs array to irq_desc struct.
(s390, m68k, sparc) are not touched yet, because they don't support genirq
Signed-off-by: Yinghai Lu
Signed-off-by: Ingo Molnar
29 Jul, 2008
1 commit
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This follows the sparc changes a439fe51a1f8eb087c22dd24d69cebae4a3addac.
Most of the moving about was done with Sam's directions at:
http://marc.info/?l=linux-sh&m=121724823706062&w=2
with subsequent hacking and fixups entirely my fault.
Signed-off-by: Sam Ravnborg
Signed-off-by: Paul Mundt
29 Apr, 2008
1 commit
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Add a proper prototype for __do_softirq() in include/linux/interrupt.h
Signed-off-by: Adrian Bunk
Acked-by: Ingo Molnar
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
14 Feb, 2008
1 commit
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Reported-by: Robert P. J. Day
Signed-off-by: Paul Mundt
07 Nov, 2007
1 commit
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Caught by the surprisingly not-entirely-useless 'includecheck'.
Signed-off-by: Paul Mundt
02 Nov, 2007
1 commit
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While using separate IRQ stacks can cut down on stack consumption,
many users can also use 4k stacks directly without the additional
need of separate stacks for soft and hardirqs.With this split, we support the same rationale for 4KSTACKS as
m68knommu, with the IRQSTACKS abstraction as per ppc64.Signed-off-by: Paul Mundt
11 Oct, 2007
1 commit
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As noted by Christoph Hellwig, pktgen was the only user so
it can now be removed.[ Add missing cases caught by Adrian Bunk. -DaveM ]
Signed-off-by: Robert Olsson
Signed-off-by: David S. Miller
20 Jul, 2007
1 commit
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This patch unifies the cpu specific interrupt setup functions for
interrupt controller blocks such as ipr, intc2 and intc. There is no
point in having separate functions for each interrupt controller, so
let's clean this up.Signed-off-by: Magnus Damm
Signed-off-by: Paul Mundt
12 Jul, 2007
1 commit
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Use the newly added .bss.page_aligned section for aligning the stacks
rather than THREAD_SIZE.Signed-off-by: Robert P. J. Day
Signed-off-by: Paul Mundt
07 May, 2007
1 commit
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Each board sets the total number of IRQs that it's interested in via
the machvec. Previously we cared about the off vs on-chip IRQ range,
but any code relying on that is long dead. Set NR_IRQS to something
sensible given the vector range, and allow boards to cap it if they
really care.Signed-off-by: Paul Mundt
14 Mar, 2007
1 commit
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SH-3 and SH-4 were trampling the register, and SH-2 wasn't even
setting it in the first place. This ended up with some rather
broken behaviour in the sysrq show_regs().Signed-off-by: Paul Mundt
06 Dec, 2006
3 commits
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The following moves the creation of IPR interupts into setup-7750.c
and updates a few other things to make it all work after the "Drop
CPU subtype IRQ headers" commit. It boots and runs fine on my titan
board.- adds an ipr_idx to the ipr_data and uses a function in the subtype
code to calculate the address of the IPR registers- adds a function to enable individual interrupt mode for externals
in the subtype code and calls that from the titan board code
instead of doing it directly.- I changed the shift in the ipr_data to be the actual # of bits to
shift, instead of the numnber / 4 - made it easier to match with
the manual.Signed-off-by: Jamie Lenehan
Signed-off-by: Paul Mundt -
There was a clobber issue with the register we were saving
the stack in, so we switch to a register that we handle in
the clobber list properly already.This also follows the x86 changes for allowing the softirq
checks from hardirq context.Signed-off-by: Paul Mundt
-
This fixes up the kernel for gcc4. The existing exception handlers
needed some wrapping for pt_regs access, acessing the registers
via a RELOC_HIDE() pointer.The strcpy() issues popped up here too, so add -ffreestanding and
kill off the symbol export.Signed-off-by: Stuart Menefy
Signed-off-by: Paul Mundt
