05 Dec, 2011

1 commit

  • Since new Intel software developers manual introduces
    new format for AVX instruction set (including AVX2),
    it is important to update x86-opcode-map.txt to fit
    those changes.

    Signed-off-by: Masami Hiramatsu
    Cc: "H. Peter Anvin"
    Cc: yrl.pp-manager.tt@hitachi.com
    Link: http://lkml.kernel.org/r/20111205120557.15475.13236.stgit@cloud
    Signed-off-by: Ingo Molnar

    Masami Hiramatsu
     

17 Dec, 2009

1 commit

  • Not all awk implementations (including the default awk in Ubuntu 9.10)
    support POSIX character classes. Since x86-opcode-map.txt is plain
    ASCII, we can just use explicit ranges for lower case, alphabetic, and
    alphanumeric characters instead.

    Signed-off-by: Roland Dreier
    Acked-by: Masami Hiramatsu
    LKML-Reference:
    Signed-off-by: H. Peter Anvin

    Roland Dreier
     

16 Dec, 2009

1 commit

  • The instruction attribute table generator fails when run by mawk
    or original-awk:

    $ mawk -f arch/x86/tools/gen-insn-attr-x86.awk \
    arch/x86/lib/x86-opcode-map.txt > /dev/null
    Semantic error at 240: Second IMM error
    $ echo $?
    1

    Line 240 contains "c8: ENTER Iw,Ib", which indicates that this
    instruction has two immediate operands, the second of which is
    one byte. The script loops through the immediate operands using
    a for loop.

    Unfortunately, there is no guarantee in awk that a for (variable
    in array) loop will return the indices in increasing order.
    Internally, both original-awk and mawk iterate over a hash table
    for this purpose, and both implementations happen to produce the
    index 2 before 1. The supposed second immediate operand is more
    than one byte wide, producing the error.

    So loop over the indices in increasing order instead. As a
    side-effect, with mawk this means the silly two-entry hash table
    never has to be built.

    Signed-off-by: Jonathan Nieder
    Acked-by Masami Hiramatsu
    Cc: Jim Keniston
    Cc: Frederic Weisbecker
    LKML-Reference:
    Signed-off-by: Ingo Molnar

    Jonathan Nieder
     

29 Oct, 2009

2 commits

  • Add Intel AVX(Advanced Vector Extensions) instruction set
    support to x86 instruction decoder. This adds insn.vex_prefix
    field for storing VEX prefixes, and introduces some original
    tags for expressing opcodes attributes.

    Signed-off-by: Masami Hiramatsu
    Cc: Steven Rostedt
    Cc: Jim Keniston
    Cc: Ananth N Mavinakayanahalli
    Cc: Christoph Hellwig
    Cc: Frank Ch. Eigler
    Cc: Frederic Weisbecker
    Cc: Jason Baron
    Cc: K.Prasad
    Cc: Peter Zijlstra
    Cc: Srikar Dronamraju
    LKML-Reference:
    Signed-off-by: Ingo Molnar

    Masami Hiramatsu
     
  • Merge INAT_REXPFX into INAT_PFX_* macro and rename it to
    INAT_PFX_REX.

    Signed-off-by: Masami Hiramatsu
    Cc: Steven Rostedt
    Cc: Jim Keniston
    Cc: Ananth N Mavinakayanahalli
    Cc: Christoph Hellwig
    Cc: Frank Ch. Eigler
    Cc: Frederic Weisbecker
    Cc: Jason Baron
    Cc: K.Prasad
    Cc: Peter Zijlstra
    Cc: Srikar Dronamraju
    LKML-Reference:
    Signed-off-by: Ingo Molnar

    Masami Hiramatsu
     

27 Aug, 2009

2 commits

  • Check some awk mandatory features to generate inat-tables.c
    that old mawk doesn't support.

    Signed-off-by: Masami Hiramatsu
    Cc: Jim Keniston
    Cc: H. Peter Anvin
    Cc: Ananth N Mavinakayanahalli
    Cc: Avi Kivity
    Cc: Andi Kleen
    Cc: Christoph Hellwig
    Cc: Frank Ch. Eigler
    Cc: Ingo Molnar
    Cc: Jason Baron
    Cc: K.Prasad
    Cc: Lai Jiangshan
    Cc: Li Zefan
    Cc: Przemysław Pawełczyk
    Cc: Roland McGrath
    Cc: Sam Ravnborg
    Cc: Srikar Dronamraju
    Cc: Steven Rostedt
    Cc: Tom Zanussi
    Cc: Vegard Nossum
    LKML-Reference:
    Signed-off-by: Frederic Weisbecker

    Masami Hiramatsu
     
  • Add x86 instruction decoder to arch-specific libraries. This decoder
    can decode x86 instructions used in kernel into prefix, opcode, modrm,
    sib, displacement and immediates. This can also show the length of
    instructions.

    This version introduces instruction attributes for decoding
    instructions.
    The instruction attribute tables are generated from the opcode map file
    (x86-opcode-map.txt) by the generator script(gen-insn-attr-x86.awk).

    Currently, the opcode maps are based on opcode maps in Intel(R) 64 and
    IA-32 Architectures Software Developers Manual Vol.2: Appendix.A,
    and consist of below two types of opcode tables.

    1-byte/2-bytes/3-bytes opcodes, which has 256 elements, are
    written as below;

    Table: table-name
    Referrer: escaped-name
    opcode: mnemonic|GrpXXX [operand1[,operand2...]] [(extra1)[,(extra2)...] [| 2nd-mnemonic ...]
    (or)
    opcode: escape # escaped-name
    EndTable

    Group opcodes, which has 8 elements, are written as below;

    GrpTable: GrpXXX
    reg: mnemonic [operand1[,operand2...]] [(extra1)[,(extra2)...] [| 2nd-mnemonic ...]
    EndTable

    These opcode maps include a few SSE and FP opcodes (for setup), because
    those opcodes are used in the kernel.

    Signed-off-by: Masami Hiramatsu
    Signed-off-by: Jim Keniston
    Acked-by: H. Peter Anvin
    Cc: Ananth N Mavinakayanahalli
    Cc: Avi Kivity
    Cc: Andi Kleen
    Cc: Christoph Hellwig
    Cc: Frank Ch. Eigler
    Cc: Ingo Molnar
    Cc: Jason Baron
    Cc: K.Prasad
    Cc: Lai Jiangshan
    Cc: Li Zefan
    Cc: Przemysław Pawełczyk
    Cc: Roland McGrath
    Cc: Sam Ravnborg
    Cc: Srikar Dronamraju
    Cc: Steven Rostedt
    Cc: Tom Zanussi
    Cc: Vegard Nossum
    LKML-Reference:
    Signed-off-by: Frederic Weisbecker

    Masami Hiramatsu