Eric Lee / smarc-fsl-linux-kernel

09 Jan, 2012

1 commit

06 Jan, 2012

2 commits

  • 93504fce2   drm/radeon/kms: Add support for multi-ring sync in CS ioctl (v2) ... Browse Code »

    Use semaphores to sync buffers across rings in the CS
    ioctl. Add a reloc flag to allow userspace to skip
    sync for buffers.

    agd5f: port to latest CS ioctl changes.

    v2: add ring lock/unlock to make sure changes hit the ring.

    Signed-off-by: Christian König
    Signed-off-by: Alex Deucher
    Signed-off-by: Dave Airlie

    Christian König
     
  • 721604a15   drm/radeon: GPU virtual memory support v22 ... Browse Code »

    Virtual address space are per drm client (opener of /dev/drm).
    Client are in charge of virtual address space, they need to
    map bo into it by calling DRM_RADEON_GEM_VA ioctl.

    First 16M of virtual address space is reserved by the kernel.

    Once using 2 level page table we should be able to have a small
    vram memory footprint for each pt (there would be one pt for all
    gart, one for all vram and then one first level for each virtual
    address space).

    Plan include using the sub allocator for a common vm page table
    area and using memcpy to copy vm page table in & out. Or use
    a gart object and copy things in & out using dma.

    v2: agd5f fixes:
    - Add vram base offset for vram pages. The GPU physical address of a
    vram page is FB_OFFSET + page offset. FB_OFFSET is 0 on discrete
    cards and the physical bus address of the stolen memory on
    integrated chips.
    - VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR covers all vmid's >= 1

    v3: agd5f:
    - integrate with the semaphore/multi-ring stuff

    v4:
    - rebase on top ttm dma & multi-ring stuff
    - userspace is now in charge of the address space
    - no more specific cs vm ioctl, instead cs ioctl has a new
    chunk

    v5:
    - properly handle mem == NULL case from move_notify callback
    - fix the vm cleanup path

    v6:
    - fix update of page table to only happen on valid mem placement

    v7:
    - add tlb flush for each vm context
    - add flags to define mapping property (readable, writeable, snooped)
    - make ring id implicit from ib->fence->ring, up to each asic callback
    to then do ring specific scheduling if vm ib scheduling function

    v8:
    - add query for ib limit and kernel reserved virtual space
    - rename vm->size to max_pfn (maximum number of page)
    - update gem_va ioctl to also allow unmap operation
    - bump kernel version to allow userspace to query for vm support

    v9:
    - rebuild page table only when bind and incrementaly depending
    on bo referenced by cs and that have been moved
    - allow virtual address space to grow
    - use sa allocator for vram page table
    - return invalid when querying vm limit on non cayman GPU
    - dump vm fault register on lockup

    v10: agd5f:
    - Move the vm schedule_ib callback to a standalone function, remove
    the callback and use the existing ib_execute callback for VM IBs.

    v11:
    - rebase on top of lastest Linus

    v12: agd5f:
    - remove spurious backslash
    - set IB vm_id to 0 in radeon_ib_get()

    v13: agd5f:
    - fix handling of RADEON_CHUNK_ID_FLAGS

    v14:
    - fix va destruction
    - fix suspend resume
    - forbid bo to have several different va in same vm

    v15:
    - rebase

    v16:
    - cleanup left over of vm init/fini

    v17: agd5f:
    - cs checker

    v18: agd5f:
    - reworks the CS ioctl to better support multiple rings and
    VM. Rather than adding a new chunk id for VM, just re-use the
    IB chunk id and add a new flags for VM mode. Also define additional
    dwords for the flags chunk id to define the what ring we want to use
    (gfx, compute, uvd, etc.) and the priority.

    v19:
    - fix cs fini in weird case of no ib
    - semi working flush fix for ni
    - rebase on top of sa allocator changes

    v20: agd5f:
    - further CS ioctl cleanups from Christian's comments

    v21: agd5f:
    - integrate CS checker improvements

    v22: agd5f:
    - final cleanups for release, only allow VM CS on cayman

    Signed-off-by: Jerome Glisse
    Signed-off-by: Alex Deucher
    Signed-off-by: Dave Airlie

    Jerome Glisse
     

20 Nov, 2011

1 commit

  • e70f224c1   drm/radeon/kms: add a CS ioctl flag not to rewrite tiling flags in the CS ... Browse Code »

    This adds a new optional chunk to the CS ioctl that specifies optional flags
    to the CS parser. Why this is useful is explained below. Note that some regs
    no longer need the NOP relocation packet if this feature is enabled.
    Tested on r300g and r600g with this flag disabled and enabled.

    Assume there are two contexts sharing the same mipmapped tiled texture.
    One context wants to render into the first mipmap and the other one
    wants to render into the last mipmap. As you probably know, the hardware
    has a MACRO_SWITCH feature, which turns off macro tiling for small mipmaps,
    but that only applies to samplers.
    (at least on r300-r500, though later hardware likely behaves the same)

    So we want to just re-set the tiling flags before rendering (writing
    packets), right? ... No. The contexts run in parallel, so they may
    set the tiling flags simultaneously and then fire their command streams
    also simultaneously. The last one setting the flags wins, the other one
    loses.

    Another problem is when one context wants to render into the first and
    the last mipmap in one CS. Impossible. It must flush before changing
    tiling flags and do the rendering into the smaller mipmaps in another CS.

    Yet another problem is that writing copy_blit in userspace would be a mess
    involving re-setting tiling flags to please the kernel, and causing races
    with other contexts at the same time.

    The only way out of this is to send tiling flags with each CS, ideally
    with each relocation. But we already do that through the registers.
    So let's just use what we have in the registers.

    Signed-off-by: Marek Olšák
    Signed-off-by: Dave Airlie

    Marek Olšák
     

18 Jul, 2011

1 commit

04 May, 2011

1 commit

27 Apr, 2011

1 commit

31 Mar, 2011

1 commit

01 Mar, 2011

1 commit

25 Jan, 2011

1 commit

06 Jan, 2011

1 commit

17 Aug, 2010

1 commit

  • 1b2f14896   drm: block userspace under allocating buffer and having drivers overwrite it (v2) ... Browse Code »

    With the current screwed but its ABI, ioctls for the drm, Linus pointed out that we could allow userspace to specify the allocation size, but we pass it to the driver which then uses it blindly to store a struct. Now if userspace specifies the allocation size as smaller than the driver needs, the driver can possibly overwrite memory.

    This patch restructures the driver ioctls so we store the structure size we are expecting, and make sure we allocate at least that size. The copy from/to userspace are still restricted to the size the user specifies, this allows ioctl structs to grow on both sides of the equation.

    Up until now we didn't really use the DRM_IOCTL defines in the kernel, so this cleans them up and adds them for nouveau.

    v2:
    fix nouveau pushbuf arg (thanks to Ben for pointing it out)

    Reported-by: Linus Torvalds
    Signed-off-by: Dave Airlie

    Dave Airlie
     

02 Aug, 2010

2 commits

  • ab9e1f596   drm/radeon: add basic zmask/hiz support (v4) ... Browse Code »

    This interface allows userspace to request hyperz support, it probably
    needs more locking, and really reporting that you can have hyperz is racy
    since someone else might get it before you do.

    v2: modify so we pass 0 valued packets to let DDX/r300c keep working.
    also fixed incorrect 0x4f1c reference.

    v3: fixup zb_bw_cntl so older drivers keep working

    v4: add locking, fixup SC_HYPERZ_EN - patch stream to disable hiz

    Signed-off-by: Dave Airlie

    Dave Airlie
     
  • e7aeeba6a   drm/radeon/kms/r6xx+: add query for tile config (v2) ... Browse Code »

    Userspace needs this information to access tiled
    buffers via the CPU.

    v2: rebased on evergreen accel changes

    Signed-off-by: Alex Deucher
    Signed-off-by: Dave Airlie

    Alex Deucher
     

08 Jun, 2010

1 commit

  • 148a03bc0   drm/radeon/kms/evergreen: set accel_enabled ... Browse Code »

    This is needed to enable accel in the ddx. However,
    due to a bug in older versions of the ddx, it relies
    on accel being disabled in order to load properly on
    evergreen chips. To maintain compatility, we add a new
    get accel param and call that from the ddx. The old one
    always returns false for evergreen cards.

    [this fixes a regression with older userspaces on newer kernels].

    Signed-off-by: Alex Deucher
    Signed-off-by: Dave Airlie

    Alex Deucher
     

18 May, 2010

1 commit

25 Feb, 2010

1 commit

04 Dec, 2009

1 commit

18 Sep, 2009

2 commits

21 Aug, 2009

2 commits

17 Aug, 2009

1 commit

29 Jul, 2009

1 commit

  • e024e1107   drm/radeon/kms: add initial colortiling support. ... Browse Code »

    This adds new set/get tiling interfaces where the pitch
    and macro/micro tiling enables can be set. Along with
    a flag to decide if this object should have a surface when mapped.

    The only thing we need to allocate with a mapped surface should be
    the frontbuffer. Note rotate scanout shouldn't require one, and
    back/depth shouldn't either, though mesa needs some fixes.

    It fixes the TTM interfaces along Thomas's suggestions, and I've tested
    the surface stealing code with two X servers and not seen any lockdep issues.

    I've stopped tiling the fbcon frontbuffer, as I don't see there being
    any advantage other than testing, I've left the testing commands in there,
    just flip the fb_tiled to true in radeon_fb.c

    Open: Can we integrate endian swapping in with this?

    Future features:
    texture tiling - need to relocate texture registers TXOFFSET* with tiling info.

    This also merges Michel's cleanup surfaces regs at init time patch
    even though it makes sense on its own, this patch really relies on it.

    Some PowerMac firmwares set up a tiling surface at the beginning of VRAM
    which messes us up otherwise.
    that patch is:
    Signed-off-by: Michel Dänzer

    Signed-off-by: Dave Airlie

    Dave Airlie
     

15 Jun, 2009

1 commit

  • 771fe6b91   drm/radeon: introduce kernel modesetting for radeon hardware ... Browse Code »

    Add kernel modesetting support to radeon driver, use the ttm memory
    manager to manage memory and DRM/GEM to provide userspace API.
    In order to avoid backward compatibility issue and to allow clean
    design and code the radeon kernel modesetting use different code path
    than old radeon/drm driver.

    When kernel modesetting is enabled the IOCTL of radeon/drm
    driver are considered as invalid and an error message is printed
    in the log and they return failure.

    KMS enabled userspace will use new API to talk with the radeon/drm
    driver. The new API provide functions to create/destroy/share/mmap
    buffer object which are then managed by the kernel memory manager
    (here TTM). In order to submit command to the GPU the userspace
    provide a buffer holding the command stream, along this buffer
    userspace have to provide a list of buffer object used by the
    command stream. The kernel radeon driver will then place buffer
    in GPU accessible memory and will update command stream to reflect
    the position of the different buffers.

    The kernel will also perform security check on command stream
    provided by the user, we want to catch and forbid any illegal use
    of the GPU such as DMA into random system memory or into memory
    not owned by the process supplying the command stream. This part
    of the code is still incomplete and this why we propose that patch
    as a staging driver addition, future security might forbid current
    experimental userspace to run.

    This code support the following hardware : R1XX,R2XX,R3XX,R4XX,R5XX
    (radeon up to X1950). Works is underway to provide support for R6XX,
    R7XX and newer hardware (radeon from HD2XXX to HD4XXX).

    Authors:
    Jerome Glisse
    Dave Airlie
    Alex Deucher

    Signed-off-by: Jerome Glisse
    Signed-off-by: Dave Airlie
    Signed-off-by: Alex Deucher
    Signed-off-by: Dave Airlie

    Jerome Glisse
     

29 Mar, 2009

1 commit

27 Mar, 2009

1 commit

  • 1d7f83d5a   make drm headers use strict integer types ... Browse Code »

    The drm headers are traditionally shared with BSD and
    could not use the strict linux integer types. This is
    over now, so we can use our own types now.

    Cc: David Airlie
    Signed-off-by: Arnd Bergmann
    Signed-off-by: H. Peter Anvin
    Signed-off-by: Ingo Molnar

    Arnd Bergmann
     

13 Mar, 2009

1 commit

14 Jul, 2008

1 commit

  • c0e09200d   drm: reorganise drm tree to be more future proof. ... Browse Code »

    With the coming of kernel based modesetting and the memory manager stuff,
    the everything in one directory approach was getting very ugly and
    starting to be unmanageable.

    This restructures the drm along the lines of other kernel components.

    It creates a drivers/gpu/drm directory and moves the hw drivers into
    subdirectores. It moves the includes into an include/drm, and
    sets up the unifdef for the userspace headers we should be exporting.

    Signed-off-by: Dave Airlie

    Dave Airlie