13 Sep, 2016
1 commit
-
Squash a bunch of sparse warnings by making things static.
Reviewed-by: Andrew Donnellan
Signed-off-by: Daniel Axtens
Signed-off-by: Michael Ellerman
10 Mar, 2016
1 commit
-
We used the PME_ prefix earlier to avoid some macro/variable name
collisions. We have since changed the way we define/use the event
macros so we no longer need the prefix.By dropping the prefix, we keep the the event macros consistent with
their official names.Reported-by: Michael Ellerman
Signed-off-by: Sukadev Bhattiprolu
Signed-off-by: Michael Ellerman
28 Jul, 2014
1 commit
-
To support per-event exclude settings on Power8 we need access to the
struct perf_events in compute_mmcr().Signed-off-by: Michael Ellerman
Signed-off-by: Benjamin Herrenschmidt
13 Jul, 2013
1 commit
-
Power7 supports over 530 different perf events but only a small subset
of these can be specified by name, for the remaining events, we must
specify them by their raw code:perf stat -e r2003c
This patch makes all the POWER7 events available in sysfs. So we can
instead specify these as:perf stat -e 'cpu/PM_CMPLU_STALL_DFU/'
where PM_CMPLU_STALL_DFU is the r2003c in previous example.
Before this patch is applied, the size of power7-pmu.o is:
$ size arch/powerpc/perf/power7-pmu.o
text data bss dec hex filename
3073 2720 0 5793 16a1 arch/powerpc/perf/power7-pmu.oand after the patch is applied, it is:
$ size arch/powerpc/perf/power7-pmu.o
text data bss dec hex filename
15950 31112 0 47062 b7d6 arch/powerpc/perf/power7-pmu.oFor the run time overhead, I use two scripts, one is "event_name.sh",
which contains 50 event names, it looks like:# ./perf record -e 'cpu/PM_CMPLU_STALL_DFU/' -e ..... /bin/sleep 1
the other one is named "event_code.sh" which use corresponding events
raw
code instead of events names, it looks like:# ./perf record -e r2003c -e ...... /bin/sleep 1
below is the result.
Using events name:
[root@localhost perf]# time ./event_name.sh
[ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 0.002 MB perf.data (~102 samples) ]real 0m1.192s
user 0m0.028s
sys 0m0.106sUsing events raw code:
[root@localhost perf]# time ./event_code.sh
[ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 0.003 MB perf.data (~112 samples) ]real 0m1.198s
user 0m0.028s
sys 0m0.105sSigned-off-by: Runzhen Wang
Acked-by: Michael Ellerman
Cc: icycoder@gmail.com
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Michael Ellerman
Cc: Paul Mackerras
Cc: Runzhen Wang
Cc: Sukadev Bhattiprolu
Cc: Xiao Guangrong
Link: http://lkml.kernel.org/r/1372407297-6996-3-git-send-email-runzhen@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo
09 Jul, 2013
1 commit
-
In the Power7 PMU guide:
https://www.power.org/documentation/commonly-used-metrics-for-performance-analysis/
PM_BRU_MPRED is referred to as PM_BR_MPRED.It fixed the typo by changing the name of the event in kernel and
documentation accordingly.This patch changes the ABI, there are some reasons I think it's ok:
- It is relatively new interface, specific to the Power7 platform.
- No tools that we know of actually use this interface at this point
(none are listed near the interface).- Users of this interface (eg oprofile users migrating to perf)
would be more used to the "PM_BR_MPRED" rather than "PM_BRU_MPRED".- These are in the ABI/testing at this point rather than ABI/stable,
so hoping we have some wiggle room.Signed-off-by: Runzhen Wang
Acked-by: Michael Ellerman
Cc: icycoder@gmail.com
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Michael Ellerman
Cc: Paul Mackerras
Cc: Runzhen Wang
Cc: Sukadev Bhattiprolu
Cc: Xiao Guangrong
Link: http://lkml.kernel.org/r/1372407297-6996-2-git-send-email-runzhen@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo
29 May, 2013
1 commit
-
A set of Power7 events are often used for Cycles Per Instruction (CPI) stack
analysis. Make these events available in sysfs (/sys/devices/cpu/events/) so
they can be identified using their symbolic names:perf stat -e 'cpu/PM_CMPLU_STALL_DCACHE_MISS/' /bin/ls
Signed-off-by: Sukadev Bhattiprolu
Acked-by: Paul Mackerras
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: linuxppc-dev@ozlabs.org
Link: http://lkml.kernel.org/r/20130406164803.GA408@us.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo
14 Mar, 2013
1 commit
-
Create a sysfs entry, '/sys/bus/event_source/devices/cpu/format/event'
which describes the format of the POWER7 PMU events.This code is based on corresponding code in x86.
Changelog[v4]: [Michael Ellerman, Paul Mckerras] The event format is different
for other POWER cpus. So move the code to POWER7-specific,
power7-pmu.c Also, the POWER7 format uses bits 0-19 not 0-20.Changelog[v2]: [Jiri Osla] Use PMU_FORMAT_ATTR rather than duplicating code.
Signed-off-by: Sukadev Bhattiprolu
Acked-by: Paul Mackerras
Tested-by: Michael Ellerman
Cc: Andi Kleen
Cc: Anton Blanchard
Cc: Ingo Molnar
Cc: Jiri Olsa
Cc: Michael Ellerman
Cc: Paul Mackerras
Cc: Peter Zijlstra
Cc: Robert Richter
Cc: Stephane Eranian
Cc: benh@kernel.crashing.org
Cc: linuxppc-dev@ozlabs.org
Link: http://lkml.kernel.org/r/20130306054826.GA14627@us.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo
01 Feb, 2013
3 commits
-
Make some POWER7-specific perf events available in sysfs.
$ /bin/ls -1 /sys/bus/event_source/devices/cpu/events/
branch-instructions
branch-misses
cache-misses
cache-references
cpu-cycles
instructions
PM_BRU_FIN
PM_BRU_MPRED
PM_CMPLU_STALL
PM_CYC
PM_GCT_NOSLOT_CYC
PM_INST_CMPL
PM_LD_MISS_L1
PM_LD_REF_L1
stalled-cycles-backend
stalled-cycles-frontendwhere the 'PM_*' events are POWER specific and the others are the
generic events.This will enable users to specify these events with their symbolic
names rather than with their raw code.perf stat -e 'cpu/PM_CYC' ...
Signed-off-by: Sukadev Bhattiprolu
Cc: Andi Kleen
Cc: Anton Blanchard
Cc: Ingo Molnar
Cc: Jiri Olsa
Cc: Paul Mackerras
Cc: Peter Zijlstra
Cc: Robert Richter
Cc: Stephane Eranian
Cc: linuxppc-dev@ozlabs.org
Link: http://lkml.kernel.org/r/20130123062528.GE13720@us.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo -
Make the generic perf events in POWER7 available via sysfs.
$ ls /sys/bus/event_source/devices/cpu/events
branch-instructions
branch-misses
cache-misses
cache-references
cpu-cycles
instructions
stalled-cycles-backend
stalled-cycles-frontend$ cat /sys/bus/event_source/devices/cpu/events/cache-misses
event=0x400f0This patch is based on commits that implement this functionality on x86.
Eg:
commit a47473939db20e3961b200eb00acf5fcf084d755
Author: Jiri Olsa
Date: Wed Oct 10 14:53:11 2012 +0200perf/x86: Make hardware event translations available in sysfs
Changelog:[v2]
[Jiri Osla] Drop EVENT_ID() macro since it is only used once.Signed-off-by: Sukadev Bhattiprolu
Cc: Andi Kleen
Cc: Anton Blanchard
Cc: Ingo Molnar
Cc: Jiri Olsa
Cc: Paul Mackerras
Cc: Peter Zijlstra
Cc: Robert Richter
Cc: Stephane Eranian
Cc: linuxppc-dev@ozlabs.org
Link: http://lkml.kernel.org/r/20130123062454.GD13720@us.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo -
Define and use macros to identify perf events codes This would make it
easier and more readable when these event codes need to be used in more
than one place.Signed-off-by: Sukadev Bhattiprolu
Acked-by: Jiri Olsa
Cc: Andi Kleen
Cc: Anton Blanchard
Cc: Ingo Molnar
Cc: Jiri Olsa
Cc: Paul Mackerras
Cc: Peter Zijlstra
Cc: Robert Richter
Cc: Stephane Eranian
Cc: linuxppc-dev@ozlabs.org
Link: http://lkml.kernel.org/r/20130123062353.GB13720@us.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo
15 Nov, 2012
1 commit
-
If we have two cache events that require different settings of the L2SEL
bits in MMCR1 then we can not schedule those events simultaneously. Add
logic to the constraint handling to express that.Signed-off-by: Michael Ellerman
Acked-by: Paul Mackerras
Signed-off-by: Benjamin Herrenschmidt
27 Sep, 2012
1 commit
-
powerpc/perf: Sample only if SIAR-Valid bit is set in P7+
On POWER7+ two new bits (mmcra[35] and mmcra[36]) indicate whether the
contents of SIAR and SDAR are valid.For marked instructions on P7+, we must save the contents of SIAR and
SDAR registers only if these new bits are set.This code/check for the SIAR-Valid bit is specific to P7+, so rather than
waste a CPU-feature bit use the PVR flag.Note that Carl Love proposed a similar change for oprofile:
https://lkml.org/lkml/2012/6/22/309
Signed-off-by: Sukadev Bhattiprolu
Signed-off-by: Benjamin Herrenschmidt
23 Feb, 2012
1 commit
-
The perf code has grown a lot since it started, and is big enough to
warrant its own subdirectory. For reference it's ~60% bigger than the
oprofile code. It declutters the kernel directory, makes it simpler to
grep for "just perf stuff", and allows us to shorten some filenames.While we're at it, make it more obvious that we have two implementations
of the core perf logic. One for (roughly) Book3S CPUs, which was the
original implementation, and the other for Freescale embedded CPUs.Signed-off-by: Michael Ellerman
Signed-off-by: Benjamin Herrenschmidt