Eric Lee / smarc-fsl-linux-kernel

24 Jan, 2011

1 commit

24 Dec, 2010

1 commit

12 Aug, 2010

1 commit

  • cba86f2e2   phylib: available for any speed ethernet ... Browse Code »

    Several gigabit network drivers (SB1250_MAC, TIGON3, FSL, GIANFAR,
    UCC_GETH, MV643XX_ETH, XILINX_LL_TEMAC, S6GMAC, STMMAC_ETH, PASEMI_MAC,
    and OCTEON_ETHERNET) select PHYLIB. These drivers are not under
    NET_ETHERNET (10/100 mbit), so this warning is generated (long, irrelevant
    parts are omitted):

    warning: (NET_DSA && NET && EXPERIMENTAL && NET_ETHERNET && !S390 || ... || SB1250_MAC && NETDEVICES && NETDEV_1000 && SIBYTE_SB1xxx_SOC || TIGON3 && NETDEVICES && NETDEV_1000 && PCI || FSL_PQ_MDIO && NETDEVICES && NETDEV_1000 && FSL_SOC || GIANFAR && NETDEVICES && NETDEV_1000 && FSL_SOC || UCC_GETH && NETDEVICES && NETDEV_1000 && QUICC_ENGINE || MV643XX_ETH && NETDEVICES && NETDEV_1000 && (MV64X60 || PPC32 || PLAT_ORION) || XILINX_LL_TEMAC && NETDEVICES && NETDEV_1000 && (PPC || MICROBLAZE) || S6GMAC && NETDEVICES && NETDEV_1000 && XTENSA_VARIANT_S6000 || STMMAC_ETH && NETDEV_1000 && NETDEVICES && CPU_SUBTYPE_ST40 || PASEMI_MAC && NETDEVICES && NETDEV_10000 && PPC_PASEMI && PCI || OCTEON_ETHERNET && STAGING && !STAGING_EXCLUDE_BUILD && CPU_CAVIUM_OCTEON) selects PHYLIB which has unmet direct dependencies (!S390 && NET_ETHERNET)

    PHYLIB is used by non-10/100 mbit ethernet drivers, so change the dependencies
    to be NETDEVICES instead of NET_ETHERNET.

    Signed-off-by: Randy Dunlap
    Signed-off-by: David S. Miller

    Randy Dunlap
     

21 Jul, 2010

1 commit

19 Jul, 2010

1 commit

  • 28b041139   net: preserve ifreq parameter when calling generic phy_mii_ioctl(). ... Browse Code »

    The phy_mii_ioctl() function unnecessarily throws away the original ifreq.
    We need access to the ifreq in order to support PHYs that can perform
    hardware time stamping.

    Two maverick drivers filter the ioctl commands passed to phy_mii_ioctl().
    This is unnecessary since phylib will check the command in any case.

    Signed-off-by: Richard Cochran
    Signed-off-by: David S. Miller

    Richard Cochran
     

13 Jul, 2010

1 commit

12 Apr, 2010

1 commit

04 Apr, 2010

1 commit

30 Mar, 2010

1 commit

  • 5a0e3ad6a   include cleanup: Update gfp.h and slab.h includes to prepare for breaking implic… ... Browse Code »

    …it slab.h inclusion from percpu.h

    percpu.h is included by sched.h and module.h and thus ends up being
    included when building most .c files. percpu.h includes slab.h which
    in turn includes gfp.h making everything defined by the two files
    universally available and complicating inclusion dependencies.

    percpu.h -> slab.h dependency is about to be removed. Prepare for
    this change by updating users of gfp and slab facilities include those
    headers directly instead of assuming availability. As this conversion
    needs to touch large number of source files, the following script is
    used as the basis of conversion.

    http://userweb.kernel.org/~tj/misc/slabh-sweep.py

    The script does the followings.

    * Scan files for gfp and slab usages and update includes such that
    only the necessary includes are there. ie. if only gfp is used,
    gfp.h, if slab is used, slab.h.

    * When the script inserts a new include, it looks at the include
    blocks and try to put the new include such that its order conforms
    to its surrounding. It's put in the include block which contains
    core kernel includes, in the same order that the rest are ordered -
    alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
    doesn't seem to be any matching order.

    * If the script can't find a place to put a new include (mostly
    because the file doesn't have fitting include block), it prints out
    an error message indicating which .h file needs to be added to the
    file.

    The conversion was done in the following steps.

    1. The initial automatic conversion of all .c files updated slightly
    over 4000 files, deleting around 700 includes and adding ~480 gfp.h
    and ~3000 slab.h inclusions. The script emitted errors for ~400
    files.

    2. Each error was manually checked. Some didn't need the inclusion,
    some needed manual addition while adding it to implementation .h or
    embedding .c file was more appropriate for others. This step added
    inclusions to around 150 files.

    3. The script was run again and the output was compared to the edits
    from #2 to make sure no file was left behind.

    4. Several build tests were done and a couple of problems were fixed.
    e.g. lib/decompress_*.c used malloc/free() wrappers around slab
    APIs requiring slab.h to be added manually.

    5. The script was run on all .h files but without automatically
    editing them as sprinkling gfp.h and slab.h inclusions around .h
    files could easily lead to inclusion dependency hell. Most gfp.h
    inclusion directives were ignored as stuff from gfp.h was usually
    wildly available and often used in preprocessor macros. Each
    slab.h inclusion directive was examined and added manually as
    necessary.

    6. percpu.h was updated not to include slab.h.

    7. Build test were done on the following configurations and failures
    were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
    distributed build env didn't work with gcov compiles) and a few
    more options had to be turned off depending on archs to make things
    build (like ipr on powerpc/64 which failed due to missing writeq).

    * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
    * powerpc and powerpc64 SMP allmodconfig
    * sparc and sparc64 SMP allmodconfig
    * ia64 SMP allmodconfig
    * s390 SMP allmodconfig
    * alpha SMP allmodconfig
    * um on x86_64 SMP allmodconfig

    8. percpu.h modifications were reverted so that it could be applied as
    a separate patch and serve as bisection point.

    Given the fact that I had only a couple of failures from tests on step
    6, I'm fairly confident about the coverage of this conversion patch.
    If there is a breakage, it's likely to be something in one of the arch
    headers which should be easily discoverable easily on most builds of
    the specific arch.

    Signed-off-by: Tejun Heo <tj@kernel.org>
    Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
    Cc: Ingo Molnar <mingo@redhat.com>
    Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>

    Tejun Heo
     

01 Sep, 2009

1 commit

06 Jul, 2009

1 commit

  • 1ded3f59f   dsa: fix 88e6xxx statistics counter snapshotting ... Browse Code »

    The bit that tells us whether a statistics counter snapshot operation
    has completed is located in the GLOBAL register block, not in the
    GLOBAL2 register block, so fix up mv88e6xxx_stats_wait() to poll the
    right register address.

    Signed-off-by: Stephane Contri
    Signed-off-by: Lennert Buytenhek
    Cc: stable@kernel.org
    Signed-off-by: David S. Miller

    Stephane Contri
     

30 May, 2009

1 commit

  • ccffad25b   net: convert unicast addr list ... Browse Code »

    This patch converts unicast address list to standard list_head using
    previously introduced struct netdev_hw_addr. It also relaxes the
    locking. Original spinlock (still used for multicast addresses) is not
    needed and is no longer used for a protection of this list. All
    reading and writing takes place under rtnl (with no changes).

    I also removed a possibility to specify the length of the address
    while adding or deleting unicast address. It's always dev->addr_len.

    The convertion touched especially e1000 and ixgbe codes when the
    change is not so trivial.

    Signed-off-by: Jiri Pirko

    drivers/net/bnx2.c | 13 +--
    drivers/net/e1000/e1000_main.c | 24 +++--
    drivers/net/ixgbe/ixgbe_common.c | 14 ++--
    drivers/net/ixgbe/ixgbe_common.h | 4 +-
    drivers/net/ixgbe/ixgbe_main.c | 6 +-
    drivers/net/ixgbe/ixgbe_type.h | 4 +-
    drivers/net/macvlan.c | 11 +-
    drivers/net/mv643xx_eth.c | 11 +-
    drivers/net/niu.c | 7 +-
    drivers/net/virtio_net.c | 7 +-
    drivers/s390/net/qeth_l2_main.c | 6 +-
    drivers/scsi/fcoe/fcoe.c | 16 ++--
    include/linux/netdevice.h | 18 ++--
    net/8021q/vlan.c | 4 +-
    net/8021q/vlan_dev.c | 10 +-
    net/core/dev.c | 195 +++++++++++++++++++++++++++-----------
    net/dsa/slave.c | 10 +-
    net/packet/af_packet.c | 4 +-
    18 files changed, 227 insertions(+), 137 deletions(-)
    Signed-off-by: David S. Miller

    Jiri Pirko
     

22 Mar, 2009

3 commits

  • e84665c9c   dsa: add switch chip cascading support ... Browse Code »

    The initial version of the DSA driver only supported a single switch
    chip per network interface, while DSA-capable switch chips can be
    interconnected to form a tree of switch chips. This patch adds support
    for multiple switch chips on a network interface.

    An example topology for a 16-port device with an embedded CPU is as
    follows:

    +-----+ +--------+ +--------+
    | |eth0 10| switch |9 10| switch |
    | CPU +----------+ +-------+ |
    | | | chip 0 | | chip 1 |
    +-----+ +---++---+ +---++---+
    || ||
    || ||
    ||1000baseT ||1000baseT
    ||ports 1-8 ||ports 9-16

    This requires a couple of interdependent changes in the DSA layer:

    - The dsa platform driver data needs to be extended: there is still
    only one netdevice per DSA driver instance (eth0 in the example
    above), but each of the switch chips in the tree needs its own
    mii_bus device pointer, MII management bus address, and port name
    array. (include/net/dsa.h) The existing in-tree dsa users need
    some small changes to deal with this. (arch/arm)

    - The DSA and Ethertype DSA tagging modules need to be extended to
    use the DSA device ID field on receive and demultiplex the packet
    accordingly, and fill in the DSA device ID field on transmit
    according to which switch chip the packet is heading to.
    (net/dsa/tag_{dsa,edsa}.c)

    - The concept of "CPU port", which is the switch chip port that the
    CPU is connected to (port 10 on switch chip 0 in the example), needs
    to be extended with the concept of "upstream port", which is the
    port on the switch chip that will bring us one hop closer to the CPU
    (port 10 for both switch chips in the example above).

    - The dsa platform data needs to specify which ports on which switch
    chips are links to other switch chips, so that we can enable DSA
    tagging mode on them. (For inter-switch links, we always use
    non-EtherType DSA tagging, since it has lower overhead. The CPU
    link uses dsa or edsa tagging depending on what the 'root' switch
    chip supports.) This is done by specifying "dsa" for the given
    port in the port array.

    - The dsa platform data needs to be extended with information on via
    which port to reach any given switch chip from any given switch chip.
    This info is specified via the per-switch chip data struct ->rtable[]
    array, which gives the nexthop ports for each of the other switches
    in the tree.

    For the example topology above, the dsa platform data would look
    something like this:

    static struct dsa_chip_data sw[2] = {
    {
    .mii_bus = &foo,
    .sw_addr = 1,
    .port_names[0] = "p1",
    .port_names[1] = "p2",
    .port_names[2] = "p3",
    .port_names[3] = "p4",
    .port_names[4] = "p5",
    .port_names[5] = "p6",
    .port_names[6] = "p7",
    .port_names[7] = "p8",
    .port_names[9] = "dsa",
    .port_names[10] = "cpu",
    .rtable = (s8 []){ -1, 9, },
    }, {
    .mii_bus = &foo,
    .sw_addr = 2,
    .port_names[0] = "p9",
    .port_names[1] = "p10",
    .port_names[2] = "p11",
    .port_names[3] = "p12",
    .port_names[4] = "p13",
    .port_names[5] = "p14",
    .port_names[6] = "p15",
    .port_names[7] = "p16",
    .port_names[10] = "dsa",
    .rtable = (s8 []){ 10, -1, },
    },
    },

    static struct dsa_platform_data pd = {
    .netdev = &foo,
    .nr_switches = 2,
    .sw = sw,
    };

    Signed-off-by: Lennert Buytenhek
    Tested-by: Gary Thomas
    Signed-off-by: David S. Miller

    Lennert Buytenhek
     
  • 076d3e10a   dsa: add support for the Marvell 88E6095/6095F switch chips ... Browse Code »

    Add support for the Marvell 88E6095/6095F switch chips. These
    chips are similar to the 88e6131, so we can add the support to
    mv88e6131.c easily.

    Thanks to Gary Thomas and Jesper Dangaard
    Brouer for testing various patches.

    Signed-off-by: Lennert Buytenhek
    Tested-by: Gary Thomas
    Signed-off-by: David S. Miller

    Lennert Buytenhek
     
  • c08408015   dsa: set ->iflink on slave interfaces to the ifindex of the parent ... Browse Code »

    ..so that we can parse the DSA topology from 'ip link' output:

    1: lo: mtu 16436 qdisc noqueue
    2: eth0: mtu 1500 qdisc pfifo_fast qlen 1000
    3: eth1: mtu 1500 qdisc pfifo_fast qlen 1000
    4: lan1@eth0: mtu 1500 qdisc noqueue
    5: lan2@eth0: mtu 1500 qdisc noqueue
    6: lan3@eth0: mtu 1500 qdisc noqueue
    7: lan4@eth0: mtu 1500 qdisc noqueue

    Signed-off-by: Lennert Buytenhek
    Signed-off-by: David S. Miller

    Lennert Buytenhek
     

10 Mar, 2009

1 commit

01 Feb, 2009

1 commit

07 Jan, 2009

1 commit

11 Dec, 2008

1 commit

26 Nov, 2008

2 commits

  • d3f644da9   dsa: fix warning in net/dsa/mv88e6060.c ... Browse Code »

    this warning:

    net/dsa/mv88e6060.c: In function ‘mv88e6060_poll_link’:
    net/dsa/mv88e6060.c:225: warning: ‘port_status’ may be used uninitialized in this function

    triggers because GCC does not recognize the (correct) error flow
    between 'link' and 'port_status'.

    Annotate it.

    Signed-off-by: Ingo Molnar
    Signed-off-by: David S. Miller

    Ingo Molnar
     
  • 2a9e79782   dsa: fix warning in net/dsa/mv88e6xxx.c ... Browse Code »

    this warning:

    net/dsa/mv88e6xxx.c: In function ‘mv88e6xxx_poll_link’:
    net/dsa/mv88e6xxx.c:361: warning: ‘port_status’ may be used uninitialized in this function

    triggers because GCC does not recognize the (correct) error flow
    between 'link' and 'port_status'.

    Annotate it.

    Signed-off-by: Ingo Molnar
    Signed-off-by: David S. Miller

    Ingo Molnar
     

12 Nov, 2008

1 commit

11 Nov, 2008

3 commits

  • df02c6ff2   dsa: fix master interface allmulti/promisc handling ... Browse Code »

    Before commit b6c40d68ff6498b7f63ddf97cf0aa818d748dee7 ("net: only
    invoke dev->change_rx_flags when device is UP"), the dsa driver could
    sort-of get away with only fiddling with the master interface's
    allmulti/promisc counts in ->change_rx_flags() and not touching them
    in ->open() or ->stop(). After this commit (note that it was merged
    almost simultaneously with the dsa patches, which is why this wasn't
    caught initially), the breakage that was already there became more
    apparent.

    Since it makes no sense to keep the master interface's allmulti or
    promisc count pinned for a slave interface that is down, copy the vlan
    driver's sync logic (which does exactly what we want) over to dsa to
    fix this.

    Bug report from Dirk Teurlings and Peter van Valderen
    .

    Signed-off-by: Lennert Buytenhek
    Tested-by: Dirk Teurlings
    Tested-by: Peter van Valderen
    Signed-off-by: David S. Miller

    Lennert Buytenhek
     
  • 14ee6742b   dsa: fix skb->pkt_type when mac address of slave interface differs ... Browse Code »

    When a dsa slave interface has a mac address that differs from that
    of the master interface, eth_type_trans() won't explicitly set
    skb->pkt_type back to PACKET_HOST -- we need to do this ourselves
    before calling eth_type_trans().

    Signed-off-by: Lennert Buytenhek
    Signed-off-by: David S. Miller

    Lennert Buytenhek
     
  • fb28ad359   net: struct device - replace bus_id with dev_name(), dev_set_name() ... Browse Code »

    Acked-by: Marcel Holtmann
    Acked-by: Greg Kroah-Hartman
    Signed-off-by: Kay Sievers
    Signed-off-by: David S. Miller

    Kay Sievers
     

04 Nov, 2008

1 commit

14 Oct, 2008

1 commit

  • 510149e31   dsa: fix compile bug on s390 ... Browse Code »

    git commit 45cec1bac0719c904bb5f4405c2937f7e715888c
    "dsa: Need to select PHYLIB." causes this build bug on s390:

    drivers/built-in.o: In function `phy_stop_interrupts':
    /home/heicarst/linux-2.6/drivers/net/phy/phy.c:631: undefined reference to `free_irq'
    /home/heicarst/linux-2.6/drivers/net/phy/phy.c:646: undefined reference to `enable_irq'
    drivers/built-in.o: In function `phy_start_interrupts':
    /home/heicarst/linux-2.6/drivers/net/phy/phy.c:601: undefined reference to `request_irq'
    drivers/built-in.o: In function `phy_interrupt':
    /home/heicarst/linux-2.6/drivers/net/phy/phy.c:528: undefined reference to `disable_irq_nosync'
    drivers/built-in.o: In function `phy_change':
    /home/heicarst/linux-2.6/drivers/net/phy/phy.c:674: undefined reference to `enable_irq'
    /home/heicarst/linux-2.6/drivers/net/phy/phy.c:692: undefined reference to `disable_irq'

    PHYLIB has alread a depend on !S390, however select PHYLIB at DSA overrides
    that unfortunately. So add a depend on !S390 to DSA as well.

    Signed-off-by: Heiko Carstens
    Signed-off-by: David S. Miller

    Heiko Carstens
     

09 Oct, 2008

6 commits

  • 45cec1bac   dsa: Need to select PHYLIB. ... Browse Code »

    Signed-off-by: David S. Miller

    David S. Miller
     
  • 2e16a77e1   dsa: add support for the Marvell 88E6060 switch chip ... Browse Code »

    Add support for the Marvell 88E6060 switch chip. This chip only
    supports the Header and Trailer tagging formats, and we use it in
    Trailer mode since that mode is slightly easier to handle than
    Header mode.

    Signed-off-by: Lennert Buytenhek
    Tested-by: Byron Bradley
    Tested-by: Tim Ellis
    Signed-off-by: David S. Miller

    Lennert Buytenhek
     
  • 396138f03   dsa: add support for Trailer tagging format ... Browse Code »

    This adds support for the Trailer switch tagging format. This is
    another tagging that doesn't explicitly mark tagged packets with a
    distinct ethertype, so that we need to add a similar hack in the
    receive path as for the Original DSA tagging format.

    Signed-off-by: Lennert Buytenhek
    Tested-by: Byron Bradley
    Tested-by: Tim Ellis
    Signed-off-by: David S. Miller

    Lennert Buytenhek
     
  • 2e5f03209   dsa: add support for the Marvell 88E6131 switch chip ... Browse Code »

    Add support for the Marvell 88E6131 switch chip. This chip only
    supports the original (ethertype-less) DSA tagging format.

    On the 88E6131, there is a PHY Polling Unit (PPU) which has exclusive
    access to each of the PHYs's MII management registers. If we want to
    talk to the PHYs from software, we have to disable the PPU and wait
    for it to complete its current transaction before we can do so, and we
    need to re-enable the PPU afterwards to make sure that the switch will
    notice changes in link state and speed on the individual ports as they
    occur.

    Since disabling the PPU is rather slow, and since MII management
    accesses are typically done in bursts, this patch keeps the PPU disabled
    for 10ms after a software access completes. This makes handling the
    PPU slightly more complex, but speeds up something like running ethtool
    on one of the switch slave interfaces from ~300ms to ~30ms on typical
    hardware.

    Signed-off-by: Lennert Buytenhek
    Tested-by: Nicolas Pitre
    Tested-by: Peter van Valderen
    Tested-by: Dirk Teurlings
    Signed-off-by: David S. Miller

    Lennert Buytenhek
     
  • cf85d08fd   dsa: add support for original DSA tagging format ... Browse Code »

    Most of the DSA switches currently in the field do not support the
    Ethertype DSA tagging format that one of the previous patches added
    support for, but only the original DSA tagging format.

    The original DSA tagging format carries the same information as the
    Ethertype DSA tagging format, but with the difference that it does not
    have an ethertype field. In other words, when receiving a packet that
    is tagged with an original DSA tag, there is no way of telling in
    eth_type_trans() that this packet is in fact a DSA-tagged packet.

    This patch adds a hook into eth_type_trans() which is only compiled in
    if support for a switch chip that doesn't support Ethertype DSA is
    selected, and which checks whether there is a DSA switch driver
    instance attached to this network device which uses the old tag format.
    If so, it sets the protocol field to ETH_P_DSA without looking at the
    packet, so that the packet ends up in the right place.

    Signed-off-by: Lennert Buytenhek
    Tested-by: Nicolas Pitre
    Tested-by: Peter van Valderen
    Tested-by: Dirk Teurlings
    Signed-off-by: David S. Miller

    Lennert Buytenhek
     
  • 91da11f87   net: Distributed Switch Architecture protocol support ... Browse Code »

    Distributed Switch Architecture is a protocol for managing hardware
    switch chips. It consists of a set of MII management registers and
    commands to configure the switch, and an ethernet header format to
    signal which of the ports of the switch a packet was received from
    or is intended to be sent to.

    The switches that this driver supports are typically embedded in
    access points and routers, and a typical setup with a DSA switch
    looks something like this:

    +-----------+ +-----------+
    | | RGMII | |
    | +-------+ +------ 1000baseT MDI ("WAN")
    | | | 6-port +------ 1000baseT MDI ("LAN1")
    | CPU | | ethernet +------ 1000baseT MDI ("LAN2")
    | |MIImgmt| switch +------ 1000baseT MDI ("LAN3")
    | +-------+ w/5 PHYs +------ 1000baseT MDI ("LAN4")
    | | | |
    +-----------+ +-----------+

    The switch driver presents each port on the switch as a separate
    network interface to Linux, polls the switch to maintain software
    link state of those ports, forwards MII management interface
    accesses to those network interfaces (e.g. as done by ethtool) to
    the switch, and exposes the switch's hardware statistics counters
    via the appropriate Linux kernel interfaces.

    This initial patch supports the MII management interface register
    layout of the Marvell 88E6123, 88E6161 and 88E6165 switch chips, and
    supports the "Ethertype DSA" packet tagging format.

    (There is no officially registered ethertype for the Ethertype DSA
    packet format, so we just grab a random one. The ethertype to use
    is programmed into the switch, and the switch driver uses the value
    of ETH_P_EDSA for this, so this define can be changed at any time in
    the future if the one we chose is allocated to another protocol or
    if Ethertype DSA gets its own officially registered ethertype, and
    everything will continue to work.)

    Signed-off-by: Lennert Buytenhek
    Tested-by: Nicolas Pitre
    Tested-by: Byron Bradley
    Tested-by: Tim Ellis
    Tested-by: Peter van Valderen
    Tested-by: Dirk Teurlings
    Signed-off-by: David S. Miller

    Lennert Buytenhek