12 Nov, 2015
1 commit
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…erry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
"This round contains a couple of new drivers for the Marvell Berlin
family of SoCs, various SoCs from Renesas and Broadcom as well as the
backlight PWM present on MediaTek SoCs.Further existing drivers are extended to support a wider range of
hardware.The remaining patches are minor fixes and cleanups across the board.
Note that one of the patches included in this pull request is against
arch/unicore32. I've included it here because I couldn't get a
response from Guan Xuetao and I consider the change low-risk.
Equivalent patches have been merged and tested in Samsung and PXA
trees. The goal is to finally get rid of legacy code paths that have
repeatedly been causing headaches"* tag 'pwm/for-4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (24 commits)
pwm: sunxi: Fix whitespace issue
pwm: sysfs: Make use of the DEVICE_ATTR_[RW][WO] macro's
pwm: sysfs: Remove unnecessary temporary variable
unicore32: nb0916: Use PWM lookup table
pwm: pwm-rcar: Revise the device tree binding document about compatible
pwm: Return -ENODEV if no PWM lookup match is found
pwm: sun4i: Add support for PWM controller on sun5i SoCs
pwm: Set enable state properly on failed call to enable
pwm: lpss: Add support for runtime PM
pwm: lpss: Add more Intel Broxton IDs
pwm: lpss: Support all four PWMs on Intel Broxton
pwm: lpss: Add support for multiple PWMs
pwm-pca9685: enable ACPI device found on Galileo Gen2
pwm: Add MediaTek display PWM driver support
dt-bindings: pwm: Add MediaTek display PWM bindings
pwm: tipwmss: Enable on TI DRA7x and AM437x
pwm: atmel-hlcdc: add sama5d2 SoC support.
pwm: Add Broadcom BCM7038 PWM controller support
Documentation: dt: add Broadcom BCM7038 PWM controller binding
pwm: Add support for R-Car PWM Timer
...
10 Nov, 2015
6 commits
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This patch changes no code, it just fixes the whitespacing. Operators
should be separated from operands by a single space.Signed-off-by: Olliver Schinagl
Signed-off-by: Thierry Reding -
For the npwm property the PWM sysfs interface already made use of the
DEVICE_ATTR_RO macro. This patch expands this to the other sysfs
properties so that the code base is concise and makes use of this
helpful macro.This has the advantage of slightly reducing the code size, improving
readability and no longer using magic values for permissions.Signed-off-by: Olliver Schinagl
Signed-off-by: Thierry Reding -
Use the result of pwm_is_enabled() directly instead of storing it in a
temporary variable.Signed-off-by: Olliver Schinagl
Signed-off-by: Thierry Reding -
When looking up a PWM using the lookup table, assume that all entries
will have been added already, so failure to find a match means that no
corresponding entry has been registered.This fixes an issue where -EPROBE_DEFER would be returned if the PWM
lookup table is empty. After this fix, -EPROBE_DEFER is reserved for
situations where no provider has yet registered for a matching entry.Signed-off-by: Thierry Reding
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The PWM controller on sun5i SoCs is identical to the one found on sun7i
SoCs. On the A13 package only one of the 2 pins is routed to the outside,
so only advertise one PWM channel there.Signed-off-by: Hans de Goede
Acked-by: Maxime Ripard
Signed-off-by: Thierry Reding -
The pwm_enable() function didn't clear the enabled bit if a call to the
driver's ->enable() callback returned an error. The result was that the
state of the PWM core was wrong. Clearing the bit when enable returns
an error ensures the state is properly set.Tested-by: Jonathan Richardson
Reviewed-by: Dmitry Torokhov
Signed-off-by: Jonathan Richardson
[thierry.reding@gmail.com: add missing kerneldoc for the lock]
Signed-off-by: Thierry Reding
06 Nov, 2015
5 commits
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To be able to save some power when PWM is not in use, add support for
runtime PM for this driver. This also allows the platform to transition to
low power S0ix states when the system is idle.Signed-off-by: Huiquan Zhong
Signed-off-by: Qipeng Zha
Signed-off-by: Mika Westerberg
Signed-off-by: Thierry Reding -
Add more Intel Broxton ACPI and PCI IDs to the driver supported devices
list.Signed-off-by: Mika Westerberg
Signed-off-by: Thierry Reding -
Intel Broxton has similar PWM than Intel Braswell but instead of one it has
four PWMs included in one PCI/ACPI device. This patch adds support for all
the four PWMs and changes the PCI part of the driver to use
'pwm_lpss_bxt_info' instead.Signed-off-by: Mika Westerberg
Signed-off-by: Thierry Reding -
New Intel SoCs such as Broxton will have four PWMs per PCI (or ACPI)
device. Each PWM has 1k of register space allocated from the parent device.
Add support for this.Signed-off-by: Mika Westerberg
Signed-off-by: Thierry Reding -
There is a chip connected to i2c bus on Intel Galileo Gen2 board. Enable it via
ACPI ID INT3492.Cc: Thierry Reding
Signed-off-by: Andy Shevchenko
Signed-off-by: Thierry Reding
06 Oct, 2015
7 commits
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Add display PWM driver support to modify backlight for MT8173 and
MT6595. The PWM has one channel to control the brightness of the
display. When the (high_width / period) is closer to 1, the screen
is brighter; otherwise, it is darker.Signed-off-by: YH Huang
Signed-off-by: Thierry Reding -
TIPWMSS is present on TI's DRA7x and AM437x SoCs. Enable its usage.
Instead of adding each SoC individually, use the more generic symbol
ARCH_OMAP2PLUS instead.Signed-off-by: Vignesh R
Signed-off-by: Sekhar Nori
Signed-off-by: Thierry Reding -
Add sama5d2 hlcdc backlight PWM support. This chip doesn't have to deal with an
errata, so it's a simple addition of the mfd compatible string.Signed-off-by: Nicolas Ferre
Signed-off-by: Thierry Reding -
Add support for the BCM7038-style PWM controller found in all BCM7xxx STB SoCs.
This controller has a hardcoded 2 channels per controller, and cascades a
variable frequency generator on top of a fixed frequency generator which offers
a range of a 148ns period all the way to ~622ms periods.Signed-off-by: Florian Fainelli
Signed-off-by: Thierry Reding -
Commit dca1a4b5ff6e ("clk: at91: keep slow clk enabled to prevent system
hang") added a workaround for the slow clock as it is not properly handled
by its users.Get and use the slow clock as it is necessary for the timer counters.
Signed-off-by: Boris Brezillon
Signed-off-by: Alexandre Belloni
Acked-by: Greg Kroah-Hartman
Acked-by: Daniel Lezcano
Acked-by: Thierry Reding -
This patch adds support for R-Car SoCs PWM Timer. The PWM timer of
R-Car H2 has 7 channels. So, we can use the channels if we describe
device tree nodes.Signed-off-by: Yoshihiro Shimoda
Reviewed-by: Simon Horman
Signed-off-by: Thierry Reding -
Add a PWM controller driver for the Marvell Berlin SoCs. This PWM
controller has 4 channels.Signed-off-by: Antoine Tenart
Acked-by: Sebastian Hesselbarth
Signed-off-by: Thierry Reding
21 Sep, 2015
1 commit
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This platform driver has a OF device ID table but the OF module alias
information is not created so module autoloading won't work.This patch adds the missing MODULE_DEVICE_TABLE() for OF to export that
information so modules have the correct aliases built-in and autoloading
works correctly.A longer explanation by Javier Canillas can be found here:
https://lkml.org/lkml/2015/7/30/519Signed-off-by: Luis de Bethencourt
Signed-off-by: Thierry Reding
10 Sep, 2015
1 commit
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…erry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
"This set of changes introduces the beginnings of a new API that's
based around the concept of states that can be atomically applied.
Drivers go to various lengths to implement something similar, which
indicates that the core should really be providing the necessary
framework.On top of that, there is a bit of cleanup as well as improved
kerneldoc and integration into the device-drivers DocBook.Regarding drivers there is a new one for the NXP LPC18xx family of
SoCs and a couple of fixes for existing drivers (pca9685, Broadcom
Kona and Atmel HLCDC)"* tag 'pwm/for-4.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
ARM: at91: pwm: atmel-hlcdc: Add at91sam9n12 errata
pwm: Add NXP LPC18xx PWM/SCT DT binding documentation
pwm: NXP LPC18xx PWM/SCT driver
pwm-pca9685: Support changing the output frequency
pwm-pca9685: Fix several driver bugs
pwm: kona: Modify settings application sequence
pwm: pca9685: Drop owner assignment
pwm: Add to device-drivers documentation
pwm: Clean up kerneldoc
pwm: Remove useless whitespace
pwm: sysfs: Remove unnecessary padding
pwm: sysfs: Properly convert from enum to string
pwm: Make use of pwm_get_xxx() helpers where appropriate
pwm: Add pwm_get_polarity() helper function
pwm: Constify PWM device where possible
pwm: Add the pwm_is_enabled() helper
09 Sep, 2015
2 commits
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The errata for HLCDC PWM of at91sam9n12 are the same as for at91sam9x5.
Signed-off-by: Josh Wu
Acked-by: Alexandre Belloni
Signed-off-by: Thierry Reding -
This commit adds support for NXP LPC18xx PWM/SCT.
NXP LPC SoCs family, which includes LPC18xx/LPC43xx, provides a State
Configurable Timer (SCT) which can be configured as a Pulse Width
Modulator. Other SoCs in that family may share the same hardware.The PWM supports a total of 16 channels, but only 15 can be simultaneously
requested. There's only one period, global to all the channels, thus PWM
driver will refuse setting different values to it, unless there's only one
channel requested.Signed-off-by: Ariel D'Alessandro
[thierry.reding@gmail.com: remove excessive padding of fields]
Signed-off-by: Thierry Reding
17 Aug, 2015
6 commits
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Previously, period_ns and duty_ns were only used to determine the
ratio of ON and OFF time, the default frequency of 200 Hz was never
changed.
The PCA9685 however is capable of changing the PWM output frequency,
which is expected when changing the period.This patch configures the prescaler accordingly, using the formula
and notes provided in the PCA9685 datasheet.
Bounds checking for the minimum and maximum frequencies, last updated
in revision v.4 of said datasheet, is also added.The prescaler is only touched if the period changed, because we have to
put the chip into sleep mode to unlock the prescale register.
If it is changed, the PWM output frequency changes for all outputs,
because there is one prescaler per chip. This is documented in the
PCA9685 datasheet and in the comments.If the duty cycle is not changed at the same time as the period, then
we restart the PWM output using the duty cycle to period ratio from
before the period change.
When using LEDs for example, previously set brightness levels stay the
same when the frequency changes.Cc: Thierry Reding
Cc: Steffen Trumtrar
Signed-off-by: Clemens Gruber
Signed-off-by: Thierry Reding -
Problems:
- When duty_ns == period_ns, the full OFF bit was not cleared and the
PWM output of the PCA9685 stayed off.
- When duty_ns == period_ns and the catch-all channel was used, the
ALL_LED_OFF_L register was not cleared.
- The full ON bit was not cleared when setting the OFF time, therefore
the exact OFF time was ignored when setting a duty_ns < period_nsSolution: Clear both OFF registers when setting full ON and clear the
full ON bit when changing the OFF registers.Cc: Thierry Reding
Cc: Steffen Trumtrar
Signed-off-by: Clemens Gruber
Signed-off-by: Thierry Reding -
Update the driver so that settings are applied in accordance with the
most recent version of the hardware spec. The revised sequence clears
the trigger bit, waits 400ns, writes settings, sets the trigger bit,
and waits another 400ns. This corrects an issue where occasionally a
requested change was not properly reflected in the PWM output.Reviewed-by: Arun Ramamurthy
Reviewed-by: Scott Branden
Tested-by: Scott Branden
Reviewed-by: Tim Kryger
Signed-off-by: Jonathan Richardson
Signed-off-by: Thierry Reding -
i2c_driver does not need to set an owner because i2c_register_driver()
will set it.Signed-off-by: Krzysztof Kozlowski
Signed-off-by: Thierry Reding -
Clean up kerneldoc in preparation for including the PWM documentation in
DocBook.Signed-off-by: Thierry Reding
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Remove useless tabs used for padding in structure definitions as well as
some blank lines.Signed-off-by: Thierry Reding
27 Jul, 2015
2 commits
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Padding initializers so that assignment operators align is bound to lead
to inconsistencies or churn. Single spaces around the assignment is just
fine.Signed-off-by: Thierry Reding
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The current code will check for polarity in a boolean way. While it is
correct that polarity is either normal or inversed, make it more obvious
that it's an enumeration by using a switch statement and explicit
matches on the enumeration values.Signed-off-by: Thierry Reding
21 Jul, 2015
1 commit
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The Crystalcove PMIC provides three PWM signals and this driver exports
one of them on the BYT platform which is used to control backlight for
DSI panel. This is platform device implementation of the drivers/mfd
cell device for CRC PMIC.CC: Samuel Ortiz
Cc: Linus Walleij
Cc: Alexandre Courbot
Cc: Thierry Reding
Cc: Paul Bolle
Cc: Paul Gortmaker
Tested-by: Ville Syrjälä
Signed-off-by: Shobhit Kumar
Reviewed-by: Varka Bhadram
Signed-off-by: Daniel Vetter
20 Jul, 2015
2 commits
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Use the pwm_get_xxx() helpers instead of directly accessing the fields
in struct pwm_device. This will allow us to smoothly move to the atomic
update approach.Signed-off-by: Boris Brezillon
Signed-off-by: Thierry Reding -
Some PWM drivers are testing the PWMF_ENABLED flag. Create a helper
function to hide the logic behind enabled test. This will allow us to
smoothly move from the current approach to an atomic PWM update
approach.Signed-off-by: Boris Brezillon
Signed-off-by: Thierry Reding
24 Jun, 2015
1 commit
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…erry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
"This has a couple of fixes for Atmel, Samsung and Broadcom drivers.Some preparatory patches for more upcoming Intel work is included as
well"* tag 'pwm/for-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
pwm: lpss: pci: Add support for Broxton platform
pwm: bcm-kona: Don't set polarity in probe
pwm: Add pwmchip_add_with_polarity() API
pwm: atmel: Fix incorrect CDTY value after disabling
pwm: atmel: Fix incorrect CDTY value after enabling
pwm: samsung: Use MODULE_DEVICE_TABLE() to include OF modalias
pwm: Add support to remove registered consumer lookup tables
12 Jun, 2015
5 commits
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Add PCI device IDs for Broxton platform.
Signed-off-by: Qipeng Zha
Acked-by: Mika Westerberg
Signed-off-by: Thierry Reding -
Omit setting the polarity to normal during probe and instead use the new
pwmchip_add_with_polarity() function to register a PWM chip with inverse
polarity by default for all channels to reflect the hardware default.Signed-off-by: Arun Ramamurthy
Reviewed-by: Ray Jui
Signed-off-by: Scott Branden
Signed-off-by: Tim Kryger
Signed-off-by: Jonathan Richardson
[thierry.reding@gmail.com: use pwmchip_add_with_polarity()]
Signed-off-by: Thierry Reding -
Add a new function to register a PWM chip with channels that have their
initial polarity as specified by an additional parameter. This benefits
drivers of controllers that by default operate with inversed polarity
by removing the need to modify the polarity during initialization.Signed-off-by: Tim Kryger
Signed-off-by: Jonathan Richardson
[thierry.reding@gmail.com: export pwmchip_add_with_polarity()]
Signed-off-by: Thierry Reding -
pwm-leds calls .config() and .disable() in a row. This exhibits that it
may happen that the channel gets disabled before CDTY has been updated
with CUPD. The issue gets quite worse with long periods. So, ensure that
at least one period has past before disabling the channel by polling
ISR.Signed-off-by: Alexandre Belloni
Acked-by: Nicolas Ferre
Tested-by: Gaël PORTAY
Signed-off-by: Thierry Reding -
CUPD is not flushed before enabling the channel so it will update
CDTY/CPRD just after one period. So we always set CUPD, even when the
channel is not enabled.Signed-off-by: Alexandre Belloni
Acked-by: Nicolas Ferre
Signed-off-by: Thierry Reding
