Eric Lee / smarc-fsl-linux-kernel

11 Dec, 2006

1 commit

  • 8d94cc50a   [PATCH] spi: stabilize PIO mode transfers on PXA2xx systems ... Browse Code »

    Stabilize PIO mode transfers against a range of word sizes and FIFO
    thresholds and fixes word size setup/override issues.

    1) 16 and 32 bit DMA/PIO transfers broken due to timing differences.
    2) Potential for bad transfer counts due to transfer size assumptions.
    3) Setup function broken is multiple ways.
    4) Per transfer bit_per_word changes break DMA setup in pump_tranfers.
    5) False positive timeout are not errors.
    6) Changes in pxa2xx_spi_chip not effective in calls to setup.
    7) Timeout scaling wrong for PXA255 NSSP.
    8) Driver leaks memory while busy during unloading.

    Known issues:

    SPI_CS_HIGH and SPI_LSB_FIRST settings in struct spi_device are not handled.

    Testing:

    This patch has been test against the "random length, random bits/word,
    random data (verified on loopback) and stepped baud rate by octaves
    (3.6MHz to 115kHz)" test. It is robust in PIO mode, using any
    combination of tx and rx thresholds, and also in DMA mode (which
    internally computes the thresholds).

    Much thanks to Ned Forrester for exhaustive reviews, fixes and testing.
    The driver is substantially better for his efforts.

    Signed-off-by: Stephen Street
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Stephen Street
     

08 Dec, 2006

5 commits

06 Dec, 2006

2 commits

05 Dec, 2006

1 commit

04 Dec, 2006

1 commit

30 Nov, 2006

1 commit

22 Nov, 2006

1 commit

04 Nov, 2006

1 commit

  • d3e5a938e   [PATCH] spi section fix ... Browse Code »

    WARNING: vmlinux - Section mismatch: reference to .init.text:spi_register_board_info from __ksymtab_gpl between '__ksymtab_spi_register_board_info' (at offset 0xc032f7d0) and '__ksymtab_spi_alloc_master'

    Fix this by removing the export.

    Acked-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Andrew Morton
     

07 Oct, 2006

1 commit

  • c7bec5aba   Various drivers' irq handlers: kill dead code, needless casts ... Browse Code »

    - Eliminate casts to/from void*

    - Eliminate checks for conditions that never occur. These typically
    fall into two classes:

    1) Checking for 'dev_id == NULL', then it is never called with
    NULL as an argument.

    2) Checking for invalid irq number, when the only caller (the
    system) guarantees the irq handler is called with the proper
    'irq' number argument.

    Signed-off-by: Jeff Garzik

    Jeff Garzik
     

05 Oct, 2006

1 commit

  • 7d12e780e   IRQ: Maintain regs pointer globally rather than passing to IRQ handlers ... Browse Code »

    Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
    of passing regs around manually through all ~1800 interrupt handlers in the
    Linux kernel.

    The regs pointer is used in few places, but it potentially costs both stack
    space and code to pass it around. On the FRV arch, removing the regs parameter
    from all the genirq function results in a 20% speed up of the IRQ exit path
    (ie: from leaving timer_interrupt() to leaving do_IRQ()).

    Where appropriate, an arch may override the generic storage facility and do
    something different with the variable. On FRV, for instance, the address is
    maintained in GR28 at all times inside the kernel as part of general exception
    handling.

    Having looked over the code, it appears that the parameter may be handed down
    through up to twenty or so layers of functions. Consider a USB character
    device attached to a USB hub, attached to a USB controller that posts its
    interrupts through a cascaded auxiliary interrupt controller. A character
    device driver may want to pass regs to the sysrq handler through the input
    layer which adds another few layers of parameter passing.

    I've build this code with allyesconfig for x86_64 and i386. I've runtested the
    main part of the code on FRV and i386, though I can't test most of the drivers.
    I've also done partial conversion for powerpc and MIPS - these at least compile
    with minimal configurations.

    This will affect all archs. Mostly the changes should be relatively easy.
    Take do_IRQ(), store the regs pointer at the beginning, saving the old one:

    struct pt_regs *old_regs = set_irq_regs(regs);

    And put the old one back at the end:

    set_irq_regs(old_regs);

    Don't pass regs through to generic_handle_irq() or __do_IRQ().

    In timer_interrupt(), this sort of change will be necessary:

    - update_process_times(user_mode(regs));
    - profile_tick(CPU_PROFILING, regs);
    + update_process_times(user_mode(get_irq_regs()));
    + profile_tick(CPU_PROFILING);

    I'd like to move update_process_times()'s use of get_irq_regs() into itself,
    except that i386, alone of the archs, uses something other than user_mode().

    Some notes on the interrupt handling in the drivers:

    (*) input_dev() is now gone entirely. The regs pointer is no longer stored in
    the input_dev struct.

    (*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
    something different depending on whether it's been supplied with a regs
    pointer or not.

    (*) Various IRQ handler function pointers have been moved to type
    irq_handler_t.

    Signed-Off-By: David Howells
    (cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)

    David Howells
     

04 Oct, 2006

1 commit

04 Jul, 2006

1 commit

  • 60be6b9a4   [PATCH] lockdep: annotate on-stack completions ... Browse Code »

    lockdep needs to have the waitqueue lock initialized for on-stack waitqueues
    implicitly initialized by DECLARE_COMPLETION(). Annotate on-stack completions
    accordingly.

    Has no effect on non-lockdep kernels.

    Signed-off-by: Ingo Molnar
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Ingo Molnar
     

01 Jul, 2006

1 commit

29 Jun, 2006

1 commit

  • 980a01c9b   [PATCH] SPI: infrastructure to initialize spi_device.mode early ... Browse Code »

    This patch adds earlier initialization of spi_device.mode, as needed
    on boards using nondefault chipselect polarity. An example would be
    ones using the RS5C348 RTC without an external signal inverter between
    the RTC chipselect and the SPI controller.

    Without this mechanism, the first setup() call for that chip would
    wrongly enable chips, corrupting transfers to/from other chips sharing
    that SPI bus.

    Signed-off-by: David Brownell
    Signed-off-by: Linus Torvalds

    David Brownell
     

27 May, 2006

1 commit

22 May, 2006

5 commits

  • 5daa3ba0c   [PATCH] pxa2xx-spi update ... Browse Code »

    Fix some outstanding issues with the pxa2xx_spi driver when running on a
    PXA270:

    - Wrong timeout calculation in the setup function due to different
    peripheral clock rates in the PXAxxx family.

    - Bad handling of SSSR_TFS interrupts in interrupt_transfer function.

    - Added locking to interface between the pump_messages workqueue and the
    pump_transfers tasklet.

    Much thanks to Juergen Beisert for the extensive testing on the PXA270.

    Signed-off-by: Stephen Street
    Signed-off-by: David Brownell
    Cc: Russell King
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Stephen Street
     
  • 7fba53402   [PATCH] S3C24XX: hardware SPI driver ... Browse Code »

    Hardware based SPI driver for Samsung S3C24XX SoC systems

    Signed-off-by: Ben Dooks
    Cc: David Brownell
    Cc: Greg KH
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Ben Dooks
     
  • 1fc7547d4   [PATCH] S3C24XX: GPIO based SPI driver ... Browse Code »

    SPI driver for SPI by GPIO on the Samsung S3C24XX series of SoC processors.

    Signed-off-by: Ben Dooks
    Cc: Greg KH
    Cc: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Ben Dooks
     
  • ccf06998f   [PATCH] spi: add spi master driver for Freescale MPC83xx SPI controller ... Browse Code »

    This driver supports the SPI controller on the MPC83xx SoC devices from
    Freescale. Note, this driver supports only the simple shift register SPI
    controller and not the descriptor based CPM or QUICCEngine SPI controller.

    Signed-off-by: Kumar Gala
    Signed-off-by: David Brownell
    Cc: Greg KH
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Kumar Gala
     
  • ba1a05131   [PATCH] minor SPI doc fix ... Browse Code »

    Because several developers asked me about referenced but missing
    spi_add_master(), I think that this patch should be applied ... it
    corrects comments so they refer to spi_register_master() instead.

    Signed-off-by: dmitry pervushin
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    dmitry pervushin
     

17 May, 2006

8 commits

  • 1e316d756   [PATCH] SPI: spi_bitbang: clocking fixes ... Browse Code »

    This fixes two problems triggered by the MMC stack updating clocks:

    - SPI masters driver should accept a max clock speed of zero; that's one
    convention for marking idle devices. (Presumably that helps controllers
    that don't autogate clocks to "off" when not in use.)

    - There are more than 1000 nanoseconds per millisecond; setting the clock
    down to 125 KHz now works properly.

    Showing once again that Zero (http://en.wikipedia.org/wiki/Zero) is still
    an inexhaustible number of bugs.

    Signed-off-by: David Brownell
    Signed-off-by: Greg Kroah-Hartman

    David Brownell
     
  • 9708c121c   [PATCH] spi: Update to PXA2xx SPI Driver ... Browse Code »

    Fix two outstanding issues with the pxa2xx_spi driver:

    1) Bad cast in the function u32_writer. Thanks to Henrik Bechmann
    2) Adds support for per transfer changes to speed and bits per word

    Signed-off-by: Stephen Street
    Cc: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Greg Kroah-Hartman

    Stephen Street
     
  • a020ed752   [PATCH] SPI: busnum == 0 needs to work ... Browse Code »

    We need to be able to have a "SPI bus 0" matching chip numbering; but
    that number was wrongly used to flag dynamic allocation of a bus number.

    This patch resolves that issue; now negative numbers trigger dynamic alloc.

    It also updates the how-to-write-a-controller-driver overview to mention
    this stuff.

    Signed-off-by: David Brownell
    Signed-off-by: Greg Kroah-Hartman

    David Brownell
     
  • ccf77cc4a   [PATCH] SPI: devices can require LSB-first encodings ... Browse Code »

    Add spi_device hook for LSB-first word encoding, and update all the
    (in-tree) controller drivers to reject such devices. Eventually,
    some controller drivers will be updated to support lsb-first encodings
    on the wire; no current drivers need this.

    Signed-off-by: David Brownell
    Signed-off-by: Greg Kroah-Hartman

    David Brownell
     
  • ff9f4771b   [PATCH] SPI: Renamed bitbang_transfer_setup to spi_bitbang_setup_transfer and export it ... Browse Code »

    Renamed bitbang_transfer_setup to follow convention of other exported symbols
    from spi-bitbang. Exported spi_bitbang_setup_transfer to allow users of
    spi-bitbang to use the function in their own setup_transfer.

    Signed-off-by: Kumar Gala
    Cc: David Brownell
    Signed-off-by: Greg Kroah-Hartman

    Kumar Gala
     
  • a9948b619   [PATCH] SPI: spi bounce buffer has a minimum length ... Browse Code »

    Make sure that spi_write_then_read() can always handle at least 32 bytes
    of transfer (total, both directions), minimizing one portability issue.

    Signed-off-by: David Brownell
    Signed-off-by: Greg Kroah-Hartman

    David Brownell
     
  • e0c9905e8   [PATCH] SPI: add PXA2xx SSP SPI Driver ... Browse Code »

    This driver turns a PXA2xx synchronous serial port (SSP) into a SPI master
    controller (see Documentation/spi/spi_summary). The driver has the following
    features:

    - Support for any PXA2xx SSP
    - SSP PIO and SSP DMA data transfers.
    - External and Internal (SSPFRM) chip selects.
    - Per slave device (chip) configuration.
    - Full suspend, freeze, resume support.

    Signed-off-by: Stephen Street
    Signed-off-by: Andrew Morton
    Cc: David Brownell
    Signed-off-by: Greg Kroah-Hartman

    Stephen Street
     
  • 4cff33f94   [PATCH] SPI: per-transfer overrides for wordsize and clocking ... Browse Code »

    Some protocols (like one for some bitmap displays) require different clock
    speed or word size settings for each transfer in an SPI message. This adds
    those parameters to struct spi_transfer. They are to be used when they are
    nonzero; otherwise the defaults from spi_device are to be used.

    The patch also adds a setup_transfer callback to spi_bitbang, uses it for
    messages that use those overrides, and implements it so that the pure
    bitbanging code can help resolve any questions about how it should work.

    Signed-off-by: Imre Deak
    Signed-off-by: David Brownell
    Signed-off-by: Greg Kroah-Hartman

    Imre Deak
     

21 Feb, 2006

1 commit

07 Feb, 2006

1 commit

  • 9c1da3cb4   [PATCH] SPI: spi_butterfly, restore lost deltas ... Browse Code »

    This resolves some minor version skew glitches that accumulated for the AVR
    Butterfly adapter driver, which caused among other things the existence of
    a duplicate Kconfig entry. Most of it boils down to comment updates, but in
    one case it removes some now-superfluous code that would be better if not
    copied into other controller-level drivers.

    Signed-off-by: David Brownell

    David Brownell
     

14 Jan, 2006

5 commits

  • 2e10c84b9   [PATCH] SPI: add spi_butterfly driver ... Browse Code »

    This adds a bitbanging parport based adaptor cable for AVR Butterfly, giving
    SPI links to its DataFlash chip and (eventually) firmware running in the card.

    Signed-off-by: Andrew Morton
    Signed-off-by: Greg Kroah-Hartman

    David Brownell
     
  • 5d870c8e2   [PATCH] spi: remove fastcall crap ... Browse Code »

    gcc4 generates warnings when a non-FASTCALL function pointer is assigned to a
    FASTCALL one. Perhaps it has taste.

    Cc: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Greg Kroah-Hartman

    Andrew Morton
     
  • 7111763d3   [PATCH] spi: misc fixes ... Browse Code »

    This collects some small SPI patches that seem to be missing from the MM tree:

    - spi_butterfly kbuild hooks got dropped somehow; this restores them
    - quick fix for a (theoretical?) m25p80_write() oops noted by Andrew
    - quick fix for a potential config-specific oops for mtd_dataflash()
    - minor doc tweaks

    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Greg Kroah-Hartman

    David Brownell
     
  • 8275c642c   [PATCH] spi: use linked lists rather than an array ... Browse Code »

    This makes the SPI core and its users access transfers in the SPI message
    structure as linked list not as an array, as discussed on LKML.

    From: David Brownell

    Updates including doc, bugfixes to the list code, add
    spi_message_add_tail(). Plus, initialize things _before_ grabbing the
    locks in some cases (in case it grows more expensive). This also merges
    some bitbang updates of mine that didn't yet make it into the mm tree.

    Signed-off-by: Vitaly Wool
    Signed-off-by: Dmitry Pervushin
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Greg Kroah-Hartman

    Vitaly Wool
     
  • 9904f22a7   [PATCH] spi: add spi_bitbang driver ... Browse Code »

    This adds a bitbanging spi master, hooking up to board/adapter-specific glue
    code which knows how to set and read the signals (gpios etc).

    This code kicks in after the glue code creates a platform_device with the
    right platform_data. That data includes I/O loops, which will usually
    come from expanding an inline function (provided in the header). One goal
    is that the I/O loops should be easily optimized down to a few GPIO register
    accesses, in common cases, for speed and minimized overhead.

    This understands all the currently defined protocol tweaking options in the
    SPI framework, and might eventually serve as as reference implementation.

    - different word sizes (1..32 bits)
    - differing clock rates
    - SPI modes differing by CPOL (affecting chip select and I/O loops)
    - SPI modes differing by CPHA (affecting I/O loops)
    - delays (usecs) after transfers
    - temporarily deselecting chips in mid-transfer

    A lot of hardware could work with this framework, though common types of
    controller can't reach peak performance without switching to a driver
    structure that supports pipelining of transfers (e.g. DMA queues) and maybe
    controllers (e.g. IRQ driven).

    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Greg Kroah-Hartman

    David Brownell