03 Apr, 2016

2 commits

  • Pull perf fixes from Ingo Molnar:
    "Misc kernel side fixes:

    - fix event leak
    - fix AMD PMU driver bug
    - fix core event handling bug
    - fix build bug on certain randconfigs

    Plus misc tooling fixes"

    * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
    perf/x86/amd/ibs: Fix pmu::stop() nesting
    perf/core: Don't leak event in the syscall error path
    perf/core: Fix time tracking bug with multiplexing
    perf jit: genelf makes assumptions about endian
    perf hists: Fix determination of a callchain node's childlessness
    perf tools: Add missing initialization of perf_sample.cpumode in synthesized samples
    perf tools: Fix build break on powerpc
    perf/x86: Move events_sysfs_show() outside CPU_SUP_INTEL
    perf bench: Fix detached tarball building due to missing 'perf bench memcpy' headers
    perf tests: Fix tarpkg build test error output redirection

    Linus Torvalds
     
  • Pull x86 fixes from Thomas Gleixner:
    "This lot contains:

    - Some fixups for the fallout of the topology consolidation which
    unearthed AMD/Intel inconsistencies
    - Documentation for the x86 topology management
    - Support for AMD advanced power management bits
    - Two simple cleanups removing duplicated code"

    * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
    x86/cpu: Add advanced power management bits
    x86/thread_info: Merge two !__ASSEMBLY__ sections
    x86/cpufreq: Remove duplicated TDP MSR macro definitions
    x86/Documentation: Start documenting x86 topology
    x86/cpu: Get rid of compute_unit_id
    perf/x86/amd: Cleanup Fam10h NB event constraints
    x86/topology: Fix AMD core count

    Linus Torvalds
     

02 Apr, 2016

6 commits

  • Pull power management and ACPI fix from Rafael J. Wysocki:
    "Just one fix for a nasty boot failure on some systems based on Intel
    Skylake that shipped with broken firmware where enabling
    hardware-coordinated P-states management (HWP) causes a faulty
    interrupt handler in SMM to be invoked and crash the system (Srinivas
    Pandruvada)"

    * tag 'pm+acpi-4.6-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm:
    ACPI / processor: Request native thermal interrupt handling via _OSC

    Linus Torvalds
     
  • Merge fixes from Andrew Morton:
    "11 fixes"

    * emailed patches from Andrew Morton :
    .mailmap: add Christophe Ricard
    Make CONFIG_FHANDLE default y
    mm/page_isolation.c: fix the function comments
    oom, oom_reaper: do not enqueue task if it is on the oom_reaper_list head
    mm/page_isolation: fix tracepoint to mirror check function behavior
    mm/rmap: batched invalidations should use existing api
    x86/mm: TLB_REMOTE_SEND_IPI should count pages
    mm: fix invalid node in alloc_migrate_target()
    include/linux/huge_mm.h: return NULL instead of false for pmd_trans_huge_lock()
    mm, kasan: fix compilation for CONFIG_SLAB
    MAINTAINERS: orangefs mailing list is subscribers-only

    Linus Torvalds
     
  • * acpi-processor:
    ACPI / processor: Request native thermal interrupt handling via _OSC

    Rafael J. Wysocki
     
  • Pull arm64 fixes from Will Deacon:

    - fix oops when patching in alternative sequences on big-endian CPUs

    - reconcile asm/perf_event.h after merge window fallout with KVM ARM

    - defconfig updates

    * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
    arm64: defconfig: updates for 4.6
    arm64: perf: Move PMU register related defines to asm/perf_event.h
    arm64: opcodes.h: Add arm big-endian config options before including arm header

    Linus Torvalds
     
  • The recently introduced batched invalidations mechanism uses its own
    mechanism for shootdown. However, it does wrong accounting of
    interrupts (e.g., inc_irq_stat is called for local invalidations),
    trace-points (e.g., TLB_REMOTE_SHOOTDOWN for local invalidations) and
    may break some platforms as it bypasses the invalidation mechanisms of
    Xen and SGI UV.

    This patch reuses the existing TLB flushing mechnaisms instead. We use
    NULL as mm to indicate a global invalidation is required.

    Fixes 72b252aed506b8 ("mm: send one IPI per CPU to TLB flush all entries after unmapping pages")
    Signed-off-by: Nadav Amit
    Cc: Mel Gorman
    Cc: Rik van Riel
    Cc: Dave Hansen
    Cc: Ingo Molnar
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Nadav Amit
     
  • TLB_REMOTE_SEND_IPI was recently introduced, but it counts bytes instead
    of pages. In addition, it does not report correctly the case in which
    flush_tlb_page flushes a page. Fix it to be consistent with other TLB
    counters.

    Fixes: 5b74283ab251b9d ("x86, mm: trace when an IPI is about to be sent")
    Signed-off-by: Nadav Amit
    Cc: Mel Gorman
    Cc: Rik van Riel
    Cc: Dave Hansen
    Cc: Ingo Molnar
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Nadav Amit
     

01 Apr, 2016

4 commits


31 Mar, 2016

7 commits

  • Pull parisc fixes from Helge Deller:
    "Fix seccomp filter support and SIGSYS signals on compat kernel.

    Both patches are tagged for v4.5 stable kernel"

    * 'parisc-4.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
    parisc: Fix and enable seccomp filter support
    parisc: Fix SIGSYS signals in compat case

    Linus Torvalds
     
  • Pull nvdimm mcsafe_memcpy use from Dan Williams:
    "Now that mcsafe_memcpy() has landed, and the return value was been
    clarified in commit cbf8b5a2b649 ("x86/mm, x86/mce: Fix return
    type/value for memcpy_mcsafe()"), let's hook up its primary usage in
    the pmem driver.

    The compilation problems from the initial posting have been fixed,
    this has appeared in a -next release with no reported issues, and it
    picked up an ack from Ingo. There is no pressing need to merge this
    in 4.6- rc2. However, if we wait until 4.7 the new memcpy_mcsafe()
    capability will ship without a user in 4.6-final"

    * 'libnvdimm-for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm:
    x86, pmem: use memcpy_mcsafe() for memcpy_from_pmem()

    Linus Torvalds
     
  • The seccomp filter support requires careful handling of task registers. This
    includes reloading of the return value (%r28) and proper syscall exit if
    secure_computing() returned -1.

    Additionally we need to sign-extend the syscall number from signed 32bit to
    signed 64bit in do_syscall_trace_enter() since the ptrace interface only allows
    storing 32bit values in compat mode.

    Signed-off-by: Helge Deller
    Cc: stable@vger.kernel.org # v4.5

    Helge Deller
     
  • Signed-off-by: Helge Deller
    Cc: stable@vger.kernel.org # v4.5

    Helge Deller
     
  • Patch 5a50f5291701 ("perf/x86/ibs: Fix race with IBS_STARTING state")
    closed a big hole while opening another, smaller hole.

    Signed-off-by: Peter Zijlstra (Intel)
    Cc: Alexander Shishkin
    Cc: Arnaldo Carvalho de Melo
    Cc: Jiri Olsa
    Cc: Linus Torvalds
    Cc: Peter Zijlstra
    Cc: Stephane Eranian
    Cc: Thomas Gleixner
    Cc: Vince Weaver
    Fixes: 5a50f5291701 ("perf/x86/ibs: Fix race with IBS_STARTING state")
    Signed-off-by: Ingo Molnar

    Peter Zijlstra
     
  • Pull nios2 fix from Ley Foon Tan:
    "Replace fdt_translate_address with of_flat_dt_translate_address"

    Fixes a build failure.

    * tag 'nios2-v4.6-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/lftan/nios2:
    nios2: Replace fdt_translate_address with of_flat_dt_translate_address

    Linus Torvalds
     
  • nios2 builds fail with the following build error.

    arch/nios2/kernel/prom.c: In function 'early_init_dt_scan_serial':
    arch/nios2/kernel/prom.c:100:2: error:
    implicit declaration of function 'fdt_translate_address'

    Commit c90fe9c0394b ("of: earlycon: Move address translation to
    of_setup_earlycon()") replaced fdt_translate_address() with
    of_flat_dt_translate_address() but missed updating the nios2 code.

    Fixes: c90fe9c0394b ("of: earlycon: Move address translation to of_setup_earlycon()")
    Cc: Peter Hurley
    Cc: Rob Herring
    Signed-off-by: Guenter Roeck
    Acked-by: Ley Foon Tan

    Guenter Roeck
     

29 Mar, 2016

16 commits

  • A few defconfig updates got dropped on the floor during the merge window,
    so I've rounded up the remainder here:

    * Fix duplicate definition of MMC_BLOCK_MINORS and bump to 32 for
    msm8916

    * CPUFreq support for the Juno platform, using the MHU/SCPI interface

    * Removal of the default command line, which assumed a console called
    ttyAMA0

    * Bits and pieces for the Hi6220 (96Boards HiKey)

    Signed-off-by: Will Deacon

    Will Deacon
     
  • To use the ARMv8 PMU related register defines from the KVM code, we move
    the relevant definitions to asm/perf_event.h header file and rename them
    with prefix ARMV8_PMU_. This allows us to get rid of kvm_perf_event.h.

    Signed-off-by: Anup Patel
    Signed-off-by: Shannon Zhao
    Acked-by: Marc Zyngier
    Reviewed-by: Andrew Jones
    Signed-off-by: Marc Zyngier
    Signed-off-by: Will Deacon

    Shannon Zhao
     
  • arm and arm64 use different config options to specify big endian. This
    needs taking into account when including code/headers between the two
    architectures.

    A case in point is PAN, which uses the __instr_arm() macro to output
    instructions. The macro comes from opcodes.h, which lives under arch/arm.
    On a big-endian build the mismatched config options mean the instruction
    isn't byte swapped correctly, resulting in undefined instruction exceptions
    during boot:

    | alternatives: patching kernel code
    | kdevtmpfs[87]: undefined instruction: pc=ffffffc0004505b4
    | kdevtmpfs[87]: undefined instruction: pc=ffffffc00076231c
    | kdevtmpfs[87]: undefined instruction: pc=ffffffc00076231c
    | kdevtmpfs[87]: undefined instruction: pc=ffffffc00076231c
    | kdevtmpfs[87]: undefined instruction: pc=ffffffc00076231c
    | kdevtmpfs[87]: undefined instruction: pc=ffffffc00076231c
    | kdevtmpfs[87]: undefined instruction: pc=ffffffc00076231c
    | kdevtmpfs[87]: undefined instruction: pc=ffffffc00076231c
    | kdevtmpfs[87]: undefined instruction: pc=ffffffc00076231c
    | kdevtmpfs[87]: undefined instruction: pc=ffffffc00076231c
    | Internal error: Oops - undefined instruction: 0 [#1] SMP
    | Modules linked in:
    | CPU: 0 PID: 87 Comm: kdevtmpfs Not tainted 4.1.16+ #5
    | Hardware name: Hisilicon PhosphorHi1382 EVB (DT)
    | task: ffffffc336591700 ti: ffffffc3365a4000 task.ti: ffffffc3365a4000
    | PC is at dump_instr+0x68/0x100
    | LR is at do_undefinstr+0x1d4/0x2a4
    | pc : [] lr : [] pstate: 604001c5
    | sp : ffffffc3365a6450

    Cc: #4.3.x-
    Reported-by: Hanjun Guo
    Tested-by: Xuefeng Wang
    Signed-off-by: James Morse
    Signed-off-by: Will Deacon

    James Morse
     
  • Bit 11 of CPUID 8000_0007 edx is processor feedback interface.
    Bit 12 of CPUID 8000_0007 edx is accumulated power.

    Print proper names in proc/cpuinfo

    Reported-and-tested-by: Borislav Petkov
    Signed-off-by: Huang Rui
    Cc: Tony Li
    Cc: Fenghua Yu
    Cc: Tony Luck
    Cc: Peter Zijlstra
    Cc: "Rafael J. Wysocki"
    Cc: Andy Lutomirski
    Cc: Fengguang Wu
    Cc: Sherry Hurwitz
    Cc: Borislav Petkov
    Cc: "Len Brown"
    Link: http://lkml.kernel.org/r/1458871720-3209-1-git-send-email-ray.huang@amd.com
    Signed-off-by: Thomas Gleixner

    Huang Rui
     
  • We have

    #ifndef __ASSEMBLY__
    ...
    #endif

    #ifndef __ASSEMBLY__
    ...
    #endif

    Merge the two.

    No functionality change.

    Signed-off-by: Borislav Petkov
    Link: http://lkml.kernel.org/r/1459189217-25532-1-git-send-email-bp@alien8.de
    Signed-off-by: Thomas Gleixner

    Borislav Petkov
     
  • The list of CPU model specific registers contains two copies of TDP
    registers, remove the one, which is out of numerical order in the
    list.

    Fixes: 6a35fc2d6c22 ("cpufreq: intel_pstate: get P1 from TAR when available")
    Signed-off-by: Vladimir Zapolskiy
    Cc: Len Brown
    Cc: "Rafael J. Wysocki"
    Cc: Kristen Carlson
    Accardi
    Cc: Srinivas Pandruvada
    Link: http://lkml.kernel.org/r/1459018020-24577-1-git-send-email-vladimir_zapolskiy@mentor.com
    Signed-off-by: Thomas Gleixner

    Vladimir Zapolskiy
     
  • When the prng device driver calls misc_register() there is the possibility
    to also provide the recommented file permissions. This fix now gives
    useful values (0644) where previously just the default was used (resulting
    in 0600 for the device file).

    Signed-off-by: Harald Freudenberger
    Signed-off-by: Martin Schwidefsky

    Harald Freudenberger
     
  • It is cpu_core_id anyway.

    Signed-off-by: Borislav Petkov
    Link: http://lkml.kernel.org/r/1458917557-8757-3-git-send-email-bp@alien8.de
    Signed-off-by: Thomas Gleixner

    Borislav Petkov
     
  • Avoid allocating the AMD NB event constraints data structure when not
    needed. This gets rid of x86_max_cores usage and avoids allocating
    this on AMD Core Perfctr supporting hardware (which has separate MSRs
    for NB events).

    Signed-off-by: Peter Zijlstra (Intel)
    Signed-off-by: Borislav Petkov
    Cc: aherrmann@suse.com
    Cc: Rui Huang
    Cc: Borislav Petkov
    Cc: jencce.kernel@gmail.com
    Link: http://lkml.kernel.org/r/20160320124629.GY6375@twins.programming.kicks-ass.net
    Signed-off-by: Thomas Gleixner

    Peter Zijlstra
     
  • It turns out AMD gets x86_max_cores wrong when there are compute
    units.

    The issue is that Linux assumes:

    nr_logical_cpus = nr_cores * nr_siblings

    But AMD reports its CU unit as 2 cores, but then sets num_smp_siblings
    to 2 as well.

    Boris: fixup ras/mce_amd_inj.c too, to compute the Node Base Core
    properly, according to the new nomenclature.

    Fixes: 1f12e32f4cd5 ("x86/topology: Create logical package id")
    Reported-by: Xiong Zhou
    Signed-off-by: Peter Zijlstra (Intel)
    Signed-off-by: Borislav Petkov
    Cc: Andreas Herrmann
    Cc: Andy Lutomirski
    Link: http://lkml.kernel.org/r/20160317095220.GO6344@twins.programming.kicks-ass.net
    Signed-off-by: Thomas Gleixner

    Peter Zijlstra
     
  • The used_vsr flag is set if process has used VSX registers, not Altivec
    registers. But the comment says otherwise, correct the comment.

    Signed-off-by: Simon Guo
    Signed-off-by: Michael Ellerman

    Simon Guo
     
  • In save_sprs() in process.c contains the following test:

    if (cpu_has_feature(cpu_has_feature(CPU_FTR_ALTIVEC)))
    t->vrsave = mfspr(SPRN_VRSAVE);

    CPU feature with the mask 0x1 is CPU_FTR_COHERENT_ICACHE so the test
    is equivilent to:

    if (cpu_has_feature(CPU_FTR_ALTIVEC) &&
    cpu_has_feature(CPU_FTR_COHERENT_ICACHE))

    On CPUs without support for both (i.e G5) this results in vrsave not
    being saved between context switches. The vector register save/restore
    code doesn't use VRSAVE to determine which registers to save/restore,
    but the value of VRSAVE is used to determine if altivec is being used
    in several code paths.

    Fixes: 152d523e6307 ("powerpc: Create context switch helpers save_sprs() and restore_sprs()")
    Cc: stable@vger.kernel.org
    Signed-off-by: Oliver O'Halloran
    Signed-off-by: Anton Blanchard
    Signed-off-by: Michael Ellerman

    Oliver O'Halloran
     
  • hugepd_free() used __get_cpu_var() once. Nothing ensured that the code
    accessing the variable did not migrate from one CPU to another and soon
    this was noticed by Tiejun Chen in 94b09d755462 ("powerpc/hugetlb:
    Replace __get_cpu_var with get_cpu_var"). So we had it fixed.

    Christoph Lameter was doing his __get_cpu_var() replaces and forgot
    PowerPC. Then he noticed this and sent his fixed up batch again which
    got applied as 69111bac42f5 ("powerpc: Replace __get_cpu_var uses").

    The careful reader will noticed one little detail: get_cpu_var() got
    replaced with this_cpu_ptr(). So now we have a put_cpu_var() which does
    a preempt_enable() and nothing that does preempt_disable() so we
    underflow the preempt counter.

    Cc: Benjamin Herrenschmidt
    Cc: Christoph Lameter
    Cc: stable@vger.kernel.org
    Signed-off-by: Sebastian Andrzej Siewior
    Reviewed-by: Aneesh Kumar K.V
    Signed-off-by: Michael Ellerman

    Sebastian Siewior
     
  • Update the definition of memcpy_from_pmem() to return 0 or a negative
    error code. Implement x86/arch_memcpy_from_pmem() with memcpy_mcsafe().

    Cc: Borislav Petkov
    Cc: Tony Luck
    Cc: Thomas Gleixner
    Cc: Andy Lutomirski
    Cc: Peter Zijlstra
    Cc: Andrew Morton
    Cc: Linus Torvalds
    Acked-by: Ingo Molnar
    Reviewed-by: Ross Zwisler
    Signed-off-by: Dan Williams

    Dan Williams
     
  • Pull sparc fixes from David Miller:
    "Minor typing cleanup from Joe Perches, and some comment typo fixes
    from Adam Buchbinder"

    * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
    sparc: Convert naked unsigned uses to unsigned int
    sparc: Fix misspellings in comments.

    Linus Torvalds
     
  • Pull arch/tile bugfixes from Chris Metcalf:
    "These include updates to MAINTAINERS, some comment spelling fixes, and
    a bugfix to the tile kgdb.c support"

    * git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile:
    tile: Fix misspellings in comments.
    MAINTAINERS: update web link for tile architecture
    MAINTAINERS: update arch/tile maintainer email domain
    tile kgdb: fix bug in copy to gdb regs, and optimize memset

    Linus Torvalds
     

26 Mar, 2016

5 commits

  • There are several reports of freeze on enabling HWP (Hardware PStates)
    feature on Skylake-based systems by the Intel P-states driver. The root
    cause is identified as the HWP interrupts causing BIOS code to freeze.

    HWP interrupts use the thermal LVT which can be handled by Linux
    natively, but on the affected Skylake-based systems SMM will respond
    to it by default. This is a problem for several reasons:
    - On the affected systems the SMM thermal LVT handler is broken (it
    will crash when invoked) and a BIOS update is necessary to fix it.
    - With thermal interrupt handled in SMM we lose all of the reporting
    features of the arch/x86/kernel/cpu/mcheck/therm_throt driver.
    - Some thermal drivers like x86-package-temp depend on the thermal
    threshold interrupts signaled via the thermal LVT.
    - The HWP interrupts are useful for debugging and tuning
    performance (if the kernel can handle them).
    The native handling of thermal interrupts needs to be enabled
    because of that.

    This requires some way to tell SMM that the OS can handle thermal
    interrupts. That can be done by using _OSC/_PDC in processor
    scope very early during ACPI initialization.

    The meaning of _OSC/_PDC bit 12 in processor scope is whether or
    not the OS supports native handling of interrupts for Collaborative
    Processor Performance Control (CPPC) notifications. Since on
    HWP-capable systems CPPC is a firmware interface to HWP, setting
    this bit effectively tells the firmware that the OS will handle
    thermal interrupts natively going forward.

    For details on _OSC/_PDC refer to:
    http://www.intel.com/content/www/us/en/standards/processor-vendor-specific-acpi-specification.html

    To implement the _OSC/_PDC handshake as described, introduce a new
    function, acpi_early_processor_osc(), that walks the ACPI
    namespace looking for ACPI processor objects and invokes _OSC for
    them with bit 12 in the capabilities buffer set and terminates the
    namespace walk on the first success.

    Also modify intel_thermal_interrupt() to clear HWP status bits in
    the HWP_STATUS MSR to acknowledge HWP interrupts (which prevents
    them from firing continuously).

    Signed-off-by: Srinivas Pandruvada
    [ rjw: Subject & changelog, function rename ]
    Signed-off-by: Rafael J. Wysocki

    Srinivas Pandruvada
     
  • Merge fourth patch-bomb from Andrew Morton:
    "A lot more stuff than expected, sorry. A bunch of ocfs2 reviewing was
    finished off.

    - mhocko's oom-reaper out-of-memory-handler changes

    - ocfs2 fixes and features

    - KASAN feature work

    - various fixes"

    * emailed patches from Andrew Morton : (42 commits)
    thp: fix typo in khugepaged_scan_pmd()
    MAINTAINERS: fill entries for KASAN
    mm/filemap: generic_file_read_iter(): check for zero reads unconditionally
    kasan: test fix: warn if the UAF could not be detected in kmalloc_uaf2
    mm, kasan: stackdepot implementation. Enable stackdepot for SLAB
    arch, ftrace: for KASAN put hard/soft IRQ entries into separate sections
    mm, kasan: add GFP flags to KASAN API
    mm, kasan: SLAB support
    kasan: modify kmalloc_large_oob_right(), add kmalloc_pagealloc_oob_right()
    include/linux/oom.h: remove undefined oom_kills_count()/note_oom_kill()
    mm/page_alloc: prevent merging between isolated and other pageblocks
    drivers/memstick/host/r592.c: avoid gcc-6 warning
    ocfs2: extend enough credits for freeing one truncate record while replaying truncate records
    ocfs2: extend transaction for ocfs2_remove_rightmost_path() and ocfs2_update_edge_lengths() before to avoid inconsistency between inode and et
    ocfs2/dlm: move lock to the tail of grant queue while doing in-place convert
    ocfs2: solve a problem of crossing the boundary in updating backups
    ocfs2: fix occurring deadlock by changing ocfs2_wq from global to local
    ocfs2/dlm: fix BUG in dlm_move_lockres_to_recovery_list
    ocfs2/dlm: fix race between convert and recovery
    ocfs2: fix a deadlock issue in ocfs2_dio_end_io_write()
    ...

    Linus Torvalds
     
  • Implement the stack depot and provide CONFIG_STACKDEPOT. Stack depot
    will allow KASAN store allocation/deallocation stack traces for memory
    chunks. The stack traces are stored in a hash table and referenced by
    handles which reside in the kasan_alloc_meta and kasan_free_meta
    structures in the allocated memory chunks.

    IRQ stack traces are cut below the IRQ entry point to avoid unnecessary
    duplication.

    Right now stackdepot support is only enabled in SLAB allocator. Once
    KASAN features in SLAB are on par with those in SLUB we can switch SLUB
    to stackdepot as well, thus removing the dependency on SLUB stack
    bookkeeping, which wastes a lot of memory.

    This patch is based on the "mm: kasan: stack depots" patch originally
    prepared by Dmitry Chernenkov.

    Joonsoo has said that he plans to reuse the stackdepot code for the
    mm/page_owner.c debugging facility.

    [akpm@linux-foundation.org: s/depot_stack_handle/depot_stack_handle_t]
    [aryabinin@virtuozzo.com: comment style fixes]
    Signed-off-by: Alexander Potapenko
    Signed-off-by: Andrey Ryabinin
    Cc: Christoph Lameter
    Cc: Pekka Enberg
    Cc: David Rientjes
    Cc: Joonsoo Kim
    Cc: Andrey Konovalov
    Cc: Dmitry Vyukov
    Cc: Steven Rostedt
    Cc: Konstantin Serebryany
    Cc: Dmitry Chernenkov
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Alexander Potapenko
     
  • KASAN needs to know whether the allocation happens in an IRQ handler.
    This lets us strip everything below the IRQ entry point to reduce the
    number of unique stack traces needed to be stored.

    Move the definition of __irq_entry to so that the
    users don't need to pull in . Also introduce the
    __softirq_entry macro which is similar to __irq_entry, but puts the
    corresponding functions to the .softirqentry.text section.

    Signed-off-by: Alexander Potapenko
    Acked-by: Steven Rostedt
    Cc: Christoph Lameter
    Cc: Pekka Enberg
    Cc: David Rientjes
    Cc: Joonsoo Kim
    Cc: Andrey Konovalov
    Cc: Dmitry Vyukov
    Cc: Andrey Ryabinin
    Cc: Konstantin Serebryany
    Cc: Dmitry Chernenkov
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Alexander Potapenko
     
  • New system calls added in:
    f17d8b35452cab31a70d224964cd583fb2845449
    vfs: vfs: Define new syscalls preadv2,pwritev2

    Signed-off-by: Tony Luck

    Tony Luck