17 Sep, 2019
5 commits
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The mailbox length is 0x1000 hence the max_register value is 0xFFC.
Fixes: c6a8b171ca8e ("mailbox: qcom: Convert APCS IPC driver to use
regmap")
Signed-off-by: Jorge Ramirez-Ortiz
Signed-off-by: Jassi Brar -
Add support of IPQ8074 with IPC register offset as 8.
Signed-off-by: Gokul Sriram Palanisamy
Signed-off-by: Sricharan R
Signed-off-by: Jassi Brar -
Add the corresponding APSS shared offset for SM8150 and SC7180 SoCs.
Reviewed-by: Bjorn Andersson
Signed-off-by: Sibi Sankar
Signed-off-by: Jassi Brar -
Use the correct macro when registering the platform device.
Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
Reviewed-by: Stephen Boyd
Signed-off-by: Jassi Brar -
There is clock controller functionality in the APCS hardware block of
qcs404 devices similar to msm8916.Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
Reviewed-by: Stephen Boyd
Signed-off-by: Jassi Brar
05 Jun, 2019
1 commit
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Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 and
only version 2 as published by the free software foundation this
program is distributed in the hope that it will be useful but
without any warranty without even the implied warranty of
merchantability or fitness for a particular purpose see the gnu
general public license for more detailsextracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 294 file(s).
Signed-off-by: Thomas Gleixner
Reviewed-by: Allison Randal
Reviewed-by: Alexios Zavras
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141900.825281744@linutronix.de
Signed-off-by: Greg Kroah-Hartman
22 Dec, 2018
1 commit
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Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.Reviewed-by: Bjorn Andersson
Signed-off-by: Thierry Reding
Signed-off-by: Jassi Brar
29 Sep, 2018
1 commit
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Add support for the QCS404 APPS Global block with IPC register at offset
8.Signed-off-by: Bjorn Andersson
Reviewed-by: Vinod Koul
Reviewed-by: Rob Herring
Signed-off-by: Jassi Brar
07 Jun, 2018
2 commits
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Add the corresponding APSS shared offset for SDM845 SoC
Signed-off-by: Sibi Sankar
Reviewed-by: Bjorn Andersson
Signed-off-by: Jassi Brar -
The Qualcomm MSM8998 platform has a APCS HMSS GLOBAL block, add the
compatible for this.Signed-off-by: Bjorn Andersson
Reviewed-by: Rob Herring
Signed-off-by: Jassi Brar
04 Feb, 2018
2 commits
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There is a clock controller functionality provided by the APCS hardware
block of msm8916 devices. The device-tree would represent an APCS node
with both mailbox and clock provider properties.
Create a platform child device for the clock controller functionality so
the driver can probe and use APCS as parent.Signed-off-by: Georgi Djakov
Acked-by: Bjorn Andersson
Signed-off-by: Jassi Brar -
This hardware block provides more functionalities that just IPC. Convert
it to regmap to allow other child platform devices to use the same regmap.Signed-off-by: Georgi Djakov
Acked-by: Bjorn Andersson
Signed-off-by: Jassi Brar
14 Jun, 2017
1 commit
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This implements a driver that exposes the IPC bits found in the APCS
Global block in various Qualcomm platforms. The bits are used to signal
inter-processor communication signals from the application CPU to other
masters.Signed-off-by: Bjorn Andersson
Signed-off-by: Jassi Brar