24 Nov, 2011

1 commit


27 Jul, 2011

1 commit


10 Jun, 2011

1 commit


04 Apr, 2011

1 commit

  • Only the e500v1/v2 cores have HID1[RXFE] so we should attempt to set or
    clear this register bit on them. Otherwise we get crashes like:

    NIP: c0579f84 LR: c006d550 CTR: c0579f84
    REGS: ef857ec0 TRAP: 0700 Not tainted (2.6.38.2-00072-gf15ba3c)
    MSR: 00021002 CR: 22044022 XER: 00000000
    TASK = ef8559c0[1] 'swapper' THREAD: ef856000 CPU: 0
    GPR00: c006d538 ef857f70 ef8559c0 00000000 00000004 00000000 00000000 00000000
    GPR08: c0590000 c30170a8 00000000 c30170a8 00000001 0fffe000 00000000 00000000
    GPR16: 00000000 7ffa0e60 00000000 00000000 7ffb0bd8 7ff3b844 c05be000 00000000
    GPR24: 00000000 00000000 c05c28b0 c0579fac 00000000 00029002 00000000 c0579f84
    NIP [c0579f84] mpc85xx_mc_clear_rfxe+0x0/0x28
    LR [c006d550] on_each_cpu+0x34/0x50
    Call Trace:
    [ef857f70] [c006d538] on_each_cpu+0x1c/0x50 (unreliable)
    [ef857f90] [c057a070] mpc85xx_mc_init+0xc4/0xdc
    [ef857fa0] [c0001cd4] do_one_initcall+0x34/0x1a8
    [ef857fd0] [c055d9d8] kernel_init+0x17c/0x218
    [ef857ff0] [c000cda4] kernel_thread+0x4c/0x68
    Instruction dump:
    40be0018 3c60c052 3863c70c 4be9baad 3be0ffed 4bd7c99d 80010014 7fe3fb78
    83e1000c 38210010 7c0803a6 4e800020 54290024 81290008
    3d60c06e
    Oops: Exception in kernel mode, sig: 4 [#2]
    ---[ end trace 49ff3b8f93efde1a ]---

    Also use the HID1_RFXE define rather than a magic number.

    Signed-off-by: Kumar Gala

    Kumar Gala
     

28 Feb, 2011

1 commit


13 Aug, 2010

1 commit


11 Aug, 2010

2 commits


06 Aug, 2010

1 commit

  • of_device is just an alias for platform_device, so remove it entirely. Also
    replace to_of_device() with to_platform_device() and update comment blocks.

    This patch was initially generated from the following semantic patch, and then
    edited by hand to pick up the bits that coccinelle didn't catch.

    @@
    @@
    -struct of_device
    +struct platform_device

    Signed-off-by: Grant Likely
    Reviewed-by: David S. Miller

    Grant Likely
     

28 Jul, 2010

1 commit

  • The MPC85xx EDAC driver is missing module device aliases, so the driver
    won't load automatically on boot. This patch fixes the issue by adding
    proper MODULE_DEVICE_TABLE() macros.

    Signed-off-by: Anton Vorontsov
    Cc: Doug Thompson
    Cc: Peter Tyser
    Cc: Dave Jiang
    Cc: Kumar Gala
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Anton Vorontsov
     

21 Jul, 2010

1 commit


03 Jun, 2010

1 commit


22 May, 2010

1 commit

  • .name, .match_table and .owner are duplicated in both of_platform_driver
    and device_driver. This patch is a removes the extra copies from struct
    of_platform_driver and converts all users to the device_driver members.

    This patch is a pretty mechanical change. The usage model doesn't change
    and if any drivers have been missed, or if anything has been fixed up
    incorrectly, then it will fail with a compile time error, and the fixup
    will be trivial. This patch looks big and scary because it touches so
    many files, but it should be pretty safe.

    Signed-off-by: Grant Likely
    Acked-by: Sean MacLennan

    Grant Likely
     

30 Mar, 2010

1 commit

  • …it slab.h inclusion from percpu.h

    percpu.h is included by sched.h and module.h and thus ends up being
    included when building most .c files. percpu.h includes slab.h which
    in turn includes gfp.h making everything defined by the two files
    universally available and complicating inclusion dependencies.

    percpu.h -> slab.h dependency is about to be removed. Prepare for
    this change by updating users of gfp and slab facilities include those
    headers directly instead of assuming availability. As this conversion
    needs to touch large number of source files, the following script is
    used as the basis of conversion.

    http://userweb.kernel.org/~tj/misc/slabh-sweep.py

    The script does the followings.

    * Scan files for gfp and slab usages and update includes such that
    only the necessary includes are there. ie. if only gfp is used,
    gfp.h, if slab is used, slab.h.

    * When the script inserts a new include, it looks at the include
    blocks and try to put the new include such that its order conforms
    to its surrounding. It's put in the include block which contains
    core kernel includes, in the same order that the rest are ordered -
    alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
    doesn't seem to be any matching order.

    * If the script can't find a place to put a new include (mostly
    because the file doesn't have fitting include block), it prints out
    an error message indicating which .h file needs to be added to the
    file.

    The conversion was done in the following steps.

    1. The initial automatic conversion of all .c files updated slightly
    over 4000 files, deleting around 700 includes and adding ~480 gfp.h
    and ~3000 slab.h inclusions. The script emitted errors for ~400
    files.

    2. Each error was manually checked. Some didn't need the inclusion,
    some needed manual addition while adding it to implementation .h or
    embedding .c file was more appropriate for others. This step added
    inclusions to around 150 files.

    3. The script was run again and the output was compared to the edits
    from #2 to make sure no file was left behind.

    4. Several build tests were done and a couple of problems were fixed.
    e.g. lib/decompress_*.c used malloc/free() wrappers around slab
    APIs requiring slab.h to be added manually.

    5. The script was run on all .h files but without automatically
    editing them as sprinkling gfp.h and slab.h inclusions around .h
    files could easily lead to inclusion dependency hell. Most gfp.h
    inclusion directives were ignored as stuff from gfp.h was usually
    wildly available and often used in preprocessor macros. Each
    slab.h inclusion directive was examined and added manually as
    necessary.

    6. percpu.h was updated not to include slab.h.

    7. Build test were done on the following configurations and failures
    were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
    distributed build env didn't work with gcov compiles) and a few
    more options had to be turned off depending on archs to make things
    build (like ipr on powerpc/64 which failed due to missing writeq).

    * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
    * powerpc and powerpc64 SMP allmodconfig
    * sparc and sparc64 SMP allmodconfig
    * ia64 SMP allmodconfig
    * s390 SMP allmodconfig
    * alpha SMP allmodconfig
    * um on x86_64 SMP allmodconfig

    8. percpu.h modifications were reverted so that it could be applied as
    a separate patch and serve as bisection point.

    Given the fact that I had only a couple of failures from tests on step
    6, I'm fairly confident about the coverage of this conversion patch.
    If there is a breakage, it's likely to be something in one of the arch
    headers which should be easily discoverable easily on most builds of
    the specific arch.

    Signed-off-by: Tejun Heo <tj@kernel.org>
    Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
    Cc: Ingo Molnar <mingo@redhat.com>
    Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>

    Tejun Heo
     

13 Mar, 2010

3 commits

  • Use resource_size() instead of arithmetic.

    Signed-off-by: H Hartley Sweeten
    Signed-off-by: Doug Thompson
    Acked-by: Dave Jiang
    Cc: Peter Tyser
    Cc: Kumar Gala
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    H Hartley Sweeten
     
  • Add the ability to detect the specific data line or ECC line which failed
    when printing out SDRAM single-bit errors. An example of a single-bit
    SDRAM ECC error is below:

    EDAC MPC85xx MC1: Err Detect Register: 0x80000004
    EDAC MPC85xx MC1: Faulty data bit: 59
    EDAC MPC85xx MC1: Expected Data / ECC: 0x7f80d000_409effa0 / 0x6d
    EDAC MPC85xx MC1: Captured Data / ECC: 0x7780d000_409effa0 / 0x6d
    EDAC MPC85xx MC1: Err addr: 0x00031ca0
    EDAC MPC85xx MC1: PFN: 0x00000031

    Knowning which specific data or ECC line caused an error can be useful in
    tracking down hardware issues such as improperly terminated signals, loose
    pins, etc.

    Note that this feature is only currently enabled for 64-bit wide data
    buses, 32-bit wide bus support should be added.

    I don't have any 32-bit wide systems to test on. If someone has one and
    is willing to give this patch a shot with the check for a 64-bit data bus
    removed it would be much appreciated and I can re-submit with both 32 and
    64 bit buses supported.

    Signed-off-by: Peter Tyser
    Signed-off-by: Doug Thompson
    Cc: Kumar Gala
    Cc: Dave Jiang
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Peter Tyser
     
  • With a 64-bit wide data bus only the lowest 8-bits of the ECC syndrome are
    relevant. With a 32-bit wide data bus only the lowest 16-bits are
    relevant on most architectures.

    Without this change, the ECC syndrome displayed can be mildly confusing,
    eg:

    EDAC MPC85xx MC1: syndrome: 0x25252525

    When in reality the ECC syndrome is 0x25.

    A variety of Freescale manuals say a variety of different things about how
    to decode the CAPTURE_ECC (syndrome) register. I don't have a system with
    a 32-bit bus to test on, but I believe the change is correct. It'd be
    good to get an ACK from someone at Freescale about this change though.

    Signed-off-by: Peter Tyser
    Signed-off-by: Doug Thompson
    Cc: Kumar Gala
    Cc: Dave Jiang
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Peter Tyser
     

12 Feb, 2010

2 commits

  • Some unused, unsupported debug code existed in the mpc85xx EDAC driver
    that resulted in a build failure when CONFIG_EDAC_DEBUG was defined:

    drivers/edac/mpc85xx_edac.c: In function 'mpc85xx_mc_err_probe':
    drivers/edac/mpc85xx_edac.c:1031: error: implicit declaration of function 'edac_mc_register_mcidev_debug'
    drivers/edac/mpc85xx_edac.c:1031: error: 'debug_attr' undeclared (first use in this function)
    drivers/edac/mpc85xx_edac.c:1031: error: (Each undeclared identifier is reported only once
    drivers/edac/mpc85xx_edac.c:1031: error: for each function it appears in.)

    Signed-off-by: Peter Tyser
    Signed-off-by: Doug Thompson
    Signed-off-by: Linus Torvalds

    Peter Tyser
     
  • Commit b4846251727a38a7f248e41308c060995371dd05 ("edac: mpc85xx add
    mpc83xx support") accidentally broke how a chip select's first and last
    page addresses are calculated. The page addresses are being shifted too
    far right by PAGE_SHIFT. This results in errors such as:

    EDAC MPC85xx MC1: Err addr: 0x003075c0
    EDAC MPC85xx MC1: PFN: 0x00000307
    EDAC MPC85xx MC1: PFN out of range!
    EDAC MC1: INTERNAL ERROR: row out of range (4 >= 4)
    EDAC MC1: CE - no information available: INTERNAL ERROR

    The vaule of PAGE_SHIFT is already being taken into consideration during
    the calculation of the 'start' and 'end' variables, thus it is not
    necessary to account for it again when setting a chip select's first and
    last page address.

    Signed-off-by: Peter Tyser
    Signed-off-by: Doug Thompson
    Cc: Ira W. Snyder
    Cc: Kumar Gala
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Peter Tyser
     

29 Oct, 2009

1 commit

  • When building without CONFIG_PCI the edac_pci_idx variable is unused,
    causing a build-time warning. Wrap the variable in #ifdef CONFIG_PCI,
    just like the rest of the PCI support.

    Signed-off-by: Ira W. Snyder
    Signed-off-by: Doug Thompson
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Ira W. Snyder
     

24 Sep, 2009

2 commits

  • Add support for the Freescale MPC83xx memory controller to the existing
    driver for the Freescale MPC85xx memory controller. The only difference
    between the two processors are in the CS_BNDS register parsing code, which
    has been changed so it will work on both processors.

    The L2 cache controller does not exist on the MPC83xx, but the OF
    subsystem will not use the driver if the device is not present in the OF
    device tree.

    I had to change the nr_pages calculation to make the math work out. I
    checked it on my board and did the math by hand for a 64GB 85xx using 64K
    pages. In both cases, nr_pages * PAGE_SIZE comes out to the correct
    value.

    Signed-off-by: Ira W. Snyder
    Signed-off-by: Doug Thompson
    Cc: Kumar Gala
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Ira W. Snyder
     
  • Based on Kumar's new compatible types patch, add P2020 into MPC85xx EDAC
    compatible lists so that EDAC can recognize P2020 meomry controller and L2
    cache controller and export the relevant fields to sysfs.

    EDAC MPC85xx DDR3 support is needed if DDR3 memory stick is installed on a
    P2020DS board so that EDAC core can recognize DDR3 memory type.

    Signed-off-by: Yang Shi
    Acked-by: Dave Jiang
    Signed-off-by: Doug Thompson
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Yang Shi
     

01 Jul, 2009

1 commit


22 Apr, 2009

1 commit

  • Error found by Jeff Haran.

    The error detect register is 0s when no errors are detected. The check
    code is incorrect, so reverse check sense.

    Reported-by: Jeff Haran
    Signed-off-by: Dave Jiang
    Signed-off-by: Doug Thompson
    Cc: Benjamin Herrenschmidt
    Acked-by: Kumar Gala
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Dave Jiang
     

25 Mar, 2009

1 commit


07 Jan, 2009

1 commit

  • All other compatibles that are uniquely identifying the processor use a
    prefix of the form fsl,mpc85...'. We add support for it so we can
    deprecate the older 'fsl,85...' that was improperly used here.

    Additionally added mpc8536 & mpc8560 to the compatible lists.

    This patch is based on Nate's 8572 patch.

    Signed-off-by: Kumar Gala
    Signed-off-by: Doug Thompson
    Acked-by: Dave Jiang
    Cc: Nate Case
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Kumar Gala
     

17 Oct, 2008

1 commit

  • This adds support for the dual-core MPC8572 processor. We have
    to support making SPR changes on each core. Also, since we can
    have multiple memory controllers sharing an interrupt, flag the
    interrupts with IRQF_SHARED.

    Signed-off-by: Andrew Kilkenny
    Signed-off-by: Nate Case
    Acked-by: Dave Jiang
    Signed-off-by: Doug Thompson
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Andrew Kilkenny
     

26 Jul, 2008

1 commit

  • Convert PCI err device from platform to open firmware of_dev to comply
    with powerpc schemes.

    [akpm@linux-foundation.org: coding-style fixes]
    Signed-off-by: Dave Jiang
    Signed-off-by: Doug Thompson
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Dave Jiang
     

25 May, 2008

1 commit

  • including of causes build problems since it doesn't exist.

    Also removed warning:
    drivers/edac/mpc85xx_edac.c:45: warning: 'mpc85xx_ctl_name' defined but not used

    Signed-off-by: Kumar Gala
    Acked-by: Doug Thompson
    Acked-by: Dave Jiang
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Kumar Gala
     

08 Feb, 2008

2 commits