12 Feb, 2019
6 commits
-
This patch fixes coverity issues as below:
1. resource leak
2. possible case of division by zero.Fix #1 by kfree the resource before return error;
Fix #2 by adding zero check before registering delay timer.Signed-off-by: Anson Huang
Reviewed-by: Bai Ping -
i.MX8QXP will use GPT timer as platform broadcast time for waking
up CPUs when cluster is off, GPT timer needs to be probed after
clock driver ready, and GPT suspend is at syscore suspend phase,
to make the clock & power management as well as GPT save/restore
easy, all these things are done in TF-A.Signed-off-by: Anson Huang
Acked-by: Leonard Crestez
Reviewed-by: Bai Ping -
On NXP i.MX8MQ SOC, it has system counter module for ARM
generic timer implementation. In this system counter module
it also has compare frame module to provide timer support.
So we can use it as an alternative clockevent device for
broadcast timer purpose when CPU core enter power down state
with local timer stopped.Signed-off-by: Bai Ping
Reviewed-by: Anson Huang -
Add i.MX6SLL GPT timer support.
Signed-off-by: Anson Huang
Signed-off-by: Bai Ping -
Add gpt-timer for i.MX6UL SOC.
Signed-off-by: Bai Ping
-
Add MSL support for new SoC i.MX7D.
Signed-off-by: Anson Huang
[Octavian: update upstream with minimal diff from mx_4.1.y to allow compile]
Signed-off-by: Octavian Purdila
26 Jan, 2019
1 commit
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[ Upstream commit 5eb73c831171115d3b4347e1e7124a5a35d8086c ]
The function of_find_node_by_path() acquires a reference to the node
returned by it and that reference needs to be dropped by its caller.integrator_ap_timer_init_of() doesn't do that. The pri_node and the
sec_node are used as an identifier to compare against the current
node, so we can directly drop the refcount after getting the node from
the path as it is not used as pointer.By dropping the refcount right after getting it, a single variable is
needed instead of two.Fix this by use a single variable and drop the refcount right after
of_find_node_by_path().Signed-off-by: Yangtao Li
Signed-off-by: Daniel Lezcano
Signed-off-by: Sasha Levin
21 Nov, 2018
1 commit
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commit 35b69a420bfb56b7b74cb635ea903db05e357bec upstream.
Add support for platforms where pit_shutdown() doesn't work because of a
quirk in the PIT emulation. On these platforms setting the counter register
to zero causes the PIT to start running again, negating the shutdown.Provide a global variable that controls whether the counter register is
zero'ed, which platform specific code can override.Signed-off-by: Michael Kelley
Signed-off-by: Thomas Gleixner
Cc: "gregkh@linuxfoundation.org"
Cc: "devel@linuxdriverproject.org"
Cc: "daniel.lezcano@linaro.org"
Cc: "virtualization@lists.linux-foundation.org"
Cc: "jgross@suse.com"
Cc: "akataria@vmware.com"
Cc: "olaf@aepfle.de"
Cc: "apw@canonical.com"
Cc: vkuznets
Cc: "jasowang@redhat.com"
Cc: "marcelo.cerri@canonical.com"
Cc: KY Srinivasan
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/1541303219-11142-2-git-send-email-mikelley@microsoft.com
Signed-off-by: Greg Kroah-Hartman
20 Oct, 2018
2 commits
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[ Upstream commit 4451d3f59f2a6f95e5d205c2d04ea072955d080d ]
Currently, the aspeed MATCH1 register is updated to in set_next_event handler, with the assumption that COUNT
register value is preserved when the timer is disabled and it continues
decrementing after the timer is enabled. But the assumption is wrong:
RELOAD register is loaded into COUNT register when the aspeed timer is
enabled, which means the next event may be delayed because timer
interrupt won't be generated until .The problem can be fixed by updating RELOAD register to , and
COUNT register will be re-loaded when the timer is enabled and interrupt
is generated when COUNT register overflows.The test result on Facebook Backpack-CMM BMC hardware (AST2500) shows
the issue is fixed: without the patch, usleep(100) suspends the process
for several milliseconds (and sometimes even over 40 milliseconds);
after applying the fix, usleep(100) takes averagely 240 microseconds to
return under the same workload level.Signed-off-by: Tao Ren
Reviewed-by: Linus Walleij
Tested-by: Lei YU
Signed-off-by: Daniel Lezcano
Signed-off-by: Sasha Levin
Signed-off-by: Greg Kroah-Hartman -
[ Upstream commit 3b7d96a0dbb6b630878597a1838fc39f808b761b ]
The 32k clocksource is NONSTOP for non-am43 SoCs. Hence
add the flag for all the other SoCs.Reported-by: Tony Lindgren
Signed-off-by: Keerthy
Acked-by: Tony Lindgren
Signed-off-by: Daniel Lezcano
Signed-off-by: Sasha Levin
Signed-off-by: Greg Kroah-Hartman
13 Oct, 2018
1 commit
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commit 52bf4a900d9cede3eb14982d0f2c5e6db6d97cc3 upstream.
The smatch utility reports a possible leak:
smatch warnings:
drivers/clocksource/timer-atmel-pit.c:183 at91sam926x_pit_dt_init() warn: possible memory leak of 'data'Ensure data is freed before exiting with an error.
Reported-by: Dan Carpenter
Signed-off-by: Alexandre Belloni
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Lezcano
Signed-off-by: Greg Kroah-Hartman
21 Jun, 2018
1 commit
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[ Upstream commit 506a7be93ff773d5d4cf75a59f342865605b4910 ]
According to i.MX7ULP reference manual, TPM_SC_CPWMS can ONLY be written when
counter is disabled, TPM_SC_TOF is write-1-clear, TPM_C0SC_CHF is also
write-1-clear, correct these registers initialization flow;Signed-off-by: Anson Huang
Signed-off-by: Daniel Lezcano
Signed-off-by: Sasha Levin
Signed-off-by: Greg Kroah-Hartman
30 May, 2018
2 commits
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[ Upstream commit 5753405e27f8fe4c42c1537d3ddbd9e058e54cdc ]
__gic_clocksource_init() extracts the GIC_CONFIG_COUNTBITS field from
read_gic_config() by right shifting the register value. The shift count is
determined by the most significant bit (__fls) of the bitmask which is
wrong as it shifts out the complete bitfield.Use the least significant bit (__ffs) instead to shift the bitfield down to
bit 0.Fixes: e07127a077c7 ("clocksource: mips-gic-timer: Use new GIC accessor functions")
Signed-off-by: Felix Fietkau
Signed-off-by: Thomas Gleixner
Cc: daniel.lezcano@linaro.org
Cc: paul.burton@imgtec.com
Link: https://lkml.kernel.org/r/20180228095610.50341-1-nbd@nbd.name
Signed-off-by: Sasha Levin
Signed-off-by: Greg Kroah-Hartman -
[ Upstream commit f287eb9013ccf199cbfa4eabd80c36fedfc15a73 ]
The error checks on freq for a negative error return always fails because
freq is unsigned and can never be negative. Fix this by making freq a
signed long.Detected with Coccinelle:
drivers/clocksource/fsl_ftm_timer.c:287:5-9: WARNING: Unsigned expression
compared with zero: freq
Signed-off-by: Thomas Gleixner
Cc: Daniel Lezcano
Cc: kernel-janitors@vger.kernel.org
Link: https://lkml.kernel.org/r/20180226113614.3092-1-colin.king@canonical.com
Signed-off-by: Sasha Levin
Signed-off-by: Greg Kroah-Hartman
26 Apr, 2018
1 commit
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commit 7407188489c62a7b5694bc75a6db2b82af94c9a5 upstream.
The additional brakects added to tpm_set_next_event's return value
computation causes (int) forced type conversion NOT taking effect, and the
incorrect value return will cause various system timer issue, like RCU
stall etc..Remove the additional brackets to make sure tpm_set_next_event always
returns correct value.Fixes: 059ab7b82eec ("clocksource/drivers/imx-tpm: Add imx tpm timer support")
Signed-off-by: Anson Huang
Signed-off-by: Thomas Gleixner
Acked-by: Dong Aisheng
Cc: stable@vger.kernel.org
Cc: daniel.lezcano@linaro.org
Cc: Linux-imx@nxp.com
Link: https://lkml.kernel.org/r/1524117883-2484-1-git-send-email-Anson.Huang@nxp.com
Signed-off-by: Greg Kroah-Hartman
17 Feb, 2018
1 commit
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commit e0aeca3d8cbaea514eb98df1149faa918f9ec42d upstream.
The current code hides a couple of bugs:
- The global variable 'clock_event_ddata' is overwritten each time the
init function is invoked.This is fixed with a kmemdup() instead of assigning the global variable. That
prevents a memory corruption when several timers are defined in the DT.- The clockevent's event_handler is NULL if the time framework does
not select the clockevent when registering it, this is fine but the init
code generates in any case an interrupt leading to dereference this
NULL pointer.The stm32 timer works with shadow registers, a mechanism to cache the
registers. When a change is done in one buffered register, we need to
artificially generate an event to force the timer to copy the content
of the register to the shadowed register.The auto-reload register (ARR) is one of the shadowed register as well as
the prescaler register (PSC), so in order to force the copy, we issue an
event which in turn leads to an interrupt and the NULL dereference.This is fixed by inverting two lines where we clear the status register
before enabling the update event interrupt.As this kernel crash is resulting from the combination of these two bugs,
the fixes are grouped into a single patch.Tested-by: Benjamin Gaignard
Signed-off-by: Daniel Lezcano
Acked-by: Benjamin Gaignard
Cc: Alexandre Torgue
Cc: Linus Torvalds
Cc: Maxime Coquelin
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/1515418139-23276-11-git-send-email-daniel.lezcano@linaro.org
Signed-off-by: Ingo Molnar
Signed-off-by: Greg Kroah-Hartman
10 Dec, 2017
1 commit
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[ Upstream commit 21492e1333a0d07af6968667f128e19088cf5ead ]
The ACPI GTDT code validates the CNTFRQ field of each MMIO timer
frame against the CNTFRQ system register of the current CPU, to
ensure that they are equal, which is mandated by the architecture.However, reading the CNTFRQ field of a frame is not possible until
the RFRQ bit in the frame's CNTACRn register is set, and doing so
before that willl produce the following error:arch_timer: [Firmware Bug]: CNTFRQ mismatch: frame @ 0x00000000e0be0000: (0x00000000), CPU: (0x0ee6b280)
arch_timer: Disabling MMIO timers due to CNTFRQ mismatch
arch_timer: Failed to initialize memory-mapped timer.The reason is that the CNTFRQ field is RES0 if access is not enabled.
So move the validation of CNTFRQ into the loop that iterates over the
timers to find the best frame, but defer it until after we have selected
the best frame, which should also have enabled the RFRQ bit.Signed-off-by: Ard Biesheuvel
Signed-off-by: Mark Rutland
Signed-off-by: Daniel Lezcano
Signed-off-by: Sasha Levin
Signed-off-by: Greg Kroah-Hartman
02 Nov, 2017
1 commit
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Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.By default all files without license information are under the default
license of the kernel, which is GPL version 2.Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if
Reviewed-by: Philippe Ombredanne
Reviewed-by: Thomas Gleixner
Signed-off-by: Greg Kroah-Hartman
20 Oct, 2017
1 commit
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The interrupt handler mfgpt_tick() is not robust versus spurious interrupts
which happen before the clock event device is registered and fully
initialized.The reason is that the safe guard against spurious interrupts solely checks
for the clockevents shutdown state, but lacks a check for detached
state. If the interrupt hits while the device is in detached state it
passes the safe guard and dereferences the event handler call back which is
NULL.Add the missing state check.
Fixes: 8f9327cbb6e8 ("clockevents/drivers/cs5535: Migrate to new 'set-state' interface")
Suggested-by: Thomas Gleixner
Signed-off-by: David Kozub
Signed-off-by: Thomas Gleixner
Cc: Daniel Lezcano
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20171020093103.3317F6004D@linux.fjfi.cvut.cz
25 Sep, 2017
1 commit
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Make this const as it is only used during a copy operation and add
__initconst as this usage is during the initialization phase.Signed-off-by: Bhumika Goyal
Signed-off-by: Thomas Gleixner
Cc: julia.lawall@lip6.fr
Cc: daniel.lezcano@linaro.org
Link: http://lkml.kernel.org/r/1504030631-10812-1-git-send-email-bhumirks@gmail.com
18 Sep, 2017
1 commit
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gcc-4.6 and older fail to inline integrator_clocksource_init, so they
end up showing a harmless warning:WARNING: vmlinux.o(.text+0x4aa94c): Section mismatch in reference from the function integrator_clocksource_init() to the function .init.text:clocksource_mmio_init()
The function integrator_clocksource_init() references
the function __init clocksource_mmio_init().
This is often because integrator_clocksource_init lacks a __init
annotation or the annotation of clocksource_mmio_init is wrong.Add the missing __init annotation that makes it build cleanly with all
compilers.Signed-off-by: Arnd Bergmann
Signed-off-by: Thomas Gleixner
Cc: Thierry Reding
Cc: Linus Walleij
Cc: Daniel Lezcano
Link: http://lkml.kernel.org/r/20170915194310.1170514-1-arnd@arndb.de
16 Sep, 2017
1 commit
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Pull MIPS updates from Ralf Baechle:
"This is the main pull request for 4.14 for MIPS; below a summary of
the non-merge commits:CM:
- Rename mips_cm_base to mips_gcr_base
- Specify register size when generating accessors
- Use BIT/GENMASK for register fields, order & drop shifts
- Add cluster & block args to mips_cm_lock_other()CPC:
- Use common CPS accessor generation macros
- Use BIT/GENMASK for register fields, order & drop shifts
- Introduce register modify (set/clear/change) accessors
- Use change_*, set_* & clear_* where appropriate
- Add CM/CPC 3.5 register definitions
- Use GlobalNumber macros rather than magic numbers
- Have asm/mips-cps.h include CM & CPC headers
- Cluster support for topology functions
- Detect CPUs in secondary clustersCPS:
- Read GIC_VL_IDENT directly, not via irqchip driverDMA:
- Consolidate coherent and non-coherent dma_alloc code
- Don't use dma_cache_sync to implement fd_cacheflushFPU emulation / FP assist code:
- Another series of 14 commits fixing corner cases such as NaN
propgagation and other special input values.
- Zero bits 32-63 of the result for a CLASS.D instruction.
- Enhanced statics via debugfs
- Do not use bools for arithmetic. GCC 7.1 moans about this.
- Correct user fault_addr typeGeneric MIPS:
- Enhancement of stack backtraces
- Cleanup from non-existing options
- Handle non word sized instructions when examining frame
- Fix detection and decoding of ADDIUSP instruction
- Fix decoding of SWSP16 instruction
- Refactor handling of stack pointer in get_frame_info
- Remove unreachable code from force_fcr31_sig()
- Convert to using %pOF instead of full_name
- Remove the R6000 support.
- Move FP code from *_switch.S to *_fpu.S
- Remove unused ST_OFF from r2300_switch.S
- Allow platform to specify multiple its.S files
- Add #includes to various files to ensure code builds reliable and
without warning..
- Remove __invalidate_kernel_vmap_range
- Remove plat_timer_setup
- Declare various variables & functions static
- Abstract CPU core & VP(E) ID access through accessor functions
- Store core & VP IDs in GlobalNumber-style variable
- Unify checks for sibling CPUs
- Add CPU cluster number accessors
- Prevent direct use of generic_defconfig
- Make CONFIG_MIPS_MT_SMP default y
- Add __ioread64_copy
- Remove unnecessary inclusions of linux/irqchip/mips-gic.hGIC:
- Introduce asm/mips-gic.h with accessor functions
- Use new GIC accessor functions in mips-gic-timer
- Remove counter access functions from irq-mips-gic.c
- Remove gic_read_local_vp_id() from irq-mips-gic.c
- Simplify shared interrupt pending/mask reads in irq-mips-gic.c
- Simplify gic_local_irq_domain_map() in irq-mips-gic.c
- Drop gic_(re)set_mask() functions in irq-mips-gic.c
- Remove gic_set_polarity(), gic_set_trigger(), gic_set_dual_edge(),
gic_map_to_pin() and gic_map_to_vpe() from irq-mips-gic.c.
- Convert remaining shared reg access, local int mask access and
remaining local reg access to new accessors
- Move GIC_LOCAL_INT_* to asm/mips-gic.h
- Remove GIC_CPU_INT* macros from irq-mips-gic.c
- Move various definitions to the driver
- Remove gic_get_usm_range()
- Remove __gic_irq_dispatch() forward declaration
- Remove gic_init()
- Use mips_gic_present() in place of gic_present and remove
gic_present
- Move gic_get_c0_*_int() to asm/mips-gic.h
- Remove linux/irqchip/mips-gic.h
- Inline __gic_init()
- Inline gic_basic_init()
- Make pcpu_masks a per-cpu variable
- Use pcpu_masks to avoid reading GIC_SH_MASK*
- Clean up mti, reserved-cpu-vectors handling
- Use cpumask_first_and() in gic_set_affinity()
- Let the core set struct irq_common_data affinitymicroMIPS:
- Fix microMIPS stack unwinding on big endian systemsMIPS-GIC:
- SYNC after enabling GIC regionNUMA:
- Remove the unused parent_node() macroR6:
- Constify r2_decoder_tables
- Add accessor & bit definitions for GlobalNumberSMP:
- Constify smp ops
- Allow boot_secondary SMP op to return errorsVDSO:
- Drop gic_get_usm_range() usage
- Avoid use of linux/irqchip/mips-gic.hPlatform changes:
Alchemy:
- Add devboard machine type to cpuinfo
- update cpu feature overrides
- Threaded carddetect irqs for devboardsAR7:
- allow NULL clock for clk_get_rateBCM63xx:
- Fix ENETDMA_6345_MAXBURST_REG offset
- Allow NULL clock for clk_get_rateCI20:
- Enable GPIO and RTC drivers in defconfig
- Add ethernet and fixed-regulator nodes to DTSGeneric platform:
- Move Boston and NI 169445 FIT image source to their own files
- Include asm/bootinfo.h for plat_fdt_relocated()
- Include asm/time.h for get_c0_*_int()
- Include asm/bootinfo.h for plat_fdt_relocated()
- Include asm/time.h for get_c0_*_int()
- Allow filtering enabled boards by requirements
- Don't explicitly disable CONFIG_USB_SUPPORT
- Bump default NR_CPUS to 16JZ4700:
- Probe the jz4740-rtc driver from devicetreeLantiq:
- Drop check of boot select from the spi-falcon driver.
- Drop check of boot select from the lantiq-flash MTD driver.
- Access boot cause register in the watchdog driver through regmap
- Add device tree binding documentation for the watchdog driver
- Add docs for the RCU DT bindings.
- Convert the fpi bus driver to a platform_driver
- Remove ltq_reset_cause() and ltq_boot_select(
- Switch to a proper reset driver
- Switch to a new drivers/soc GPHY driver
- Add an USB PHY driver for the Lantiq SoCs using the RCU module
- Use of_platform_default_populate instead of __dt_register_buses
- Enable MFD_SYSCON to be able to use it for the RCU MFD
- Replace ltq_boot_select() with dummy implementation.Loongson 2F:
- Allow NULL clock for clk_get_rateMalta:
- Use new GIC accessor functionsNI 169445:
- Add support for NI 169445 board.
- Only include in 32r2el kernelsOcteon:
- Add support for watchdog of 78XX SOCs.
- Add support for watchdog of CN68XX SOCs.
- Expose support for mips32r1, mips32r2 and mips64r1
- Enable more drivers in config file
- Add support for accessing the boot vector.
- Remove old boot vector code from watchdog driver
- Define watchdog registers for 70xx, 73xx, 78xx, F75xx.
- Make CSR functions node aware.
- Allow access to CIU3 IRQ domains.
- Misc cleanups in the watchdog driverOmega2+:
- New board, add support and defconfigPistachio:
- Enable Root FS on NFS in defconfigRalink:
- Add Mediatek MT7628A SoC
- Allow NULL clock for clk_get_rate
- Explicitly request exclusive reset control in the pci-mt7620 PCI driver.SEAD3:
- Only include in 32 bit kernels by defaultVoCore:
- Add VoCore as a vendor t0 dt-bindings
- Add defconfig file"* '4.14-features' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (167 commits)
MIPS: Refactor handling of stack pointer in get_frame_info
MIPS: Stacktrace: Fix microMIPS stack unwinding on big endian systems
MIPS: microMIPS: Fix decoding of swsp16 instruction
MIPS: microMIPS: Fix decoding of addiusp instruction
MIPS: microMIPS: Fix detection of addiusp instruction
MIPS: Handle non word sized instructions when examining frame
MIPS: ralink: allow NULL clock for clk_get_rate
MIPS: Loongson 2F: allow NULL clock for clk_get_rate
MIPS: BCM63XX: allow NULL clock for clk_get_rate
MIPS: AR7: allow NULL clock for clk_get_rate
MIPS: BCM63XX: fix ENETDMA_6345_MAXBURST_REG offset
mips: Save all registers when saving the frame
MIPS: Add DWARF unwinding to assembly
MIPS: Make SAVE_SOME more standard
MIPS: Fix issues in backtraces
MIPS: jz4780: DTS: Probe the jz4740-rtc driver from devicetree
MIPS: Ci20: Enable RTC driver
watchdog: octeon-wdt: Add support for 78XX SOCs.
watchdog: octeon-wdt: Add support for cn68XX SOCs.
watchdog: octeon-wdt: File cleaning.
...
05 Sep, 2017
1 commit
-
Pull timer fixes from Thomas Gleixner:
"A rather small update for the time(r) subsystem:- A new clocksource driver IMX-TPM
- Minor fixes to the alarmtimer facility
- Device tree cleanups for Renesas drivers
- A new kselftest and fixes for the timer related tests
- Conversion of the clocksource drivers to use %pOF
- Use the proper helpers to access rlimits in the posix-cpu-timer
code"* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
alarmtimer: Ensure RTC module is not unloaded
clocksource: Convert to using %pOF instead of full_name
clocksource/drivers/bcm2835: Remove message for a memory allocation failure
devicetree: bindings: Remove deprecated properties
devicetree: bindings: Remove unused 32-bit CMT bindings
devicetree: bindings: Deprecate property, update example
devicetree: bindings: r8a73a4 and R-Car Gen2 CMT bindings
devicetree: bindings: R-Car Gen2 CMT0 and CMT1 bindings
devicetree: bindings: Remove sh7372 CMT binding
clocksource/drivers/imx-tpm: Add imx tpm timer support
dt-bindings: timer: Add nxp tpm timer binding doc
posix-cpu-timers: Use dedicated helper to access rlimit values
alarmtimer: Fix unavailable wake-up source in sysfs
timekeeping: Use proper timekeeper for debug code
kselftests: timers: set-timer-lat: Add one-shot timer test cases
kselftests: timers: set-timer-lat: Tweak reporting when timer fires early
kselftests: timers: freq-step: Fix build warning
kselftests: timers: freq-step: Define ADJ_SETOFFSET if device has older kernel headers
31 Aug, 2017
1 commit
-
Now that we have a custom printf format specifier, convert users of
full_name to use %pOF instead. This is preparation to remove storing
of the full path string for each node.Signed-off-by: Rob Herring
Cc: Daniel Lezcano
Cc: Thomas Gleixner
Cc: Marc Gonzalez
Cc: Maxime Coquelin
Cc: Alexandre Torgue
Cc: linux-arm-kernel@lists.infradead.org
Acked-by: Marc Gonzalez
Acked-by: Alexandre TORGUE
Signed-off-by: Daniel Lezcano
30 Aug, 2017
1 commit
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Switch from calling functions exported by the GIC interrupt controller
to using new accessors provided by asm/mips-gic.h. This will allow the
counter-handling functionality to be removed from the interrupt
controller driver, where it doesn't really belong, and also allow for
inlining of the accesses to the GIC.Signed-off-by: Paul Burton
Acked-by: Thomas Gleixner
Cc: Daniel Lezcano
Cc: Jason Cooper
Cc: Marc Zyngier
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17021/
Signed-off-by: Ralf Baechle
29 Aug, 2017
2 commits
-
The bcm2835_timer_init() function emits an error message in case of a memory
allocation failure. This is pointless as the mm core does that already.Remove this message.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
Signed-off-by: Daniel Lezcano -
IMX Timer/PWM Module (TPM) supports both timer and pwm function while
this patch only adds the timer support. PWM would be added later.The TPM counter, compare and capture registers are clocked by an
asynchronous clock that can remain enabled in low power modes.NOTE: We observed in a very small probability, the bus fabric
contention between GPU and A7 may results a few cycles delay
of writing CNT registers which may cause the min_delta event got
missed, so we need add a ETIME check here in case it happened.Cc: Daniel Lezcano
Cc: Arnd Bergmann
Cc: Thomas Gleixner
Cc: Shawn Guo
Cc: Anson Huang
Cc: Bai Ping
Signed-off-by: Dong Aisheng
Signed-off-by: Daniel Lezcano
25 Aug, 2017
1 commit
-
Signed-off-by: Ingo Molnar
11 Aug, 2017
2 commits
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In v4.13, CLKSRC_PISTACHIO can select TIMER_OF on architectures without
GENERIC_CLOCKEVENTS, resulting in a struct clock_event_device missing
some required features and build breakage compiling timer_of.c. One of
the symbols selecting TIMER_OF is CLKSRC_PISTACHIO, so add the
dependency on GENERIC_CLOCKEVENTS.Thanks to kbuild test robot for finding this error
(https://lkml.org/lkml/2017/7/16/249)Signed-off-by: Matt Redfearn
Suggested-by: Ian Abbott
Signed-off-by: Daniel Lezcano -
The current code checks the return value of the of_io_request_and_map()
function as it was returning a NULL pointer in case of error.However, it returns an error code encoded in the pointer return value, not a
NULL value. Fix this by checking the returned pointer against IS_ERR() and
return the error with PTR_ERR().Signed-off-by: Dan Carpenter
Signed-off-by: Daniel Lezcano
10 Aug, 2017
3 commits
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Propagate the return values of platform_get_irq and devm_request_irq on
failure.Cc: Frans Klaver
Signed-off-by: Gustavo A. R. Silva
Signed-off-by: Daniel Lezcano -
The loop to find the best memory frame in arch_timer_mem_acpi_init()
initializes the loop counter with itself ('i = i'), which is suspicious
in the first place and pointed out by clang. The loop condition is
'i < timer_count' and a prior for loop exits when 'i' reaches
'timer_count', therefore the second loop is never executed.Initialize the loop counter with 0 to iterate over all timers, which
supposedly was the intention before the typo monster attacked.Fixes: c2743a36765d3 ("clocksource: arm_arch_timer: add GTDT support for memory-mapped timer")
Signed-off-by: Matthias Kaehlcke
Reported-by: Ard Biesheuvel
Acked-by: Mark Rutland
Signed-off-by: Daniel Lezcano -
Use the new static_branch_enable_cpuslocked() function to switch
the workaround static key on the CPU hotplug path.Signed-off-by: Marc Zyngier
Signed-off-by: Peter Zijlstra (Intel)
Cc: Leo Yan
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/20170801080257.5056-5-marc.zyngier@arm.com
Signed-off-by: Ingo Molnar
18 Jul, 2017
1 commit
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of_irq_get_byname() may return a negative error number as well as 0 on
failure, while timer_irq_init() only checks for 0, blithely continuing with
the call to request_[percpu_]irq() -- those functions expect *unsigned int*,
so would probably fail anyway when a large IRQ number resulting from a
conversion of a negative error number is passed to them... This, however,
is incorrect behavior -- error number is not IRQ number.Filter out the negative error numbers, complain, and return them to the
timer_irq_init()'s callers...Fixes: dc11bae78529 ("clocksource/drivers: Add timer-of common init routine")
Signed-off-by: Sergei Shtylyov
Signed-off-by: Thomas Gleixner
Cc: Daniel Lezcano
Link: http://lkml.kernel.org/r/20170717180114.678825147@cogentembedded.com
05 Jul, 2017
1 commit
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Pull ARM SoC driver updates from Arnd Bergmann:
"New SoC specific drivers:- NVIDIA Tegra PM Domain support for newer SoCs (Tegra186 and later)
based on the "BPMP" firmware- Clocksource and system controller drivers for the newly added
Action Semi platforms (both arm and arm64).Reset subsystem, merged through arm-soc by tradition:
- New drivers for Altera Stratix10, TI Keystone and Cortina Gemini
SoCs- Various subsystem-wide cleanups
Updates for existing SoC-specific drivers
- TI GPMC (General Purpose Memory Controller)
- Mediatek "scpsys" system controller support for MT6797
- Broadcom "brcmstb_gisb" bus arbitrer
- ARM SCPI firmware
- Renesas "SYSC" system controller
One more driver update was submitted for the Freescale/NXP DPAA data
path acceleration that has previously been used on PowerPC chips. I
ended up postponing the merge until some API questions for its unusual
MMIO access are resolved"* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (35 commits)
clocksource: owl: Add S900 support
clocksource: Add Owl timer
soc: renesas: rcar-sysc: Use GENPD_FLAG_ALWAYS_ON
firmware: tegra: Fix locking bugs in BPMP
soc/tegra: flowctrl: Fix error handling
soc/tegra: bpmp: Implement generic PM domains
soc/tegra: bpmp: Update ABI header
PM / Domains: Allow overriding the ->xlate() callback
soc: brcmstb: enable drivers for ARM64 and BMIPS
soc: renesas: Rework Kconfig and Makefile logic
reset: Add the TI SCI reset driver
dt-bindings: reset: Add TI SCI reset binding
reset: use kref for reference counting
soc: qcom: smsm: Improve error handling, quiesce probe deferral
cpufreq: scpi: use new scpi_ops functions to remove duplicate code
firmware: arm_scpi: add support to populate OPPs and get transition latency
dt-bindings: reset: Add reset manager offsets for Stratix10
memory: omap-gpmc: add error message if bank-width property is absent
memory: omap-gpmc: make dts snippet include semicolon
reset: Add a Gemini reset controller
...
27 Jun, 2017
5 commits
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'clk' is a valid pointer at this point. So calling PTR_ERR on it is
pointess.Return the error code from 'clk_prepare_enable()' if it fails instead.
Signed-off-by: Christophe JAILLET
Signed-off-by: Daniel Lezcano -
In case of error at init time, rollback iomapping.
Signed-off-by: Arvind Yadav
Signed-off-by: Daniel Lezcano -
Now that AVR32 is gone, we can use the proper IO accessors that are
correctly handling endianness.Signed-off-by: Alexandre Belloni
Acked-by: Nicolas Ferre
Signed-off-by: Daniel Lezcano -
Previously a framework to factor out the drivers init function has been
merged.Use this common framework in this driver, we get:
Before:
text data bss dec hex filename
1787 384 12 2183 887 drivers/clocksource/sun4i_timer.oAfter:
text data bss dec hex filename
1407 512 0 1919 77f drivers/clocksource/sun4i_timer.oSigned-off-by: Daniel Lezcano
Tested-by: Chen-Yu Tsai -
A typo in the code checks the return value of iomap against !NULL
and, thus, fails everytime the mapping succeed.Fix this by inverting the condition in the check.
Signed-off-by: Daniel Lezcano
