26 Jan, 2012
1 commit
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Remove NR_IRQS and add a per machine .nr_irqs setting. Clean-up namespace
replacing usage of IRQ_BOARD_START with MMP_NR_IRQS.Signed-off-by: Rob Herring
29 Mar, 2011
1 commit
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Convert to the new function names. Automated with coccinelle.
Signed-off-by: Thomas Gleixner
14 Jan, 2011
1 commit
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Signed-off-by: Lennert Buytenhek
05 Aug, 2010
1 commit
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Signed-off-by: Eric Miao
02 Mar, 2010
5 commits
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The irq_chip is not yet registered, so no default irq_chip.mask_ack(),
which we have to handle it correctly manually here.Signed-off-by: Haojian Zhuang
Signed-off-by: Eric Miao -
Since PMIC INT pin is a special pin of CPU, the status of PMIC INT pin needs
to be cleared after PMIC IRQ occured. Now append the clear operation in
irq chip handler.Signed-off-by: Haojian Zhuang
Signed-off-by: Eric Miao -
Signed-off-by: Haojian Zhuang
Signed-off-by: Eric Miao -
Signed-off-by: Haojian Zhuang
Signed-off-by: Eric Miao -
Marvell MMP2 (aka ARMADA610) is a SoC based on PJ4 core. It's
ARMv6 compatible. Support basic interrupt handler and timer,
and basic support for MMP2 based FLINT platform.Signed-off-by: Haojian Zhuang
Signed-off-by: Eric Miao