Eric Lee / smarc-fsl-linux-kernel

11 Jan, 2012

1 commit

08 Dec, 2011

2 commits

  • 8b5690f88   MIPS: irq: Remove IRQF_DISABLED ... Browse Code »

    Since commit [e58aa3d2: genirq: Run irq handlers with interrupts disabled],
    We run all interrupt handlers with interrupts disabled and we even check
    and yell when an interrupt handler returns with interrupts enabled (see
    commit [b738a50a: genirq: Warn when handler enables interrupts]).

    So now this flag is a NOOP and can be removed.

    [ralf@linux-mips.org: Fixed up conflicts in
    arch/mips/alchemy/common/dbdma.c, arch/mips/cavium-octeon/smp.c and
    arch/mips/kernel/perf_event.c.]

    Signed-off-by: Yong Zhang
    To: linux-kernel@vger.kernel.org
    Cc: tglx@linutronix.de
    linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2835/
    Signed-off-by: Ralf Baechle

    Yong Zhang
     
  • ab75dc02c   MIPS: Fix up inconsistency in panic() string argument. ... Browse Code »

    Panic() invokes printk() to add a \n internally, so panic arguments should
    not themselves end in \n. Panic invocations in arch/mips and elsewhere
    are inconsistently sometimes terminating in \n, sometimes not.

    Signed-off-by: Ralf Baechle

    Ralf Baechle
     

27 Jul, 2011

1 commit

  • 60063497a   atomic: use <linux/atomic.h> ... Browse Code »

    This allows us to move duplicated code in
    (atomic_inc_not_zero() for now) to

    Signed-off-by: Arun Sharma
    Reviewed-by: Eric Dumazet
    Cc: Ingo Molnar
    Cc: David Miller
    Cc: Eric Dumazet
    Acked-by: Mike Frysinger
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Arun Sharma
     

14 Apr, 2011

1 commit

  • 184748cc5   sched: Provide scheduler_ipi() callback in response to smp_send_reschedule() ... Browse Code »

    For future rework of try_to_wake_up() we'd like to push part of that
    function onto the CPU the task is actually going to run on.

    In order to do so we need a generic callback from the existing scheduler IPI.

    This patch introduces such a generic callback: scheduler_ipi() and
    implements it as a NOP.

    BenH notes: PowerPC might use this IPI on offline CPUs under rare conditions!

    Acked-by: Russell King
    Acked-by: Martin Schwidefsky
    Acked-by: Chris Metcalf
    Acked-by: Jesper Nilsson
    Acked-by: Benjamin Herrenschmidt
    Signed-off-by: Ralf Baechle
    Reviewed-by: Frank Rowand
    Cc: Mike Galbraith
    Cc: Nick Piggin
    Cc: Linus Torvalds
    Cc: Andrew Morton
    Signed-off-by: Ingo Molnar
    Signed-off-by: Peter Zijlstra
    Link: http://lkml.kernel.org/r/20110405152728.744338123@chello.nl

    Peter Zijlstra
     

29 Mar, 2011

1 commit

26 Mar, 2011

2 commits

07 Oct, 2010

1 commit

  • df9ee2927   Fix IRQ flag handling naming ... Browse Code »

    Fix the IRQ flag handling naming. In linux/irqflags.h under one configuration,
    it maps:

    local_irq_enable() -> raw_local_irq_enable()
    local_irq_disable() -> raw_local_irq_disable()
    local_irq_save() -> raw_local_irq_save()
    ...

    and under the other configuration, it maps:

    raw_local_irq_enable() -> local_irq_enable()
    raw_local_irq_disable() -> local_irq_disable()
    raw_local_irq_save() -> local_irq_save()
    ...

    This is quite confusing. There should be one set of names expected of the
    arch, and this should be wrapped to give another set of names that are expected
    by users of this facility.

    Change this to have the arch provide:

    flags = arch_local_save_flags()
    flags = arch_local_irq_save()
    arch_local_irq_restore(flags)
    arch_local_irq_disable()
    arch_local_irq_enable()
    arch_irqs_disabled_flags(flags)
    arch_irqs_disabled()
    arch_safe_halt()

    Then linux/irqflags.h wraps these to provide:

    raw_local_save_flags(flags)
    raw_local_irq_save(flags)
    raw_local_irq_restore(flags)
    raw_local_irq_disable()
    raw_local_irq_enable()
    raw_irqs_disabled_flags(flags)
    raw_irqs_disabled()
    raw_safe_halt()

    with type checking on the flags 'arguments', and then wraps those to provide:

    local_save_flags(flags)
    local_irq_save(flags)
    local_irq_restore(flags)
    local_irq_disable()
    local_irq_enable()
    irqs_disabled_flags(flags)
    irqs_disabled()
    safe_halt()

    with tracing included if enabled.

    The arch functions can now all be inline functions rather than some of them
    having to be macros.

    Signed-off-by: David Howells [X86, FRV, MN10300]
    Signed-off-by: Chris Metcalf [Tile]
    Signed-off-by: Michal Simek [Microblaze]
    Tested-by: Catalin Marinas [ARM]
    Acked-by: Thomas Gleixner
    Acked-by: Haavard Skinnemoen [AVR]
    Acked-by: Tony Luck [IA-64]
    Acked-by: Hirokazu Takata [M32R]
    Acked-by: Greg Ungerer [M68K/M68KNOMMU]
    Acked-by: Ralf Baechle [MIPS]
    Acked-by: Kyle McMartin [PA-RISC]
    Acked-by: Paul Mackerras [PowerPC]
    Acked-by: Martin Schwidefsky [S390]
    Acked-by: Chen Liqin [Score]
    Acked-by: Matt Fleming [SH]
    Acked-by: David S. Miller [Sparc]
    Acked-by: Chris Zankel [Xtensa]
    Reviewed-by: Richard Henderson [Alpha]
    Reviewed-by: Yoshinori Sato [H8300]
    Cc: starvik@axis.com [CRIS]
    Cc: jesper.nilsson@axis.com [CRIS]
    Cc: linux-cris-kernel@axis.com

    David Howells
     

05 Aug, 2010

1 commit

  • fa90c8729   MIPS: SMTC: Use %p to format pointers ... Browse Code »

    While at it, drop 0x prefix.

    Signed-off-by: Kulikov Vasiliy
    To: kernel-janitors@vger.kernel.org
    Cc: Chris Dearman
    Cc: "Robert P. J. Day"
    Cc: Rusty Russell
    Cc: André Goddard Rosa
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/1458/
    Signed-off-by: Ralf Baechle

    Kulikov Vasiliy
     

13 Apr, 2010

1 commit

30 Mar, 2010

1 commit

  • 5a0e3ad6a   include cleanup: Update gfp.h and slab.h includes to prepare for breaking implic… ... Browse Code »

    …it slab.h inclusion from percpu.h

    percpu.h is included by sched.h and module.h and thus ends up being
    included when building most .c files. percpu.h includes slab.h which
    in turn includes gfp.h making everything defined by the two files
    universally available and complicating inclusion dependencies.

    percpu.h -> slab.h dependency is about to be removed. Prepare for
    this change by updating users of gfp and slab facilities include those
    headers directly instead of assuming availability. As this conversion
    needs to touch large number of source files, the following script is
    used as the basis of conversion.

    http://userweb.kernel.org/~tj/misc/slabh-sweep.py

    The script does the followings.

    * Scan files for gfp and slab usages and update includes such that
    only the necessary includes are there. ie. if only gfp is used,
    gfp.h, if slab is used, slab.h.

    * When the script inserts a new include, it looks at the include
    blocks and try to put the new include such that its order conforms
    to its surrounding. It's put in the include block which contains
    core kernel includes, in the same order that the rest are ordered -
    alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
    doesn't seem to be any matching order.

    * If the script can't find a place to put a new include (mostly
    because the file doesn't have fitting include block), it prints out
    an error message indicating which .h file needs to be added to the
    file.

    The conversion was done in the following steps.

    1. The initial automatic conversion of all .c files updated slightly
    over 4000 files, deleting around 700 includes and adding ~480 gfp.h
    and ~3000 slab.h inclusions. The script emitted errors for ~400
    files.

    2. Each error was manually checked. Some didn't need the inclusion,
    some needed manual addition while adding it to implementation .h or
    embedding .c file was more appropriate for others. This step added
    inclusions to around 150 files.

    3. The script was run again and the output was compared to the edits
    from #2 to make sure no file was left behind.

    4. Several build tests were done and a couple of problems were fixed.
    e.g. lib/decompress_*.c used malloc/free() wrappers around slab
    APIs requiring slab.h to be added manually.

    5. The script was run on all .h files but without automatically
    editing them as sprinkling gfp.h and slab.h inclusions around .h
    files could easily lead to inclusion dependency hell. Most gfp.h
    inclusion directives were ignored as stuff from gfp.h was usually
    wildly available and often used in preprocessor macros. Each
    slab.h inclusion directive was examined and added manually as
    necessary.

    6. percpu.h was updated not to include slab.h.

    7. Build test were done on the following configurations and failures
    were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
    distributed build env didn't work with gcov compiles) and a few
    more options had to be turned off depending on archs to make things
    build (like ipr on powerpc/64 which failed due to missing writeq).

    * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
    * powerpc and powerpc64 SMP allmodconfig
    * sparc and sparc64 SMP allmodconfig
    * ia64 SMP allmodconfig
    * s390 SMP allmodconfig
    * alpha SMP allmodconfig
    * um on x86_64 SMP allmodconfig

    8. percpu.h modifications were reverted so that it could be applied as
    a separate patch and serve as bisection point.

    Given the fact that I had only a couple of failures from tests on step
    6, I'm fairly confident about the coverage of this conversion patch.
    If there is a breakage, it's likely to be something in one of the arch
    headers which should be easily discoverable easily on most builds of
    the specific arch.

    Signed-off-by: Tejun Heo <tj@kernel.org>
    Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
    Cc: Ingo Molnar <mingo@redhat.com>
    Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>

    Tejun Heo
     

17 Dec, 2009

1 commit

  • 8f99a1626   MIPS: Tracing: Add IRQENTRY_EXIT section for MIPS ... Browse Code »

    This patch add a new section for MIPS to record the block of the hardirq
    handling for function graph tracer(print_graph_irq) via adding the
    __irq_entry annotation to the the entrypoints of the hardirqs(the block
    with irq_enter()...irq_exit()).

    Thanks goes to Steven & Frederic Weisbecker for their feedbacks.

    Signed-off-by: Wu Zhangjin
    Cc: Steven Rostedt
    Cc: Nicholas Mc Guire
    Cc: zhangfx@lemote.com
    Cc: Wu Zhangjin
    Cc: Ingo Molnar
    Cc: Thomas Gleixner
    Cc: Frederic Weisbecker
    Cc: linux-kernel@vger.kernel.org
    Cc: linux-mips@linux-mips.org
    Reviewed-by: Frederic Weisbecker
    Patchwork: http://patchwork.linux-mips.org/patch/676/
    Signed-off-by: Ralf Baechle

    Wu Zhangjin
     

04 Dec, 2009

1 commit

  • af901ca18   tree-wide: fix assorted typos all over the place ... Browse Code »

    That is "success", "unknown", "through", "performance", "[re|un]mapping"
    , "access", "default", "reasonable", "[con]currently", "temperature"
    , "channel", "[un]used", "application", "example","hierarchy", "therefore"
    , "[over|under]flow", "contiguous", "threshold", "enough" and others.

    Signed-off-by: André Goddard Rosa
    Signed-off-by: Jiri Kosina

    André Goddard Rosa
     

02 Nov, 2009

1 commit

01 Oct, 2009

1 commit

  • b26515839   MIPS: SMTC: Remove duplicate structure field initialization ... Browse Code »

    The definition of the irq_ipi structure has two initializations of the
    flags field. This combines them.

    [Ralf: The issue was originally introduced by commit
    be4894196d79455f420dd7bb78be7dc73bec115c (linux-mips.org) rsp.
    033890b084adfa367c544864451d7730552ce8bf (kernel.org). The original
    intention of the code was to initialize .flags with both flags ored together.
    The broken C code as actually implemented will be compiled by an equally
    broken gcc to use only the last initialization, that is IRQF_PERCPU
    which means this turned into an SMTC bug for 2.6.23 and newer.]

    The semantic match that finds this problem is as follows:
    (http://coccinelle.lip6.fr/)

    //
    @r@
    identifier I, s, fld;
    position p0,p;
    expression E;
    @@

    struct I s =@p0 { ... .fld@p = E, ...};

    @s@
    identifier I, s, r.fld;
    position r.p0,p;
    expression E;
    @@

    struct I s =@p0 { ... .fld@p = E, ...};

    @script:python@
    p0 << r.p0;
    fld << r.fld;
    ps << s.p;
    pr << r.p;
    @@

    if int(ps[0].line)!=int(pr[0].line) or int(ps[0].column)!=int(pr[0].column):
    cocci.print_main(fld,p0)
    //

    Signed-off-by: Julia Lawall
    Signed-off-by: Ralf Baechle

    Julia Lawall
     

24 Sep, 2009

1 commit

18 Sep, 2009

1 commit

04 Aug, 2009

1 commit

25 Jun, 2009

1 commit

17 Jun, 2009

1 commit

15 Jan, 2009

1 commit

  • d2287f5eb   irq: update all arches for new irq_desc, fix ... Browse Code »

    Impact: fix build errors

    Since the SPARSE IRQS changes redefined how the kstat irqs are
    organized, arch's must use the new accessor function:

    kstat_incr_irqs_this_cpu(irq, DESC);

    If CONFIG_SPARSE_IRQS is set, then DESC is a pointer to the
    irq_desc which has a pointer to the kstat_irqs. If not, then
    the .irqs field of struct kernel_stat is used instead.

    Signed-off-by: Mike Travis
    Signed-off-by: Ingo Molnar

    Mike Travis
     

13 Jan, 2009

1 commit

13 Dec, 2008

1 commit

  • 98a79d6a5   cpumask: centralize cpu_online_map and cpu_possible_map ... Browse Code »

    Impact: cleanup

    Each SMP arch defines these themselves. Move them to a central
    location.

    Twists:
    1) Some archs (m32, parisc, s390) set possible_map to all 1, so we add a
    CONFIG_INIT_ALL_POSSIBLE for this rather than break them.

    2) mips and sparc32 '#define cpu_possible_map phys_cpu_present_map'.
    Those archs simply have phys_cpu_present_map replaced everywhere.

    3) Alpha defined cpu_possible_map to cpu_present_map; this is tricky
    so I just manipulate them both in sync.

    4) IA64, cris and m32r have gratuitous 'extern cpumask_t cpu_possible_map'
    declarations.

    Signed-off-by: Rusty Russell
    Reviewed-by: Grant Grundler
    Tested-by: Tony Luck
    Acked-by: Ingo Molnar
    Cc: Mike Travis
    Cc: ink@jurassic.park.msu.ru
    Cc: rmk@arm.linux.org.uk
    Cc: starvik@axis.com
    Cc: tony.luck@intel.com
    Cc: takata@linux-m32r.org
    Cc: ralf@linux-mips.org
    Cc: grundler@parisc-linux.org
    Cc: paulus@samba.org
    Cc: schwidefsky@de.ibm.com
    Cc: lethal@linux-sh.org
    Cc: wli@holomorphy.com
    Cc: davem@davemloft.net
    Cc: jdike@addtoit.com
    Cc: mingo@redhat.com

    Rusty Russell
     

04 Oct, 2008

3 commits

26 Jun, 2008

1 commit

  • 2f304c0a0   mips: convert to generic helpers for IPI function calls ... Browse Code »

    This converts mips to use the new helpers for smp_call_function() and
    friends, and adds support for smp_call_function_single(). Not tested,
    but it compiles.

    mips shares the same IPI for smp_call_function() and
    smp_call_function_single(), since not all mips platforms have enough
    available IPIs to support seperate setups.

    Cc: Ralf Baechle
    Signed-off-by: Jens Axboe

    Jens Axboe
     

29 Apr, 2008

2 commits

03 Feb, 2008

1 commit

29 Jan, 2008

1 commit

30 Oct, 2007

1 commit

  • be5f1f211   [MIPS] SMTC: Allow control over TC assignment to vpe0. ... Browse Code »

    Modify the SMTC initialization code to allow boot-time specification not
    only of how many VPEs and TCs to use, but also how many TCs out of the
    allowed pool are to be bound to VPE 0. The new boot option is "vpe0tcs=N",
    where N is an integer. Using it in combination with the existing options
    allows arbitrary assignments across the 2 VPEs of a 34K. e.g. "maxtcs=3
    vpe0tcs=1" forces VPE0 to have 1 TC, while VPE1 has 2, and "maxtcs=4
    vpe0tcs=3" forces VPE0 to have 3 TCs, while VPE1 gets 1. If no vpe0tcs
    option is specified, the traditional algorithm of evenly dividing TCs
    between available VPEs, with the odd "slop" going to VPE0, is retained.

    The reason for doing this is to allow a finer balancing of TCs which can
    handle I/O interrupts on Malta (those on VPE 0) and those which cannot.

    Signed-off-by: Ralf Baechle

    Kevin D. Kissell
     

12 Oct, 2007

7 commits