11 Jan, 2012
1 commit
08 Dec, 2011
2 commits
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Since commit [e58aa3d2: genirq: Run irq handlers with interrupts disabled],
We run all interrupt handlers with interrupts disabled and we even check
and yell when an interrupt handler returns with interrupts enabled (see
commit [b738a50a: genirq: Warn when handler enables interrupts]).So now this flag is a NOOP and can be removed.
[ralf@linux-mips.org: Fixed up conflicts in
arch/mips/alchemy/common/dbdma.c, arch/mips/cavium-octeon/smp.c and
arch/mips/kernel/perf_event.c.]Signed-off-by: Yong Zhang
To: linux-kernel@vger.kernel.org
Cc: tglx@linutronix.de
linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2835/
Signed-off-by: Ralf Baechle -
Panic() invokes printk() to add a \n internally, so panic arguments should
not themselves end in \n. Panic invocations in arch/mips and elsewhere
are inconsistently sometimes terminating in \n, sometimes not.Signed-off-by: Ralf Baechle
14 Nov, 2011
1 commit
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The code located at arch/mips/lantiq/ included module.h to be able to use
the EXPORT_SYMBOL* macros. These can now be directly included using
export.h.Signed-off-by: John Crispin
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2937/
Signed-off-by: Ralf Baechle
21 Sep, 2011
1 commit
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The irq base offset needs to be ignored when matching irqs to external
interrupt pins. Taking the offset into account resulted in the EIU not
being brought up properly.Signed-off-by: John Crispin
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2616/
Signed-off-by: Ralf Baechle
17 Sep, 2011
1 commit
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It was pointed out by 'make versioncheck' that some includes of
linux/version.h are not needed in arch/mips/.
This patch removes them.Signed-off-by: Jesper Juhl
To: LKML
Cc: trivial@kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2540/
Signed-off-by: Ralf Baechle
27 Jul, 2011
1 commit
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* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (31 commits)
MIPS: Close races in TLB modify handlers.
MIPS: Add uasm UASM_i_SRL_SAFE macro.
MIPS: RB532: Use hex_to_bin()
MIPS: Enable cpu_has_clo_clz for MIPS Technologies' platforms
MIPS: PowerTV: Provide cpu-feature-overrides.h
MIPS: Remove pointless return statement from empty void functions.
MIPS: Limit fixrange_init() to the FIXMAP region
MIPS: Install handlers for software IRQs
MIPS: Move FIXADDR_TOP into spaces.h
MIPS: Add SYNC after cacheflush
MIPS: pfn_valid() is broken on low memory HIGHMEM systems
MIPS: HIGHMEM DMA on noncoherent MIPS32 processors
MIPS: topdown mmap support
MIPS: Remove redundant addr_limit assignment on exec.
MIPS: AR7: Replace __attribute__((__packed__)) with __packed
MIPS: AR7: Remove 'space before tabs' in platform.c
MIPS: Lantiq: Add missing clk_enable and clk_disable functions.
MIPS: AR7: Fix trailing semicolon bug in clock.c
MAINTAINERS: Update MIPS entry.
MIPS: BCM63xx: Remove duplicate PERF_IRQSTAT_REG definition
...
21 Jul, 2011
1 commit
-
Signed-of-by: John Crispin
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2465/
Signed-off-by: Ralf Baechle
20 Jun, 2011
1 commit
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Many stupid corrections of duplicated includes based on the output of
scripts/checkincludes.pl.Signed-off-by: Vitaliy Ivanov
Signed-off-by: Jiri Kosina
19 May, 2011
9 commits
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Register the etop platform device inside the machtype specific init code.
Signed-off-by: John Crispin
Signed-off-by: Ralph Hempel
Signed-off-by: David Daney
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2356/
Patchwork: https://patchwork.linux-mips.org/patch/2370/
Signed-off-by: Ralf Baechle -
This patch adds the driver for the ETOP Packet Processing Engine (PPE32)
found inside the XWAY family of Lantiq MIPS SoCs. This driver makes 100MBit
ethernet work. Support for all 8 dma channels, gbit and the embedded switch
found on the ar9/vr9 still needs to be implemented.Signed-off-by: John Crispin
Signed-off-by: Ralph Hempel
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2357/
Acked-by: David S. Miller
Signed-off-by: Ralf Baechle -
This patch adds support for the DMA engine found inside the XWAY family of
SoCs. The engine has 5 ports and 20 channels.Signed-off-by: John Crispin
Signed-off-by: Ralph Hempel
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2355/
Signed-off-by: Ralf Baechle -
The XWAY family allows to extend the number of gpios by using shift
registers or latches. This patch adds the 2 drivers needed for this. The
extended gpios are output only.[ralf@linux-mips.org: Fixed ltq_stp_probe section() attributes.]
Signed-off-by: John Crispin
Signed-off-by: Ralph Hempel
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2258/
Signed-off-by: Ralf Baechle -
This patch adds mach specific code for the Lantiq EASY50712/50601 evaluation
boardsSigned-off-by: John Crispin
Signed-off-by: Ralph Hempel
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2255/
Patchwork: https://patchwork.linux-mips.org/patch/2361/
Signed-off-by: Ralf Baechle -
This patch adds support for Gabor's mips_machine patch.
Signed-off-by: John Crispin
Signed-off-by: Ralph Hempel
Cc: Gabor Juhos
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2251/
Patchwork: https://patchwork.linux-mips.org/patch/2358/
Signed-off-by: Ralf Baechle -
This patch adds the wrappers for registering our platform devices.
Signed-off-by: John Crispin
Signed-off-by: Ralph Hempel
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2254/
Patchwork: https://patchwork.linux-mips.org/patch/2360/
Patchwork: https://patchwork.linux-mips.org/patch/2359/
Signed-off-by: Ralf Baechle -
Add support for the Lantiq XWAY family of Mips24KEc SoCs.
* Danube (PSB50702)
* Twinpass (PSB4000)
* AR9 (PSB50802)
* Amazon SE (PSB5061)The Amazon SE is a lightweight SoC and has no PCI as well as a different
clock. We split the code out into seperate files to handle this.The GPIO pins on the SoCs are multi function and there are several bits
we can use to configure the pins. To be as compatible as possible to
GPIOLIB we add a functionint lq_gpio_request(unsigned int pin, unsigned int alt0,
unsigned int alt1, unsigned int dir, const char *name);which lets you configure the 2 "alternate function" bits. This way drivers like
PCI can make use of GPIOLIB without a cubersome wrapper.The PLL code inside arch/mips/lantiq/xway/clk-xway.c is voodoo to me. It was
taken from a 2.4.20 source tree and was never really changed by me since then.Signed-off-by: John Crispin
Signed-off-by: Ralph Hempel
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2249/
Signed-off-by: Ralf Baechle -
Add initial support for Mips based SoCs made by Lantiq. This series will add
support for the XWAY family.The series allows booting a minimal system using a initramfs or NOR. Missing
drivers and support for Amazon and GPON family will be provided in a later
series.[Ralf: Remove some cargo cult programming and fixed formatting.]
Signed-off-by: John Crispin
Signed-off-by: Ralph Hempel
Signed-off-by: David Daney
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2252/
Patchwork: https://patchwork.linux-mips.org/patch/2371/
Signed-off-by: Ralf Baechle