10 Apr, 2020

1 commit


08 Apr, 2020

1 commit


04 Apr, 2020

1 commit

  • Pull ARM SoC updates from Arnd Bergmann:
    "The code changes are mostly for 32-bit platforms and include:

    - Lots of updates for the Nvidia Tegra platform, including cpuidle,
    pmc, and dt-binding changes

    - Microchip at91 power management updates for the recently added
    sam9x60 SoC

    - Treewide setup_irq deprecation by afzal mohammed

    - STMicroelectronics stm32 gains earlycon support

    - Renesas platforms with Cortex-A9 can now use the global timer

    - Some TI OMAP2+ platforms gain cpuidle support

    - Various cleanups for the i.MX6 and Orion platforms, as well as
    Kconfig files across all platforms"

    * tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (75 commits)
    ARM: qcom: Add support for IPQ40xx
    ARM: mmp: replace setup_irq() by request_irq()
    ARM: cns3xxx: replace setup_irq() by request_irq()
    ARM: spear: replace setup_irq() by request_irq()
    ARM: ep93xx: Replace setup_irq() by request_irq()
    ARM: iop32x: replace setup_irq() by request_irq()
    arm: mach-dove: Mark dove_io_desc as __maybe_unused
    ARM: orion: replace setup_irq() by request_irq()
    ARM: debug: stm32: add UART early console support for STM32MP1
    ARM: debug: stm32: add UART early console support for STM32H7
    ARM: debug: stm32: add UART early console configuration for STM32F7
    ARM: debug: stm32: add UART early console configuration for STM32F4
    cpuidle: tegra: Disable CC6 state if LP2 unavailable
    cpuidle: tegra: Squash Tegra114 driver into the common driver
    cpuidle: tegra: Squash Tegra30 driver into the common driver
    cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidle
    ARM: tegra: cpuidle: Remove unnecessary memory barrier
    ARM: tegra: cpuidle: Make abort_flag atomic
    ARM: tegra: cpuidle: Handle case where secondary CPU hangs on entering LP2
    ARM: tegra: Make outer_disable() open-coded
    ...

    Linus Torvalds
     

30 Mar, 2020

2 commits

  • * pm-core:
    PM: runtime: Add pm_runtime_get_if_active()

    * pm-sleep:
    PM: sleep: wakeup: Skip wakeup_source_sysfs_remove() if device is not there
    PM / hibernate: Remove unnecessary compat ioctl overrides
    PM: hibernate: fix docs for ioctls that return loff_t via pointer
    PM: sleep: wakeup: Use built-in RCU list checking
    PM: sleep: core: Use built-in RCU list checking

    * pm-acpi:
    ACPI: PM: s2idle: Refine active GPEs check
    ACPICA: Allow acpi_any_gpe_status_set() to skip one GPE
    ACPI: PM: s2idle: Fix comment in acpi_s2idle_prepare_late()

    * pm-domains:
    cpuidle: psci: Split psci_dt_cpu_init_idle()
    PM / Domains: Allow no domain-idle-states DT property in genpd when parsing

    Rafael J. Wysocki
     
  • * pm-cpuidle:
    cpuidle: haltpoll: allow force loading on hosts without the REALTIME hint
    intel_idle: Update copyright notice, known limitations and version
    intel_idle: Define CPUIDLE_FLAG_TLB_FLUSHED as BIT(16)
    intel_idle: Clean up kerneldoc comments for multiple functions
    intel_idle: Reorder declarations of static variables
    intel_idle: Annotate init time data structures
    intel_idle: Add __initdata annotations to init time variables
    intel_idle: Relocate definitions of cpuidle callbacks
    intel_idle: Clean up definitions of cpuidle callbacks
    intel_idle: Simplify LAPIC timer reliability checks

    Rafael J. Wysocki
     

14 Mar, 2020

2 commits

  • To make the code a bit more readable, let's move the OSI specific
    initialization out of the psci_dt_cpu_init_idle() and into a separate
    function.

    Reviewed-by: Sudeep Holla
    Signed-off-by: Ulf Hansson
    Signed-off-by: Rafael J. Wysocki

    Ulf Hansson
     
  • Before commit 1328edca4a14 ("cpuidle-haltpoll: Enable kvm guest polling
    when dedicated physical CPUs are available") the cpuidle-haltpoll driver
    could also be used in scenarios when the host does not advertise the
    KVM_HINTS_REALTIME hint.

    While the behavior introduced by the aforementioned commit makes sense as
    the default there are cases where the old behavior is desired, for example,
    when other kernel changes triggered by presence by this hint are unwanted,
    for some workloads where the latency benefit from polling overweights the
    loss from idle CPU capacity that otherwise would be available, or just when
    running under older Qemu versions that lack this hint.

    Let's provide a typical "force" module parameter that allows restoring the
    old behavior.

    Signed-off-by: Maciej S. Szmigiero
    Reviewed-by: Marcelo Tosatti
    Signed-off-by: Rafael J. Wysocki

    Maciej S. Szmigiero
     

13 Mar, 2020

4 commits

  • LP2 suspending could be unavailable, for example if it is disabled in a
    device-tree. CC6 cpuidle state won't work in that case.

    Acked-by: Peter De Schrijver
    Acked-by: Daniel Lezcano
    Signed-off-by: Dmitry Osipenko
    Signed-off-by: Thierry Reding

    Dmitry Osipenko
     
  • Tegra20/30/114/124 SoCs have common idling states, thus there is no much
    point in having separate drivers for a similar hardware. This patch moves
    Tegra114/124 arch/ drivers into the common driver without any functional
    changes. The CC6 state is kept disabled on Tegra114/124 because the core
    Tegra PM code needs some more work in order to support that state.

    Acked-by: Peter De Schrijver
    Signed-off-by: Dmitry Osipenko
    Acked-by: Daniel Lezcano
    Signed-off-by: Thierry Reding

    Dmitry Osipenko
     
  • Tegra20 and Terga30 SoCs have common C1 and CC6 idling states and thus
    share the same code paths, there is no point in having separate drivers
    for a similar hardware. This patch merely moves functionality of the old
    driver into the new, although the CC6 state is kept disabled for now since
    old driver had a rudimentary support for this state (allowing to enter
    into CC6 only when secondary CPUs are put offline), while new driver can
    provide a full-featured support. The new feature will be enabled by
    another patch.

    Acked-by: Peter De Schrijver
    Tested-by: Peter Geis
    Tested-by: Jasper Korten
    Tested-by: David Heidelberg
    Tested-by: Nicolas Chauvet
    Acked-by: Daniel Lezcano
    Signed-off-by: Dmitry Osipenko
    Signed-off-by: Thierry Reding

    Dmitry Osipenko
     
  • The driver's code is refactored in a way that will make it easy to
    support Tegra30/114/124 SoCs by this unified driver later on. The
    current functionality is equal to the old Tegra20 driver, only the
    code's structure changed a tad. This is also a proper platform driver
    now.

    Acked-by: Peter De Schrijver
    Signed-off-by: Dmitry Osipenko
    Acked-by: Daniel Lezcano
    Signed-off-by: Thierry Reding

    Dmitry Osipenko
     

13 Feb, 2020

2 commits

  • Call cpu_latency_qos_limit() instead of pm_qos_request(), because the
    latter is going to be dropped.

    No intentional functional impact.

    Signed-off-by: Rafael J. Wysocki
    Reviewed-by: Ulf Hansson
    Reviewed-by: Amit Kucheria
    Tested-by: Amit Kucheria

    Rafael J. Wysocki
     
  • Notice that pm_qos_remove_notifier() is not used at all and the only
    caller of pm_qos_add_notifier() is the cpuidle core, which only needs
    the PM_QOS_CPU_DMA_LATENCY notifier to invoke wake_up_all_idle_cpus()
    upon changes of the PM_QOS_CPU_DMA_LATENCY target value.

    First, to ensure that wake_up_all_idle_cpus() will be called
    whenever the PM_QOS_CPU_DMA_LATENCY target value changes, modify the
    pm_qos_add/update/remove_request() family of functions to check if
    the effective constraint for the PM_QOS_CPU_DMA_LATENCY has changed
    and call wake_up_all_idle_cpus() directly in that case.

    Next, drop the PM_QOS_CPU_DMA_LATENCY notifier from cpuidle as it is
    not necessary any more.

    Finally, drop both pm_qos_add_notifier() and pm_qos_remove_notifier(),
    as they have no callers now, along with cpu_dma_lat_notifier which is
    only used by them.

    Signed-off-by: Rafael J. Wysocki
    Reviewed-by: Ulf Hansson
    Reviewed-by: Amit Kucheria
    Tested-by: Amit Kucheria

    Rafael J. Wysocki
     

09 Feb, 2020

1 commit

  • Pull ARM SoC-related driver updates from Olof Johansson:
    "Various driver updates for platforms:

    - Nvidia: Fuse support for Tegra194, continued memory controller
    pieces for Tegra30

    - NXP/FSL: Refactorings of QuickEngine drivers to support
    ARM/ARM64/PPC

    - NXP/FSL: i.MX8MP SoC driver pieces

    - TI Keystone: ring accelerator driver

    - Qualcomm: SCM driver cleanup/refactoring + support for new SoCs.

    - Xilinx ZynqMP: feature checking interface for firmware. Mailbox
    communication for power management

    - Overall support patch set for cpuidle on more complex hierarchies
    (PSCI-based)

    and misc cleanups, refactorings of Marvell, TI, other platforms"

    * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (166 commits)
    drivers: soc: xilinx: Use mailbox IPI callback
    dt-bindings: power: reset: xilinx: Add bindings for ipi mailbox
    drivers: soc: ti: knav_qmss_queue: Pass lockdep expression to RCU lists
    MAINTAINERS: Add brcmstb PCIe controller entry
    soc/tegra: fuse: Unmap registers once they are not needed anymore
    soc/tegra: fuse: Correct straps' address for older Tegra124 device trees
    soc/tegra: fuse: Warn if straps are not ready
    soc/tegra: fuse: Cache values of straps and Chip ID registers
    memory: tegra30-emc: Correct error message for timed out auto calibration
    memory: tegra30-emc: Firm up hardware programming sequence
    memory: tegra30-emc: Firm up suspend/resume sequence
    soc/tegra: regulators: Do nothing if voltage is unchanged
    memory: tegra: Correct reset value of xusb_hostr
    soc/tegra: fuse: Add APB DMA dependency for Tegra20
    bus: tegra-aconnect: Remove PM_CLK dependency
    dt-bindings: mediatek: add MT6765 power dt-bindings
    soc: mediatek: cmdq: delete not used define
    memory: tegra: Add support for the Tegra194 memory controller
    memory: tegra: Only include support for enabled SoCs
    memory: tegra: Support DVFS on Tegra186 and later
    ...

    Linus Torvalds
     

23 Jan, 2020

4 commits

  • Merge changes updating the ACPI processor driver in order to export
    acpi_processor_evaluate_cst() to the code outside of it and adding
    ACPI support to the intel_idle driver based on that.

    * intel_idle+acpi:
    Documentation: admin-guide: PM: Add intel_idle document
    intel_idle: Use ACPI _CST on server systems
    intel_idle: Add module parameter to prevent ACPI _CST from being used
    intel_idle: Allow ACPI _CST to be used for selected known processors
    cpuidle: Allow idle states to be disabled by default
    intel_idle: Use ACPI _CST for processor models without C-state tables
    intel_idle: Refactor intel_idle_cpuidle_driver_init()
    ACPI: processor: Export acpi_processor_evaluate_cst()
    ACPI: processor: Make ACPI_PROCESSOR_CSTATE depend on ACPI_PROCESSOR
    ACPI: processor: Clean up acpi_processor_evaluate_cst()
    ACPI: processor: Introduce acpi_processor_evaluate_cst()
    ACPI: processor: Export function to claim _CST control

    Rafael J. Wysocki
     
  • Fix cpuidle_find_deepest_state() kernel documentation to avoid
    warnings when compiling with W=1.

    Signed-off-by: Benjamin Gaignard
    Acked-by: Randy Dunlap
    Signed-off-by: Rafael J. Wysocki

    Benjamin Gaignard
     
  • Fix kernel documentation comments to remove warnings when
    compiling with W=1.

    Signed-off-by: Benjamin Gaignard
    Signed-off-by: Rafael J. Wysocki

    Benjamin Gaignard
     
  • Fix warnings that show up when compiling with W=1

    Signed-off-by: Benjamin Gaignard
    Signed-off-by: Rafael J. Wysocki

    Benjamin Gaignard
     

17 Jan, 2020

1 commit


15 Jan, 2020

1 commit


13 Jan, 2020

1 commit


09 Jan, 2020

1 commit


02 Jan, 2020

10 commits

  • When the hierarchical CPU topology layout is used in DT and the PSCI OSI
    mode is supported by the PSCI FW, let's initialize a corresponding PM
    domain topology by using genpd. This enables a CPU and a group of CPUs,
    when attached to the topology, to be power-managed accordingly.

    To trigger the attempt to initialize the genpd data structures let's use a
    subsys_initcall, which should be early enough to allow CPUs, but also other
    devices to be attached.

    The initialization consists of parsing the PSCI OF node for the topology
    and the "domain idle states" DT bindings. In case the idle states are
    compatible with "domain-idle-state", the initialized genpd becomes
    responsible of selecting an idle state for the PM domain, via assigning it
    a genpd governor.

    Note that, a successful initialization of the genpd data structures, is
    followed by a call to psci_set_osi_mode(), as to try to enable the OSI mode
    in the PSCI FW. In case this fails, we fall back into a degraded mode
    rather than bailing out and returning error codes.

    Co-developed-by: Lina Iyer
    Signed-off-by: Lina Iyer
    Signed-off-by: Ulf Hansson
    Reviewed-by: Sudeep Holla
    Acked-by: Rafael J. Wysocki

    Ulf Hansson
     
  • When the hierarchical CPU topology is used and when a CPU is put offline,
    that CPU prevents its PM domain from being powered off, which is because
    genpd observes the corresponding attached device as being active from a
    runtime PM point of view. Furthermore, any potential master PM domains are
    also prevented from being powered off.

    To address this limitation, let's add add a new CPU hotplug state
    (CPUHP_AP_CPU_PM_STARTING) and register up/down callbacks for it, which
    allows us to deal with runtime PM accordingly.

    Signed-off-by: Ulf Hansson
    Reviewed-by: Sudeep Holla
    Acked-by: Rafael J. Wysocki

    Ulf Hansson
     
  • In case we have succeeded to attach a CPU to its PM domain, let's deploy
    runtime PM support for the corresponding attached device, to allow the CPU
    to be powered-managed accordingly.

    The triggering point for when runtime PM reference counting should be done,
    has been selected to the deepest idle state for the CPU. However, from the
    hierarchical point view, there may be good reasons to do runtime PM
    reference counting even on shallower idle states, but at this point this
    isn't supported, mainly due to limitations set by the generic PM domain.

    Signed-off-by: Ulf Hansson
    Reviewed-by: Sudeep Holla
    Acked-by: Rafael J. Wysocki

    Ulf Hansson
     
  • The per CPU variable psci_power_state, contains an array of fixed values,
    which reflects the corresponding arm,psci-suspend-param parsed from DT, for
    each of the available CPU idle states.

    This isn't sufficient when using the hierarchical CPU topology in DT, in
    combination with having PSCI OS initiated (OSI) mode enabled. More
    precisely, in OSI mode, Linux is responsible of telling the PSCI FW what
    idle state the cluster (a group of CPUs) should enter, while in PSCI
    Platform Coordinated (PC) mode, each CPU independently votes for an idle
    state of the cluster.

    For this reason, introduce a per CPU variable called domain_state and
    implement two helper functions to read/write its value. Then let the
    domain_state take precedence over the regular selected state, when entering
    and idle state.

    To avoid executing the above OSI specific code in the ->enter() callback,
    while operating in the default PSCI Platform Coordinated mode, let's also
    add a new enter-function and use it for OSI.

    Co-developed-by: Lina Iyer
    Signed-off-by: Lina Iyer
    Signed-off-by: Ulf Hansson
    Reviewed-by: Sudeep Holla
    Acked-by: Rafael J. Wysocki

    Ulf Hansson
     
  • In order to enable a CPU to be power managed through its PM domain, let's
    try to attach it by calling psci_dt_attach_cpu() during the cpuidle
    initialization.

    psci_dt_attach_cpu() returns a pointer to the attached struct device, which
    later should be used for runtime PM, hence we need to store it somewhere.
    Rather than adding yet another per CPU variable, let's create a per CPU
    struct to collect the relevant per CPU variables.

    Signed-off-by: Ulf Hansson
    Reviewed-by: Sudeep Holla
    Acked-by: Rafael J. Wysocki

    Ulf Hansson
     
  • Introduce a PSCI DT helper function, psci_dt_attach_cpu(), which takes a
    CPU number as an in-parameter and tries to attach the CPU's struct device
    to its corresponding PM domain.

    Let's makes use of dev_pm_domain_attach_by_name(), as it allows us to
    specify "psci" as the "name" of the PM domain to attach to. Additionally,
    let's also prepare the attached device to be power managed via runtime PM.

    Note that, the implementation of the new helper function is in a new
    separate c-file, which may seems a bit too much at this point. However,
    subsequent changes that implements the remaining part of the PM domain
    support for cpuidle-psci, helps to justify this split.

    Signed-off-by: Ulf Hansson
    Reviewed-by: Sudeep Holla
    Acked-by: Rafael J. Wysocki

    Ulf Hansson
     
  • Currently CPU's idle states are represented using the flattened model.
    Let's add support for the hierarchical layout, via converting to use
    of_get_cpu_state_node().

    Signed-off-by: Ulf Hansson
    Reviewed-by: Sudeep Holla
    Acked-by: Rafael J. Wysocki

    Ulf Hansson
     
  • Iterating through the idle state nodes in DT, to find out the number of
    states that needs to be allocated is unnecessary, as it has already been
    done from dt_init_idle_driver(). Therefore, drop the iteration and use the
    number we already have at hand.

    Signed-off-by: Ulf Hansson
    Reviewed-by: Sudeep Holla
    Acked-by: Rafael J. Wysocki

    Ulf Hansson
     
  • Currently CPU's idle states are represented using the flattened model.
    Let's add support for the hierarchical layout, via converting to use
    of_get_cpu_state_node().

    Suggested-by: Sudeep Holla
    Signed-off-by: Lina Iyer
    Reviewed-by: Daniel Lezcano
    Co-developed-by: Ulf Hansson
    Signed-off-by: Ulf Hansson
    Reviewed-by: Sudeep Holla
    Acked-by: Rafael J. Wysocki

    Lina Iyer
     
  • Instead of allocating 'n-1' states in psci_power_state to manage 'n'
    idle states which include "ARM WFI" state, it would be simpler to have
    1:1 mapping between psci_power_state and cpuidle driver states.

    ARM WFI state(i.e. idx == 0) is handled specially in the generic macro
    CPU_PM_CPU_IDLE_ENTER_PARAM and hence state[-1] is not possible. However
    for sake of code readability, it is better to have 1:1 mapping and not
    use [idx - 1] to access psci_power_state corresponding to driver cpuidle
    state for idx.

    psci_power_state[0] is default initialised to 0 and is never accessed
    while entering WFI state.

    Reported-by: Ulf Hansson
    Signed-off-by: Sudeep Holla
    Reviewed-by: Ulf Hansson
    Acked-by: Rafael J. Wysocki

    Sudeep Holla
     

27 Dec, 2019

1 commit

  • In certain situations it may be useful to prevent some idle states
    from being used by default while allowing user space to enable them
    later on.

    For this purpose, introduce a new state flag, CPUIDLE_FLAG_OFF, to
    mark idle states that should be disabled by default, make the core
    set CPUIDLE_STATE_DISABLED_BY_USER for those states at the
    initialization time and add a new state attribute in sysfs,
    "default_status", to inform user space of the initial status of
    the given idle state ("disabled" if CPUIDLE_FLAG_OFF is set for it,
    "enabled" otherwise).

    Signed-off-by: Rafael J. Wysocki

    Rafael J. Wysocki
     

20 Dec, 2019

2 commits


13 Dec, 2019

1 commit


11 Dec, 2019

1 commit

  • It turns out that cpuidle_driver_state_disabled() can be called
    before registering the cpufreq driver on some platforms, which
    was not expected when it was introduced and which leads to a NULL
    pointer dereference when trying to walk the CPUs associated with
    the given cpuidle driver.

    Fix the problem by making cpuidle_driver_state_disabled() check if
    the driver's mask of CPUs associated with it is present and to set
    CPUIDLE_FLAG_UNUSABLE for the given idle state in the driver's states
    list if that is not the case to cause __cpuidle_register_device() to
    set CPUIDLE_STATE_DISABLED_BY_DRIVER for that state for all cpuidle
    devices registered by it later.

    Fixes: cbda56d5fefc ("cpuidle: Introduce cpuidle_driver_state_disabled() for driver quirks")
    Reported-by: Daniel Lezcano
    Tested-by: Daniel Lezcano
    Signed-off-by: Rafael J. Wysocki

    Rafael J. Wysocki
     

09 Dec, 2019

1 commit

  • Commit 259231a04561 ("cpuidle: add poll_limit_ns to cpuidle_device
    structure") changed, by mistake, the target residency from the first
    available sleep state to the last available sleep state (which should
    be longer).

    This might cause excessive polling.

    Fixes: 259231a04561 ("cpuidle: add poll_limit_ns to cpuidle_device structure")
    Signed-off-by: Marcelo Tosatti
    Cc: 5.4+ # 5.4+
    Signed-off-by: Rafael J. Wysocki

    Marcelo Tosatti
     

29 Nov, 2019

2 commits

  • End sentences in help text with a period (aka full stop).

    Signed-off-by: Randy Dunlap
    Signed-off-by: Rafael J. Wysocki

    Randy Dunlap
     
  • After recent cpuidle updates the "disabled" field in struct
    cpuidle_state is only used by two drivers (intel_idle and shmobile
    cpuidle) for marking unusable idle states, but that may as well be
    achieved with the help of a state flag, so define an "unusable" idle
    state flag, CPUIDLE_FLAG_UNUSABLE, make the drivers in question use
    it instead of the "disabled" field and make the core set
    CPUIDLE_STATE_DISABLED_BY_DRIVER for the idle states with that flag
    set.

    After the above changes, the "disabled" field in struct cpuidle_state
    is not used any more, so drop it.

    No intentional functional impact.

    Signed-off-by: Rafael J. Wysocki

    Rafael J. Wysocki