09 Jun, 2017
1 commit
-
The current min_delta for TPM clock event is 2 ticks which
is too small. As the TPM is running at 3MHz, 2 ticks equal
2/3 us. According to our testing, the interrupt latency will
be longer than this min_delta, especially when GPU is running.This patch changed the min_delta to 300 which give the system
around 100us for interrupt handling in case the "set_next_event"
call is interrupted by other signals.Also a simple validation code is added before the function returns.
Signed-off-by: Shenwei Wang
Signed-off-by: Bai Ping
(cherry picked from commit 4f882165cc31672f3c98de74ab02b757cb96ad26)
08 Jun, 2017
3 commits
-
arch/arm/mach-imx/time.c has been moved to a new location upstream but
during the rebase process from 4.1 to 4.9 it was reintroduced in
error.This patch removes the old file and updates the new file with changes
from commit 67000df ("MLK-13303-7 ARM: imx: add gpt timer support for
i.mx6sll").Note that commit 4c4769ba1cb5c0f1 ("MLK-12627-01 ARM: imx: add
i.mx6ull msl support") does not introduce changes to the new
implementation since imx6ull DTSs use "fsl,imx6ul-gpt" for compatible
properties.Signed-off-by: Octavian Purdila
-
As TPM default clock parent is changed to OSC which is 24MHz,
to keep its frequency as 3MHz, need to update its divider
from 16 to 8.Signed-off-by: Anson Huang
-
Add i.MX TPM support for clock source.
Signed-off-by: Anson Huang
Signed-off-by: Bai Ping
23 Feb, 2017
2 commits
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Add gpt-timer for i.MX6UL SOC.
Signed-off-by: Bai Ping
-
Add MSL support for new SoC i.MX7D.
Signed-off-by: Anson Huang
[Octavian: update upstream with minimal diff from mx_4.1.y to allow compile]
Signed-off-by: Octavian Purdila
26 Jan, 2017
1 commit
-
commit bc7c36eedb0c7004aa06c2afc3c5385adada8fa3 upstream.
When a CPU goes offline a potentially pending timer interrupt is not
cleared. When the CPU comes online again then the pending interrupt is
delivered before the per cpu clockevent device is initialized. As a
consequence the tick interrupt handler dereferences a NULL pointer.[ 51.251378] Unable to handle kernel NULL pointer dereference at virtual address 00000040
[ 51.289348] task: ee942d00 task.stack: ee960000
[ 51.293861] PC is at tick_periodic+0x38/0xb0
[ 51.298102] LR is at tick_handle_periodic+0x1c/0x90Clear the pending interrupt in the cpu dying path.
Fixes: 56a94f13919c ("clocksource: exynos_mct: Avoid blocking calls in the cpu hotplug notifier")
Reported-by: Seung-Woo Kim
Signed-off-by: Joonyoung Shim
Cc: linux-samsung-soc@vger.kernel.org
Cc: cw00.choi@samsung.com
Cc: daniel.lezcano@linaro.org
Cc: javier@osg.samsung.com
Cc: kgene@kernel.org
Cc: krzk@kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1484628876-22065-1-git-send-email-jy0922.shim@samsung.com
Signed-off-by: Thomas Gleixner
Signed-off-by: Greg Kroah-Hartman
21 Oct, 2016
2 commits
-
struct clocksource is also used by the clk notifier callback, to
unregister and re-register the clocksource with a different clock rate.
clocksource_mmio_init does not pass back a pointer to the struct used,
and the clk notifier callback assumes that the struct clocksource in
struct sun5i_timer_clksrc is valid. This results in a kernel NULL
pointer dereference when the hstimer clock is changed:Unable to handle kernel NULL pointer dereference at virtual address 00000004
[] (clocksource_unbind) from [] (clocksource_unregister+0x2c/0x44)
[] (clocksource_unregister) from [] (sun5i_rate_cb_clksrc+0x34/0x3c)
[] (sun5i_rate_cb_clksrc) from [] (notifier_call_chain+0x44/0x84)
[] (notifier_call_chain) from [] (__srcu_notifier_call_chain+0x44/0x60)
[] (__srcu_notifier_call_chain) from [] (srcu_notifier_call_chain+0x18/0x20)
[] (srcu_notifier_call_chain) from [] (__clk_notify+0x70/0x7c)
[] (__clk_notify) from [] (clk_propagate_rate_change+0xa4/0xc4)
[] (clk_propagate_rate_change) from [] (clk_propagate_rate_change+0x6c/0xc4)Revert the commit for now. clocksource_mmio_init can be made to pass back
a pointer, but the code churn and usage of an inner struct might not be
worth it.Fixes: 157dfadef832 ("clocksource/drivers/timer_sun5i: Replace code by clocksource_mmio_init")
Reported-by: Maxime Ripard
Signed-off-by: Chen-Yu Tsai
Cc: linux-sunxi@googlegroups.com
Cc: Daniel Lezcano
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/20161018054918.26855-1-wens@csie.org
Signed-off-by: Thomas Gleixner -
At the hardware level, the J-Core PIT is integrated with the interrupt
controller, but it is represented as its own device and has an
independent programming interface. It provides a 12-bit countdown
timer, which is not presently used, and a periodic timer. The interval
length for the latter is programmable via a 32-bit throttle register
whose units are determined by a bus-period register. The periodic
timer is used to implement both periodic and oneshot clock event
modes; in oneshot mode the interrupt handler simply disables the timer
as soon as it fires.Despite its device tree node representing an interrupt for the PIT,
the actual irq generated is programmable, not hard-wired. The driver
is responsible for programming the PIT to generate the hardware irq
number that the DT assigns to it.On SMP configurations, J-Core provides cpu-local instances of the PIT;
no broadcast timer is needed. This driver supports the creation of the
necessary per-cpu clock_event_device instances.A nanosecond-resolution clocksource is provided using the J-Core "RTC"
registers, which give a 64-bit seconds count and 32-bit nanoseconds
that wrap every second. The driver converts these to a full-range
32-bit nanoseconds count.Signed-off-by: Rich Felker
Cc: Mark Rutland
Cc: devicetree@vger.kernel.org
Cc: linux-sh@vger.kernel.org
Cc: Daniel Lezcano
Cc: Rob Herring
Link: http://lkml.kernel.org/r/b591ff12cc5ebf63d1edc98da26046f95a233814.1476393790.git.dalias@libc.org
Signed-off-by: Thomas Gleixner
08 Oct, 2016
1 commit
-
Pull ARM SoC driver updates from Arnd Bergmann:
"Driver updates for ARM SoCs, including a couple of newly added
drivers:- The Qualcomm external bus interface 2 (EBI2), used in some of their
mobile phone chips for connecting flash memory, LCD displays or
other peripherals- Secure monitor firmware for Amlogic SoCs, and an NVMEM driver for
the EFUSE based on that firmware interface.- Perf support for the AppliedMicro X-Gene performance monitor unit
- Reset driver for STMicroelectronics STM32
- Reset driver for SocioNext UniPhier SoCs
Aside from these, there are minor updates to SoC-specific bus,
clocksource, firmware, pinctrl, reset, rtc and pmic drivers"* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits)
bus: qcom-ebi2: depend on HAS_IOMEM
pinctrl: mvebu: orion5x: Generalise mv88f5181l support for 88f5181
clk: mvebu: Add clk support for the orion5x SoC mv88f5181
dt-bindings: EXYNOS: Add Exynos5433 PMU compatible
clocksource: exynos_mct: Add the support for ARM64
perf: xgene: Add APM X-Gene SoC Performance Monitoring Unit driver
Documentation: Add documentation for APM X-Gene SoC PMU DTS binding
MAINTAINERS: Add entry for APM X-Gene SoC PMU driver
bus: qcom: add EBI2 driver
bus: qcom: add EBI2 device tree bindings
rtc: rtc-pm8xxx: Add support for pm8018 rtc
nvmem: amlogic: Add Amlogic Meson EFUSE driver
firmware: Amlogic: Add secure monitor driver
soc: qcom: smd: Reset rx tail rather than tx
memory: atmel-sdramc: fix a possible NULL dereference
reset: hi6220: allow to compile test driver on other architectures
reset: zynq: add driver Kconfig option
reset: sunxi: add driver Kconfig option
reset: stm32: add driver Kconfig option
reset: socfpga: add driver Kconfig option
...
04 Oct, 2016
1 commit
-
Pull timer updates from Thomas Gleixner:
"A rather smalish set of updates for timers and timekeeping:- Two core fixes to prevent potential undefinded behaviour about
which gcc is complaining rightfully.- A fix to prevent stopping the tick on an (soon) offline CPU so it
can complete the shutdown procedure.- Wait for clocks to stabilize before making decisions, so a not yet
validated clock is not rejected.- The usual pile of fixes to the various clocksource drivers.
- Core code typo and include fixlets"
* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
timekeeping: Include the correct header for errno definitions
clocksource/drivers/ti-32k: Prevent ftrace recursion
clocksource/mips-gic-timer: Stop checking cpu_has_counter
clocksource/mips-gic-timer: Print an error if IRQ setup fails
tick/nohz: Prevent stopping the tick on an offline CPU
clocksource/drivers/oxnas: Add OX820 compatible
clocksource/drivers/timer-atmel-pit: Simplify IRQ handler
clocksource/drivers/timer-atmel-pit: Remove uselesss WARN_ON_ONCE
clocksource/drivers/timer-atmel-pit: Drop at91sam926x_pit_common_init
clocksource/drivers/moxart: Replace panic by pr_err
clocksource/drivers/moxart: Replace setup_irq by request_irq
clocksource/drivers/moxart: Add Aspeed support
clocksource/drivers/moxart: Use struct to hold state
clocksource/drivers/moxart: Refactor enable/disable
time: Avoid undefined behaviour in ktime_add_safe()
time: Avoid undefined behaviour in timespec64_add_safe()
timekeeping: Prints the amounts of time spent during suspend
clocksource: Defer override invalidation unless clock is unstable
hrtimer: Spelling fixes
03 Oct, 2016
1 commit
-
Pull arm64 updates from Will Deacon:
"It's a bit all over the place this time with no "killer feature" to
speak of. Support for mismatched cache line sizes should help people
seeing whacky JIT failures on some SoCs, and the big.LITTLE perf
updates have been a long time coming, but a lot of the changes here
are cleanups.We stray outside arch/arm64 in a few areas: the arch/arm/ arch_timer
workaround is acked by Russell, the DT/OF bits are acked by Rob, the
arch_timer clocksource changes acked by Marc, CPU hotplug by tglx and
jump_label by Peter (all CC'd).Summary:
- Support for execute-only page permissions
- Support for hibernate and DEBUG_PAGEALLOC
- Support for heterogeneous systems with mismatches cache line sizes
- Errata workarounds (A53 843419 update and QorIQ A-008585 timer bug)
- arm64 PMU perf updates, including cpumasks for heterogeneous systems
- Set UTS_MACHINE for building rpm packages
- Yet another head.S tidy-up
- Some cleanups and refactoring, particularly in the NUMA code
- Lots of random, non-critical fixes across the board"* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (100 commits)
arm64: tlbflush.h: add __tlbi() macro
arm64: Kconfig: remove SMP dependence for NUMA
arm64: Kconfig: select OF/ACPI_NUMA under NUMA config
arm64: fix dump_backtrace/unwind_frame with NULL tsk
arm/arm64: arch_timer: Use archdata to indicate vdso suitability
arm64: arch_timer: Work around QorIQ Erratum A-008585
arm64: arch_timer: Add device tree binding for A-008585 erratum
arm64: Correctly bounds check virt_addr_valid
arm64: migrate exception table users off module.h and onto extable.h
arm64: pmu: Hoist pmu platform device name
arm64: pmu: Probe default hw/cache counters
arm64: pmu: add fallback probe table
MAINTAINERS: Update ARM PMU PROFILING AND DEBUGGING entry
arm64: Improve kprobes test for atomic sequence
arm64/kvm: use alternative auto-nop
arm64: use alternative auto-nop
arm64: alternative: add auto-nop infrastructure
arm64: lse: convert lse alternatives NOP padding to use __nops
arm64: barriers: introduce nops and __nops macros for NOP sequences
arm64: sysreg: replace open-coded mrs_s/msr_s with {read,write}_sysreg_s
...
24 Sep, 2016
2 commits
-
Instead of comparing the name to a magic string, use archdata to
explicitly communicate whether the arch timer is suitable for
direct vdso access.Acked-by: Will Deacon
Acked-by: Russell King
Acked-by: Marc Zyngier
Signed-off-by: Scott Wood
Signed-off-by: Will Deacon -
Erratum A-008585 says that the ARM generic timer counter "has the
potential to contain an erroneous value for a small number of core
clock cycles every time the timer value changes". Accesses to TVAL
(both read and write) are also affected due to the implicit counter
read. Accesses to CVAL are not affected.The workaround is to reread TVAL and count registers until successive
reads return the same value. Writes to TVAL are replaced with an
equivalent write to CVAL.The workaround is to reread TVAL and count registers until successive reads
return the same value, and when writing TVAL to retry until counter
reads before and after the write return the same value.The workaround is enabled if the fsl,erratum-a008585 property is found in
the timer node in the device tree. This can be overridden with the
clocksource.arm_arch_timer.fsl-a008585 boot parameter, which allows KVM
users to enable the workaround until a mechanism is implemented to
automatically communicate this information.This erratum can be found on LS1043A and LS2080A.
Acked-by: Marc Zyngier
Signed-off-by: Scott Wood
[will: renamed read macro to reflect that it's not usually unstable]
Signed-off-by: Will Deacon
22 Sep, 2016
1 commit
-
Currently ti-32k can be used as a scheduler clock. We properly marked
omap_32k_read_sched_clock() as notrace but we then call another
function ti_32k_read_cycles() that _wasn't_ notrace.Having a traceable function in the sched_clock() path leads to a
recursion within ftrace and a kernel crash.Fix this by adding notrace attribute to the ti_32k_read_cycles()
function.Signed-off-by: Jisheng Zhang
Cc: daniel.lezcano@linaro.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: Steven Rostedt
Link: http://lkml.kernel.org/r/20160922075621.3725-1-jszhang@marvell.com
Signed-off-by: Thomas Gleixner
21 Sep, 2016
2 commits
-
The cpu_has_counter macro indicates whether the current CPU has a
working coprocessor 0 count & compare registers, and has no bearing on
the GIC. Stop checking it.Signed-off-by: Paul Burton
Cc: linux-mips@linux-mips.org
Cc: Daniel Lezcano
Link: http://lkml.kernel.org/r/20160913165644.627-2-paul.burton@imgtec.com
Signed-off-by: Thomas Gleixner -
We've checked for errors from setup_irq_percpu since commit f95ac8558b88
("CLOCKSOURCE: mips-gic: Add missing error returns checks") but didn't
print an error message in the failure case. This makes it very easy to
overlook the GIC timer clock event driver not being registered, since
we'll generally just use a different clock event driver if that happens.Print an error if IRQ setup fails in order to make such problems harder
to miss (ie. not completely silent).Signed-off-by: Paul Burton
Cc: linux-mips@linux-mips.org
Cc: Daniel Lezcano
Link: http://lkml.kernel.org/r/20160913165644.627-1-paul.burton@imgtec.com
Signed-off-by: Thomas Gleixner
19 Sep, 2016
1 commit
-
…it/krzk/linux into next/drivers
Pull "Samsung drivers/soc update for v4.9" from Krzysztof Kozlowski:
1. Allow compile testing of exynos-mct clocksource driver on ARM64.
2. Document Exynos5433 PMU compatible (already used by clkout driver and more
will be coming soon).* tag 'samsung-drivers-4.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
dt-bindings: EXYNOS: Add Exynos5433 PMU compatible
clocksource: exynos_mct: Add the support for ARM64
16 Sep, 2016
1 commit
-
This patch allows building and compile-testing the driver also for
ARM64. The delay_timer is only supported on ARMv7.Cc: Daniel Lezcano
Cc: Thomas Gleixner
Cc: Kukjin Kim
Cc: Krzysztof Kozlowski
Signed-off-by: Chanwoo Choi
Acked-by: Daniel Lezcano
[k.kozlowski: Adjusted commit msg]
Signed-off-by: Krzysztof Kozlowski
12 Sep, 2016
6 commits
-
In order to support the Oxford Semiconductor OX820 SoC, add new
compatible string to rps timer driver.
Also add new string in the dt-bindings.Signed-off-by: Neil Armstrong
Signed-off-by: Daniel Lezcano -
Because the PIT is also a proper clocksource, the timekeeping code is
already able to handle lost ticks.Reported-by: Thomas Gleixner
Acked-by: Nicolas Ferre
Signed-off-by: Alexandre Belloni
Signed-off-by: Daniel Lezcano -
IRQ handlers are running with IRQ disabled for a while, remove wrong
comment and useless test.Acked-by: Nicolas Ferre
Signed-off-by: Alexandre Belloni
Signed-off-by: Daniel Lezcano -
Merge at91sam926x_pit_common_init in at91sam926x_pit_dt_init as this is the
only initialization method now.Acked-by: Nicolas Ferre
Signed-off-by: Alexandre Belloni
Signed-off-by: Daniel Lezcano -
The clksrc-of code is supposed to catch the return code and fail gracefully.
Don't panic on error, but print the error and exit with a relevant error
code.Signed-off-by: Daniel Lezcano
Acked-by: Joel Stanley -
Save memory space and line of code by replacing setup_irq by request_irq.
Signed-off-by: Daniel Lezcano
Acked-by: Joel Stanley
09 Sep, 2016
3 commits
-
The Aspeed SoC has timer IP with a very similar register layout to the
moxart timer. This patch adds support for the fourth and fifth gen
aspeed SoCs, and has been tested on the ast2400 and ast2500.Signed-off-by: Joel Stanley
Acked-by: Rob Herring
Signed-off-by: Daniel Lezcano -
Add a struct moxart_timer to hold the driver state, including the
irqaction and struct clock_event_device.Most importantly this holds values for enabling and disabling the timer,
so future support can be added for devices that use different bits for
enable/disable.In preparation for future hardware support we add a MOXART prefix to the
existing values.Signed-off-by: Joel Stanley
Signed-off-by: Daniel Lezcano -
This patch abstracts the enable and disable register writes into their
own functions in preparation for future changes to use SoC specific
values for the writes.Signed-off-by: Joel Stanley
Signed-off-by: Daniel Lezcano
29 Aug, 2016
1 commit
-
The previous fix introduced a check against the ret variable which
is not defined, hence producing a compilation error:linux/drivers/clocksource/timer-atmel-pit.c: In function ‘at91sam926x_pit_dt_init’:
linux/drivers/clocksource/timer-atmel-pit.c:264:2: error: ‘ret’ undeclared (first use in this function)
ret = clk_prepare_enable(data->mck);
^
linux/drivers/clocksource/timer-atmel-pit.c:264:2: note: each undeclared identifier is reported only once for each function it appears inAdd the missing the variable 'ret'.
Fixes: 504f34c9e45c "clocksource/drivers/atmel-pit: Convert init function to return error"
Signed-off-by: Daniel Lezcano
Cc: alexandre.belloni@free-electrons.com
Cc: motobud@gmail.com
Cc: realbright@lgcns.com
Link: http://lkml.kernel.org/r/1472453043-24287-1-git-send-email-daniel.lezcano@linaro.org
Signed-off-by: Thomas Gleixner
26 Aug, 2016
3 commits
-
The bootloader (U-boot) sometimes uses this timer for various delays.
It uses it as a ongoing counter, and does comparisons on the current
counter value. The timer counter is never stopped.In some cases when the user interacts with the bootloader, or lets
it idle for some time before loading Linux, the timer may expire,
and an interrupt will be pending. This results in an unexpected
interrupt when the timer interrupt is enabled by the kernel, at
which point the event_handler isn't set yet. This results in a NULL
pointer dereference exception, panic, and no way to reboot.Clear any pending interrupts after we stop the timer in the probe
function to avoid this.Cc: stable@vger.kernel.org
Signed-off-by: Chen-Yu Tsai
Signed-off-by: Daniel Lezcano
Acked-by: Maxime Ripard -
Driver init code incorrectly uses the block base address and as a result
clears clocksource structure's fields instead of the hardware registers.Commit 09a998201649 ("timekeeping: Lift clocksource cacheline
restriction") has changed the offsets within pistachio_clocksource
structure and what has previously gone unnoticed now leads to a kernel
panic during boot.Signed-off-by: Marcin Nowakowski
Signed-off-by: Daniel Lezcano -
mck is needed to get the PIT working. Explicitly prepare_enable it instead
of assuming it is enabled.This solves an issue where the system is freezing when the ETM/ETB drivers
are enabled.Reported-by: Olivier Schonken
Reviewed-by: Boris Brezillon
Acked-by: Nicolas Ferre
Signed-off-by: Alexandre Belloni
Signed-off-by: Daniel Lezcano
24 Aug, 2016
1 commit
-
We get 1 warning about global functions without a declaration in the
clocksource/drivers/pxa driver when building with W=1:drivers/clocksource/pxa_timer.c:221:13: warning: no previous prototype for 'pxa_timer_nodt_init' [-Wmissing-prototypes]
void __init pxa_timer_nodt_init(int irq, void __iomem *base,In fact, this function is declared in pxa.h, so this patch
add missing header dependencies.Signed-off-by: Baoyou Xie
Reviewed-by: Arnd Bergmann
Cc: daniel.lezcano@linaro.org
Cc: xie.baoyou@zte.com.cn
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1471965569-4104-1-git-send-email-baoyou.xie@linaro.org
Signed-off-by: Thomas Gleixner
17 Aug, 2016
3 commits
-
In commit:
d8152bf85d2c0 ("clocksource/drivers/mips-gic-timer: Convert init function to return error")
several return values were added to a void function resulting in the following warnings:
clocksource/mips-gic-timer.c: In function 'gic_clocksource_of_init':
clocksource/mips-gic-timer.c:175:3: warning: 'return' with a value, in function returning void [enabled by default]
clocksource/mips-gic-timer.c:183:4: warning: 'return' with a value, in function returning void [enabled by default]
clocksource/mips-gic-timer.c:190:3: warning: 'return' with a value, in function returning void [enabled by default]
clocksource/mips-gic-timer.c:195:3: warning: 'return' with a value, in function returning void [enabled by default]
clocksource/mips-gic-timer.c:200:3: warning: 'return' with a value, in function returning void [enabled by default]
clocksource/mips-gic-timer.c:211:2: warning: 'return' with a value, in function returning void [enabled by default]
clocksource/mips-gic-timer.c: At top level:
clocksource/mips-gic-timer.c:213:1: warning: comparison of distinct pointer types lacks a cast [enabled by default]
clocksource/mips-gic-timer.c: In function 'gic_clocksource_of_init':
clocksource/mips-gic-timer.c:183:18: warning: ignoring return value of 'PTR_ERR', declared with attribute warn_unused_result [-Wunused-result]Given that the addition of the return values was intentional, it seems
that the conversion of the containing function from void to int was
simply overlooked.Signed-off-by: Paul Gortmaker
Signed-off-by: Daniel Lezcano
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Cc: linux-mips@linux-mips.org
Fixes: d8152bf85d2c ("clocksource/drivers/mips-gic-timer: Convert init function to return error")
Link: http://lkml.kernel.org/r/1471429296-9053-3-git-send-email-daniel.lezcano@linaro.org
Signed-off-by: Ingo Molnar -
I could not figure out why, but GCC cannot prove that the
kona_timer_init() function always initializes its two outputs,
and we get a warning for the use of the 'lsw' variable later,
which is obviously correct.drivers/clocksource/bcm_kona_timer.c: In function 'kona_timer_init':
drivers/clocksource/bcm_kona_timer.c:119:13: error: 'lsw' may be used uninitialized in this function [-Werror=maybe-uninitialized]Slightly reordering the loop makes the warning disappear, after
it becomes more obvious to the compiler that the loop is
always entered on the first iteration.As pointed out by Ray Jui, there is a related problem in the
way we deal with the loop running into the limit, as we just
keep going there with an invalid counter data, so instead we
now propagate a -ETIMEDOUT result to the caller.Signed-off-by: Arnd Bergmann
Signed-off-by: Daniel Lezcano
Acked-by: Ray Jui
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Cc: bcm-kernel-feedback-list@broadcom.com
Link: http://lkml.kernel.org/r/1471429296-9053-2-git-send-email-daniel.lezcano@linaro.org
Link: https://patchwork.kernel.org/patch/9174261/
Signed-off-by: Ingo Molnar -
While converting the init function to return an error, the wrong clock
was get. This leads to the wrong clock rate and slows down the kernel.
For example, it affects typical boot time:- without fix: over 1 minute
- with fix: 15 secondsTested-by: Stefan Roese
Tested-by: Ralph Sennhauser
Signed-off-by: Gregory CLEMENT
Signed-off-by: Daniel Lezcano
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Fixes: 12549e27c63c ("clocksource/drivers/time-armada-370-xp: Convert init function to return error")
Link: http://lkml.kernel.org/r/1471429296-9053-1-git-send-email-daniel.lezcano@linaro.org
[ Refined the changelog. ]
Signed-off-by: Ingo Molnar
10 Aug, 2016
1 commit
-
Signed-off-by: Ingo Molnar
02 Aug, 2016
1 commit
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Pull ARM SoC driver updates from Olof Johansson:
"Driver updates for ARM SoCs.A slew of changes this release cycle. The reset driver tree, that we
merge through arm-soc for historical reasons, is also sizable this
time around.Among the changes:
- clps711x: Treewide changes to compatible strings, merged here for simplicity.
- Qualcomm: SCM firmware driver cleanups, move to platform driver
- ux500: Major cleanups, removal of old mach-specific infrastructure.
- Atmel external bus memory driver
- Move of brcmstb platform to the rest of bcm
- PMC driver updates for tegra, various fixes and improvements
- Samsung platform driver updates to support 64-bit Exynos platforms
- Reset controller cleanups moving to devm_reset_controller_register() APIs
- Reset controller driver for Amlogic Meson
- Reset controller driver for Hisilicon hi6220
- ARM SCPI power domain support"* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (100 commits)
ARM: ux500: consolidate base platform files
ARM: ux500: move soc_id driver to drivers/soc
ARM: ux500: call ux500_setup_id later
ARM: ux500: consolidate soc_device code in id.c
ARM: ux500: remove cpu_is_u* helpers
ARM: ux500: use CLK_OF_DECLARE()
ARM: ux500: move l2x0 init to .init_irq
mfd: db8500 stop passing around platform data
ASoC: ab8500-codec: remove platform data based probe
ARM: ux500: move ab8500_regulator_plat_data into driver
ARM: ux500: remove unused regulator data
soc: raspberrypi-power: add CONFIG_OF dependency
firmware: scpi: add CONFIG_OF dependency
video: clps711x-fb: Changing the compatibility string to match with the smallest supported chip
input: clps711x-keypad: Changing the compatibility string to match with the smallest supported chip
pwm: clps711x: Changing the compatibility string to match with the smallest supported chip
serial: clps711x: Changing the compatibility string to match with the smallest supported chip
irqchip: clps711x: Changing the compatibility string to match with the smallest supported chip
clocksource: clps711x: Changing the compatibility string to match with the smallest supported chip
clk: clps711x: Changing the compatibility string to match with the smallest supported chip
...
01 Aug, 2016
1 commit
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The ARM architected timer produces level-triggered interrupts (this
is mandated by the architecture). Unfortunately, a number of
device-trees get this wrong, and expose an edge-triggered interrupt.Until now, this wasn't too much an issue, as the programming of the
trigger would fail (the corresponding PPI cannot be reconfigured),
and the kernel would be happy with this. But we're about to change
this, and trust DT a lot if the driver doesn't provide its own
trigger information. In that context, the timer breaks badly.While we do need to fix the DTs, there is also some userspace out
there (kvmtool) that generates the same kind of broken DT on the
fly, and that will completely break with newer kernels.As a safety measure, and to keep buggy software alive as well as
buying us some time to fix DTs all over the place, let's check
what trigger configuration has been given us by the firmware.
If this is not a level configuration, then we know that the
DT/ACPI configuration is bust, and we pick some defaults which
won't be worse than the existing setup.Signed-off-by: Marc Zyngier
Cc: Andrew Lunn
Cc: Liu Gang
Cc: Mark Rutland
Cc: Masahiro Yamada
Cc: Wenbin Song
Cc: Mingkai Hu
Cc: Florian Fainelli
Cc: Kevin Hilman
Cc: Daniel Lezcano
Cc: Michal Simek
Cc: Jon Hunter
Cc: arm@kernel.org
Cc: bcm-kernel-feedback-list@broadcom.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: Sebastian Hesselbarth
Cc: Jason Cooper
Cc: Ray Jui
Cc: "Hou Zhiqiang"
Cc: Tirumalesh Chalamarla
Cc: linux-samsung-soc@vger.kernel.org
Cc: Yuan Yao
Cc: Jan Glauber
Cc: Gregory Clement
Cc: linux-amlogic@lists.infradead.org
Cc: soren.brinkmann@xilinx.com
Cc: Rajesh Bhagat
Cc: Scott Branden
Cc: Duc Dang
Cc: Kukjin Kim
Cc: Carlo Caione
Cc: Dinh Nguyen
Link: http://lkml.kernel.org/r/1470045256-9032-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner
15 Jul, 2016
1 commit
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Install the callbacks via the state machine and let the core invoke
the callbacks on the already online CPUs.Signed-off-by: Richard Cochran
Signed-off-by: Anna-Maria Gleixner
Reviewed-by: Sebastian Andrzej Siewior
Cc: Barry Song
Cc: Daniel Lezcano
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Cc: rt@linutronix.de
Link: http://lkml.kernel.org/r/20160713153338.310333816@linutronix.de
Signed-off-by: Ingo Molnar
