03 Sep, 2020
1 commit
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Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and the error value gets printed.Signed-off-by: Krzysztof Kozlowski
Link: https://lore.kernel.org/r/20200828152637.16903-2-krzk@kernel.org
Signed-off-by: Vinod Koul
28 Apr, 2020
1 commit
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Direct mode or FIFO mode is computed by stm32-dma driver. Add a way for
the user to force direct mode, by setting bit 2 in the bitfield value
specifying DMA features in the device tree.Signed-off-by: Amelie Delaunay
Link: https://lore.kernel.org/r/20200422102904.1448-3-amelie.delaunay@st.com
Signed-off-by: Vinod Koul
25 Feb, 2020
8 commits
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To avoid race with vchan_complete, use the race free way to terminate
running transfer.Move vdesc->node list_del in stm32_dma_start_transfer instead of in
stm32_mdma_chan_complete to avoid another race in vchan_dma_desc_free_list.Signed-off-by: Amelie Delaunay
Link: https://lore.kernel.org/r/20200129153628.29329-9-amelie.delaunay@st.com
Signed-off-by: Vinod Koul -
This patch fixes BUG: sleeping function called from invalid context in
stm32_dma_disable_chan function.The goal of this function is to force channel disable if it has not been
disabled by hardware. This consists in clearing STM32_DMA_SCR_EN bit and
read it as 0 to ensure the channel is well disabled and the last transfer
is over.In previous implementation, the waiting loop was based on a do...while (1)
with a call to cond_resched to give the scheduler a chance to run a higher
priority process.But in some conditions, stm32_dma_disable_chan can be called while
preemption is disabled, on a stm32_dma_stop call for example. So
cond_resched must not be used.To avoid this, use readl_relaxed_poll_timeout_atomic to poll
STM32_DMA_SCR_EN bit cleared.Signed-off-by: Amelie Delaunay
Link: https://lore.kernel.org/r/20200129153628.29329-8-amelie.delaunay@st.com
Signed-off-by: Vinod Koul -
This patch adds copy_align property in accordance with hardware
restriction.Signed-off-by: Ludovic Barre
Signed-off-by: Amelie Delaunay
Link: https://lore.kernel.org/r/20200129153628.29329-7-amelie.delaunay@st.com
Signed-off-by: Vinod Koul -
This patch adds dma_set_max_seg_size to define sg dma constraint.
This constraint may be taken into account by client to scatter/gather
its buffer.Signed-off-by: Ludovic Barre
Signed-off-by: Amelie Delaunay
Link: https://lore.kernel.org/r/20200129153628.29329-6-amelie.delaunay@st.com
Signed-off-by: Vinod Koul -
Enable client to resubmit already processed descriptors
in order to save descriptor creation time.Signed-off-by: Pierre-Yves MORDRET
Signed-off-by: Amelie Delaunay
Link: https://lore.kernel.org/r/20200129153628.29329-5-amelie.delaunay@st.com
Signed-off-by: Vinod Koul -
Change STM32 DMA driver to defer its probe operation when reset
controller is expected but has not been probed yet when DMA
device is probed.Changes error traces when failing to get a system resource so that
it is not printed on failure with deferred probing.Signed-off-by: Etienne Carriere
Signed-off-by: Amelie Delaunay
Link: https://lore.kernel.org/r/20200129153628.29329-4-amelie.delaunay@st.com
Signed-off-by: Vinod Koul -
Remove reset controller reference from device instance since it is
used only at probe time.Signed-off-by: Etienne Carriere
Signed-off-by: Amelie Delaunay
Link: https://lore.kernel.org/r/20200129153628.29329-3-amelie.delaunay@st.com
Signed-off-by: Vinod Koul -
Add suspend/resume power management relying on PM Runtime engine.
Signed-off-by: Pierre-Yves MORDRET
Signed-off-by: Amelie Delaunay
Link: https://lore.kernel.org/r/20200129153628.29329-2-amelie.delaunay@st.com
Signed-off-by: Vinod Koul
04 Sep, 2019
1 commit
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One of the more common cases of allocation size calculations is finding
the size of a structure that has a zero-sized array at the end, along
with memory for some number of elements for that array. For example:struct stm32_dma_desc {
...
struct stm32_dma_sg_req sg_req[];
};Make use of the struct_size() helper instead of an open-coded version
in order to avoid any potential type mistakes.So, replace the following function:
static struct stm32_dma_desc *stm32_dma_alloc_desc(u32 num_sgs)
{
return kzalloc(sizeof(struct stm32_dma_desc) +
sizeof(struct stm32_dma_sg_req) * num_sgs, GFP_NOWAIT);
}with:
kzalloc(struct_size(desc, sg_req, num_sgs), GFP_NOWAIT)
This code was detected with the help of Coccinelle.
Signed-off-by: Gustavo A. R. Silva
Link: https://lore.kernel.org/r/20190830161423.GA3483@embeddedor
Signed-off-by: Vinod Koul
31 Jul, 2019
1 commit
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We don't need dev_err() messages when platform_get_irq() fails now that
platform_get_irq() prints an error message itself when something goes
wrong. Let's remove these prints with a simple semantic patch.//
@@
expression ret;
struct platform_device *E;
@@ret =
(
platform_get_irq(E, ...)
|
platform_get_irq_byname(E, ...)
);if ( \( ret < 0 \| ret
While we're here, remove braces on if statements that only have one
statement (manually).Cc: Vinod Koul
Cc: Dan Williams
Cc: dmaengine@vger.kernel.org
Cc: Greg Kroah-Hartman
Signed-off-by: Stephen Boyd
Link: https://lore.kernel.org/r/20190730181557.90391-11-swboyd@chromium.org
Signed-off-by: Vinod Koul
18 Jul, 2019
1 commit
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Pull dmaengine updates from Vinod Koul:
- Add support in dmaengine core to do device node checks for DT devices
and update bunch of drivers to use that and remove open coding from
drivers- New driver/driver support for new hardware, namely:
- MediaTek UART APDMA
- Freescale i.mx7ulp edma2
- Synopsys eDMA IP core version 0
- Allwinner H6 DMA- Updates to axi-dma and support for interleaved cyclic transfers
- Greg's debugfs return value check removals on drivers
- Updates to stm32-dma, hsu, dw, pl330, tegra drivers
* tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (68 commits)
dmaengine: Revert "dmaengine: fsl-edma: add i.mx7ulp edma2 version support"
dmaengine: at_xdmac: check for non-empty xfers_list before invoking callback
Documentation: dmaengine: clean up description of dmatest usage
dmaengine: tegra210-adma: remove PM_CLK dependency
dmaengine: fsl-edma: add i.mx7ulp edma2 version support
dt-bindings: dma: fsl-edma: add new i.mx7ulp-edma
dmaengine: fsl-edma-common: version check for v2 instead
dmaengine: fsl-edma-common: move dmamux register to another single function
dmaengine: fsl-edma: add drvdata for fsl-edma
dmaengine: Revert "dmaengine: fsl-edma: support little endian for edma driver"
dmaengine: rcar-dmac: Reject zero-length slave DMA requests
dmaengine: dw: Enable iDMA 32-bit on Intel Elkhart Lake
dmaengine: dw-edma: fix semicolon.cocci warnings
dmaengine: sh: usb-dmac: Use [] to denote a flexible array member
dmaengine: dmatest: timeout value of -1 should specify infinite wait
dmaengine: dw: Distinguish ->remove() between DW and iDMA 32-bit
dmaengine: fsl-edma: support little endian for edma driver
dmaengine: hsu: Revert "set HSU_CH_MTSR to memory width"
dmagengine: pl330: add code to get reset property
dt-bindings: pl330: document the optional resets property
...
31 May, 2019
1 commit
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Based on 1 normalized pattern(s):
license terms gnu general public license gpl version 2
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 161 file(s).
Signed-off-by: Thomas Gleixner
Reviewed-by: Allison Randal
Reviewed-by: Alexios Zavras
Reviewed-by: Steve Winslow
Reviewed-by: Richard Fontana
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190528170027.447718015@linutronix.de
Signed-off-by: Greg Kroah-Hartman
21 May, 2019
1 commit
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Commit c6504be53972 ("dmaengine: stm32-dma: Fix unsigned variable compared
with zero") duplicated the call to platform_get_irq.
So remove the first call to platform_get_irq.Fixes: c6504be53972 ("dmaengine: stm32-dma: Fix unsigned variable compared with zero")
Signed-off-by: Amelie Delaunay
Signed-off-by: Vinod Koul
04 May, 2019
1 commit
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In double buffer mode, during residue calculation, the DMA can
automatically switch to the next transfer. Indeed the CT bit that
gives position in the double buffer can has been updated by the
hardware, during calculation.
In this case the SxNDTR register value can not be trusted.
If a transition is detected we consider that the DMA has switched to
the beginning of next sg.Signed-off-by: Arnaud Pouliquen
Signed-off-by: Pierre-Yves MORDRET
Signed-off-by: Vinod Koul
29 Apr, 2019
1 commit
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Commit f4fd2ec08f17: ("dmaengine: stm32-dma: use platform_get_irq()") used
unsigned variable irq to store the results and check later for negative
errors, so update the code to use signed variable for thisFixes: f4fd2ec08f17 ("dmaengine: stm32-dma: use platform_get_irq()")
Reported-by: kbuild test robot
Reported-by: Julia Lawall
Acked-by: Julia Lawall
Signed-off-by: Vinod Koul
27 Apr, 2019
1 commit
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platform_get_resource(pdev, IORESOURCE_IRQ) is not recommended for
requesting IRQ's resources, as they can be not ready yet. Using
platform_get_irq() instead is preferred for getting IRQ even if it was
not retrieved earlier.Signed-off-by: Fabien Dessenne
Reviewed-by: Pierre-Yves MORDRET
Signed-off-by: Vinod Koul
07 Jan, 2019
2 commits
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Use pm_runtime engine for clock management purpose.
Signed-off-by: Pierre-Yves MORDRET
Signed-off-by: Vinod Koul -
For avoiding false FIFO detection, check FIFO Error interrupt is
enabled prior raising any errors.
This will prevent having spurious FIFO error where it shouldn't.Signed-off-by: Pierre-Yves MORDRET
Signed-off-by: Vinod Koul
02 Oct, 2018
1 commit
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When a period length is not multiple of FIFO some data may be stuck
within FIFO.Burst/FIFO Threshold/Period or buffer length check has to be hardened
In any case DMA will grant any request from client but will degraded
any parameters whether awkward.Signed-off-by: Pierre-Yves MORDRET
Signed-off-by: Vinod Koul
10 Jul, 2018
1 commit
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The format specifier "%p" can leak kernel addresses.
Use "%pK" instead.Signed-off-by: Benjamin Gaignard
Signed-off-by: Vinod Koul
04 Apr, 2018
7 commits
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A single register of the controller holds the information for four dma
channels.
The functions stm32_dma_irq_status() don't mask the relevant bits after
the shift, thus adjacent channel's status is also reported in the returned
value.
Fixed by masking the value before returning it.Similarly, the function stm32_dma_irq_clear() don't mask the input value
before shifting it, thus an incorrect input value could disable the
interrupts of adjacent channels.
Fixed by masking the input value before using it.Signed-off-by: Pierre-Yves MORDRET
Signed-off-by: Antonio Borneo
Signed-off-by: Vinod Koul -
Having 0 in item counter register is valid and stands for a "No or Ended
transfer". Therefore valid transfer starts from @+0 to @+0xFFFE leading to
unaligned scatter gather at boundary. Thus it's safer to round down this
value on its FIFO size (16 Bytes).Signed-off-by: Pierre-Yves MORDRET
Signed-off-by: Vinod Koul -
Update the way Transfer Complete and Half Transfer Complete status are
acknowledge. Even if HTI is not enabled its status is shown when reading
registers, driver has to clear it gently and not raise an error.Signed-off-by: Pierre-Yves MORDRET
Signed-off-by: Vinod Koul -
This patch improves memory burst capability using best burst size
according to transferred buffer size from/to memory.>From now on, memory burst is not necessarily same as with peripheral
burst one and fifo threshold is directly managed by this driver in order
to fit with computed memory burst.Signed-off-by: M'boumba Cedric Madianga
Signed-off-by: Pierre-Yves MORDRET
Signed-off-by: Vinod Koul -
Fix typo in a comment and solved reported checkpatch warnings.
Signed-off-by: Pierre-Yves MORDRET
Signed-off-by: Vinod Koul -
When in cyclic mode, the configuration is updated after having started the
DMA hardware (STM32_DMA_SCR_EN) leading to incomplete configuration of
SMxAR registers.Signed-off-by: Pierre-Yves MORDRET
Signed-off-by: Hugues Fruchet
Signed-off-by: Vinod Koul -
>From now on, DMA bitfield is to manage DMA FIFO Threshold.
Signed-off-by: Pierre-Yves MORDRET
Signed-off-by: Vinod Koul
06 Mar, 2017
1 commit
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Trivial fix to spelling mistake and make channel plural.
Signed-off-by: Colin Ian King
Signed-off-by: Vinod Koul
22 Feb, 2017
1 commit
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Pull dmaengine updates from Vinod Koul:
"This time we fairly boring and bit small update.- Support for Intel iDMA 32-bit hardware
- deprecate broken support for channel switching in async_tx
- bunch of updates on stm32-dma
- Cyclic support for zx dma and making in generic zx dma driver
- Small updates to bunch of other drivers"* tag 'dmaengine-4.11-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (29 commits)
async_tx: deprecate broken support for channel switching
dmaengine: rcar-dmac: Widen DMA mask to 40 bits
dmaengine: sun6i: allow build on ARM64 platforms (sun50i)
dmaengine: Provide a wrapper for memcpy operations
dmaengine: zx: fix build warning
dmaengine: dw: we do support Merrifield SoC in PCI mode
dmaengine: dw: add support of iDMA 32-bit hardware
dmaengine: dw: introduce register mappings for iDMA 32-bit
dmaengine: dw: introduce block2bytes() and bytes2block()
dmaengine: dw: extract dwc_chan_pause() for future use
dmaengine: dw: replace convert_burst() with one liner
dmaengine: dw: register IRQ and DMA pool with instance ID
dmaengine: dw: Fix data corruption in large device to memory transfers
dmaengine: ste_dma40: indicate granularity on channels
dmaengine: ste_dma40: indicate directions on channels
dmaengine: stm32-dma: Add error messages if xlate fails
dmaengine: dw: pci: remove LPE Audio DMA ID
dmaengine: stm32-dma: Add max_burst support
dmaengine: stm32-dma: Add synchronization support
dmaengine: stm32-dma: Fix residue computation issue in cyclic mode
...
10 Jan, 2017
1 commit
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This patch adds some error messages when a slave device fails to request a
channel.Signed-off-by: M'boumba Cedric Madianga
Reviewed-by: Ludovic BARRE
Signed-off-by: Vinod Koul
03 Jan, 2017
4 commits
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This patch sets the max_burst value supported by the STM32 DMA
Signed-off-by: M'boumba Cedric Madianga
Signed-off-by: Vinod Koul -
Implement the new device_synchronize() callback to allow proper
synchronization when stopping a channel.Signed-off-by: M'boumba Cedric Madianga
Signed-off-by: Vinod Koul -
This patch resolves the residue computation issue detected in cyclic mode.
Now, in cyclic mode, we increment next_sg variable as soon as a period is
transferred instead of after pushing a new sg request.
Then, we take into account that after transferring a complete buffer,
the next_sg variable is equal to 0.Signed-off-by: M'boumba Cedric Madianga
Reviewed-by: Ludovic BARRE
Signed-off-by: Vinod Koul -
This patch reworks the way to manage transfer starting.
Now, starting DMA is only allowed when the channel is not busy.
Then, stm32_dma_start_transfer is declared as void.
At least, after each transfer completion, we start the next transfer if a
new descriptor as been queued in the issued list during an ongoing
transfer.Signed-off-by: M'boumba Cedric Madianga
Reviewed-by: Ludovic BARRE
Signed-off-by: Vinod Koul
02 Jan, 2017
2 commits
-
chan->desc is always set to NULL when a DMA transfer is complete.
As a DMA transfer could be complete during the call of stm32_dma_tx_status,
we need to be sure that chan->desc is not NULL before using this variable
to avoid a null pointer deference issue.Signed-off-by: M'boumba Cedric Madianga
Reviewed-by: Ludovic BARRE
Signed-off-by: Vinod Koul -
This patch sets the right number of arguments to be used for DMA clients
which request channels from DT.Signed-off-by: M'boumba Cedric Madianga
Reviewed-by: Ludovic BARRE
Signed-off-by: Vinod Koul
13 Dec, 2016
2 commits
-
In stm32_dma_set_xfer_param(), variable ‘src_addr’ is initialized but never used, which
leads to warning with W=1drivers/dma/stm32-dma.c: In function ‘stm32_dma_set_xfer_param’:
drivers/dma/stm32-dma.c:577:13: warning: variable ‘src_addr’ set but not used [-Wunused-but-set-variable]
dma_addr_t src_addr, dst_addr;So remove it.
Reviewed-by: M'boumba Cedric Madianga
Signed-off-by: Vinod Koul -
In stm32_dma_set_xfer_param(), variable ‘dst_addr’ is initialized but never used, which
leads to warning with W=1drivers/dma/stm32-dma.c: In function ‘stm32_dma_set_xfer_param’:
drivers/dma/stm32-dma.c:577:23: warning: variable ‘dst_addr’ set but not used [-Wunused-but-set-variable]
dma_addr_t src_addr, dst_addr;So remove it.
Reviewed-by: M'boumba Cedric Madianga
Signed-off-by: Vinod Koul