09 Jun, 2017
40 commits
-
EDMA controller will loss power on i.MX7ULP VLLS mode, then registers
are set to HW reset default value that cause EDMA cannot work after
system wake up. So the patch is to restore eDMA registers status after
system exit from VLLS mode.Signed-off-by: Fugang Duan
(cherry picked from commit:bc15f814383d)Conflicts:
drivers/dma/fsl-edma.c -
The touchscreen driver, max11801, which is on 12c2 bus, won't be probed
when using the hdcp specific DTS (this is disabling 12c2, since it
will acquire it for DDC communications). Since this driver won't be
probed, it will spam the dmesg with the pr_err from max11801_read_adc()
function. This function is periodically called by the battery driver. For
this reason, I removed the pr_err() call.
Also, to be noticed that the function signature is u32, but in case of an
error it will return a negative integer. In order to correctly propagate
errors, I changed the function signature to int. This is safe, since the
read value from i2c is on 16 bits (MSB and LSB on 8 bits).Also, the function calibration_voltage is calling max11801_read_adc from
touchscreen driverm which can return negative values in case of an
error. I case of an error, just stop reading ADC data and return 0 as
voltage_data.Signed-off-by: Robert Chiras
-
The function mxc_hdmi_ioctl is passing kernel memory to user-space. The
case for HDMI_IOC_GET_CPU_TYPE is passing the memory directly, which is
not permitted. Fixed this, by using put_user().Signed-off-by: Robert Chiras
-
Some drivers may call terminate dma channel in interrupt, thus
we'd better use dma_poo_free.(Documentation/DMA-API-HOWTO.txt)Signed-off-by: Robin Gong
-
Build mxc drivers by default for both ARMv7 and ARMv8
platforms.Signed-off-by: Anson Huang
-
Add imx6ul device type in spi driver to enable the ERR008517 workaround
or not by dts easily.Signed-off-by: Robin Gong
(cherry picked from commit 85c6cc2243919f2c46b335ec8b5be70294942e4d)
(cherry picked from commit 296305f200abd5982a4934b82e7aaf11a3dfc354)Conflicts:
drivers/spi/spi-imx.c -
To workaroud the TKT238285, the safe way is use XCH mode in SDMA
script to simulate as PIO mode which never report such issue. Meanwhile,
set tx threashold as 0. But this workaroud will bring performance impacted,
below performance data is collected by 'dd' with SPI-NOR flash on i.mx6dl
sabresd board:mode write data read data
--PIO 194KB/s 644KB/s
--DMA normal
(SMC, tx_thresh=32) 222KB/s 1.4MB/s
--DMA(XCH, tx_thresh=0) 210KB/s 1.0MB/sSigned-off-by: Robin Gong
(cherry picked from commit 01be65fa5617aa192307ca38b6fc6128f3f0c3f7)
(cherry picked from commit 646a751a4d1d0e227a762b461d9b8f92605c26b1)
(cherry picked from commit b334993950b24ced30fcfc70c126b65bf4cb4cff)Conflicts:
drivers/spi/spi-imx.c -
tty_port flag "ASYNC_SUSPENDED" has been discarded from kernel upgrade, then
use .tty_port_suspended() instead of the flag check.Signed-off-by: Fugang Duan
-
Use the cansleep variant of the GPIO API.
Signed-off-by: Fugang Duan
-
The sdmac->chn_real_count is equal to sdmac->period_len in dma cyclic
mode that is not correct, correct it to real count in current BD transfer.Signed-off-by: Fugang Duan
-
Add modem device reset, wthether to reset depend on dts configuration.
Signed-off-by: Fugang Duan
-
Pass ->dev to dma_alloc_coherent() API.
Signed-off-by: Fugang Duan
-
Pass ->dev to dma_alloc_coherent() API to avoid kernel dump.
Signed-off-by: Fugang Duan
-
Before then DMA tx path, init the DMA tx path synchronal flags
sport->flags.Signed-off-by: Fugang Duan
-
Only enable RTSD interrupt for hw flow control, otherwise RTS_B signal
has some external signal disturbance without config RTS_B select input.Signed-off-by: Fugang Duan
(cherry picked from commit: 471e8c43aca3)Conflicts:
drivers/tty/serial/imx.c -
Add dma memory check before free it.
Signed-off-by: Fugang Duan
-
Align tx path with kernel 3.14, otherwise there have data loss.
The patch is cherry-picked from commit:47c1570ac934, and merge
the patch 1afe15219403.Signed-off-by: Fugang Duan
-
Kernel upgrade to 4.1.8 from 4.1.4 has one conflict: commit:3cd6a7db4c2c and
commit:4eede03b97bf, and there introduces one issue during the merge. The issue
cause pio mode cannot work.The patch fix the error that move the dma init function to .startup().
Signed-off-by: Fugang Duan
-
When uart port (non-console port) in dma mode and use uart as remote wakeup
source, after resume back, the AWAKE bit is not cleared most of interrupts
are disabled. And then let system suspend state, system resume back immediately
without any wake up action. So we need to clear the AWAKE bit after resume
back in DMA mode.Merge comments: it is necessary to clear AWAKE or RTSD bit.
Signed-off-by: Fugang Duan
(merge patch from commit: d4b6b6b20eb2c5cca47292f89ab588b15d3be0a9) -
The commmunity driver uart DMA don't work, it better to use
4.1.y DMA process mechanism, so there have many conflict during
code merging. Decisively, to use 4.1.y commit f00cf8855eaa in the
merge point for DMA implemention.In DMA mode, don't involve CPU interrupt, remove .imx_dma_rxint()
function.After the patch, DMA and CPU mode both work fine with the current
SDMA driver.Signed-off-by: Fugang Duan
-
Remove the redundant clock operation.
Signed-off-by: Fugang Duan
-
Avoid dead lock in DMA cyclic case.
Signed-off-by: Fugang Duan
-
Currently, it is failed to set clock rate in dts file that maybe some clock
patch miss. Now just set the clock parent and rate in clock driver.Signed-off-by: Fugang Duan
-
Commit:872ee3f9d4c1 introduce build error.
The patch just fix the build error.Signed-off-by: Gao Pan
(cherry picked from commit 06a01760df40fbffe37e6a053a40308240224cb2) -
Before, checking SDMA_H_C0PTR register to know whether sdma controller turned
off in DSM, if yes restore channel context back. Unfortunatly, this checking
is wrong, because SDMA_H_C0PTR has been initialized as non-zero value in
sdma_resume, which means channel context will never be restored back if mega/
fast off on i.mx6sx or i.mx7d. Using 'suspend_off' flag to keep this 'restore
needed' requirement.Signed-off-by: Robin Gong
(cherry picked from commit 565d4c45926a03029d7750a57f3e3f2404de7301)
(cherry picked from commit 70dbe82f8fb504497ab5d544ce0c30cfca15c515) -
Some driver may call dmaengine_terminate_all firstly, and then start next by
calling dmaengine_prep_* without dmaengine_slave_config. In this case sdma
transfer failed since no context loaded, take this case in this patch.Signed-off-by: Robin Gong
(cherry picked from commit 51ff948df543dc273fefeb86608e7d6d28ca8090) -
This patch cherry-pick the blow patch from v4.1.y, and resove
conflicts.commit 70805e9da3fd25eebf0e141a5cda48fba310c5f5
Author: Robin Gong
Date: Mon Aug 17 16:04:48 2015 +0800MLK-11358-3: dma: imx-sdma: add virt-dma support
Old sdma can't support multi instances, because next transfer will return
error if the last transfer not done(sdmac->status == DMA_IN_PROGRESS). virt
dma is a common framework for versus dma drivers, and it's support multi
instances, driver can dynamicly alloc description and add it to list which
will be handled in the last sdma transfer done later.Another advantage of this patch is to clean up the constrain of max bd numer:
--#define NUM_BD (int)(PAGE_SIZE / sizeof(struct sdma_buffer_descriptor))
in other words, now sdma driver can support any length data now.Meanwhile, remove sdma_load_context() in prep_* everytime, since it can do
only once in config channel.Signed-off-by: Robin Gong
Signed-off-by: Robin Gong
-
emi_2_emi have to be set in memory_2_memory case, code miss during
rebase, fix up it now.Signed-off-by: Robin Gong
-
- add the .data into the imx_rpmsg_dt_ids table, thus
the driver can distinguish the different platforms.Signed-off-by: Richard Zhu
Tested-by: Daniel Baluta -
- change the module_init to subsys_initcall.
Otherwise, the pf1550-rpmsg would be invoked before
the rpmsg bus driver on imx7ulp.
Then, sdhc wouldn't be powered up properly if pf1550
isn't functional.
- remove the no longer used imc_rpmsg_exit.
- pass the real device id if the shared irq is requested.Signed-off-by: Richard Zhu
Tested-by: Daniel Baluta -
The mipi_dsi_disp_init function takes a reference to a reset_control
during initialization and does not release it.This becomes a problem on 4.9 because reset_control_get has been split
into exclusive mode(default) and shared(which need to be marked).
Leaking a reference counts looks like attempting to fetch a second
reference to a controller and this WARNs and returns -EBUSY.Fix by releasing it at the end of the function.
Signed-off-by: Leonard Crestez
-
Murata work-around code for HT Avail failure
(due to no external slow clk).Signed-off-by: xlin
Signed-off-by: Tiberiu Breana -
Remove HW_OOB define from BCM43340 config, enabling it to
handle edge interrupts.Signed-off-by: xlin
Signed-off-by: Tiberiu Breana -
Due to the eviation i2c clk settings, the result may less than
100KBps. As a result, some i2c slave works in wrong condition.This patch changes i2c bitrate to 200KBps
Signed-off-by: Gao Pan
(cherry-pick from e8001d5993b9be81a872a0d93106e71050dced24) -
A NACK flag in ISR means i2c bus error. In such codition,
there is no need to do read/write operation. It's better
to return ISR directly and then stop i2c transfer.Signed-off-by: Gao Pan
(cherry-pick from 839d59e48b6fdbd882776a48a88ce26ff14d8b86) -
add focaltech touch screen support
Signed-off-by: Gao Pan
(cherry-pick from 595cefbee5586e77ceb9ad900c256177a98367c7) -
Replace WL_ERR() with WL_INFO in some normal code slice to avoid confusion.
Signed-off-by: Fugang Duan
-
In defalut, most of i.MX boards share one MII bus in boards design to reduce
pins utilize, but others each MAC use their exclusive MII bus. To solve the
problem, user can select to define the mii-exclusive property in board dts file.The patch also update binding doc.
Signed-off-by: Fugang Duan
-
Register Athreos PHY AR8031 fixup.
Signed-off-by: Fugang Duan
(cherry picked and merged from commit:676bf1d92b3e6babdab623694fd83d54f881fc2f) -
Add dts property "phy-reset-gpios" PROBE_DEFER check, and use
gpio_set_value_cansleep() due to the FEC PHY reset gpio may be on
an I2C expander.Signed-off-by: Fugang Duan
(cherry picked from commit: 3b63e39f460d239c19a5afaf281d9a512b958cf7)