18 Apr, 2019
18 commits
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Upstream rejected ARCH_MXC_ARM64 in favor of defining ARCH_MXC for
arm64 so the current condition is never enabled.Make it depend on HAVE_IMX_SC instead because it depends on SCFW API.
Fixes: e972661a45c5 ("MLK-19305-2 gpio: mxc: add gpio PAD wakeup support")
Signed-off-by: Leonard Crestez -
During the time window of noirq suspend and noirq resume, if a GPIO
pin is enabled as system wakeup source, the corresponding GPIO line's
IRQ will be unmasked, and GPIO bank will NOT lost power, when GPIO irq
arrives, generic irq handler will mask it until GPIO driver is ready
to handle it, but in GPIO noirq resume callback, current
implementation will restore the IMR register using the value saved in
previous noirq suspend callback which is unmasked, so this GPIO line
with IRQ pending will be unmasked again after GPIO IMR regitster is
restored, ARM will be triggered to handle this IRQ again, because of
the change of commit bf22ff45bed6 ("genirq: Avoid unnecessary low
level irq function calls"), the mask_irq function will check the
status of irq_data to decide whether to mask the irq, in this
scenario, since the GPIO IRQ is being masked before GPIO noirq resume,
IRQD_IRQ_MASKED flag is set, so the second time GPIO IRQ triggered by
restoring GPIO IMR register, the irq_mask callback will be skipped and
cause ARM busy handling the GPIO IRQ come all the way and no response to
user anymore.Signed-off-by: Bai Ping
Reviewed-by: Anson Huang
(cherry picked from commit c03d9ec1f861ff7cd04637ef01aa7e14388277b6)
Signed-off-by: Arulpandiyan Vadivel -
This patch adds line 0 PAD wakeup support, it is missed previously,
also protect the PAD wakeup interrupt handle with spin lock to
avoid possible race condition of GPIO interrupt arriving during
PAD wakeup interrupt handling.Signed-off-by: Anson Huang
Reviewed-by: Fugang Duan
(cherry picked from commit db842471137ef2758de6192f8f400e4b56da5d01)
Signed-off-by: Arulpandiyan Vadivel -
This patch enables gpio pin's pad wakeup function which
is supported by SCFW, with pad wakeup enabled, GPIO's
power is no need to be enabled after suspend, hence
save a sub-system's power.To enable pad wakeup, dtb needs to provide pad wakeup
number for each gpio port, and each pin has to provide
, they should be inside each gpio node,
this is for calling SCFW APIs to enable/disable pad wakeup,
example of adding GPIO4_22 pad wakeup in dtb:gpio4: gpio@5d0c0000 {
compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
reg = ;
interrupts = ;
gpio-controller;
#gpio-cells = ;
power-domains = ;
interrupt-controller;
#interrupt-cells = ;
/* total pad wakeup number in gpio4 */
pad-wakeup-num = ;
/* SC_P_USDHC1_CD_B, SC_PAD_WAKEUP_LOW_LVL, LINE 22 */
pad-wakeup = ;
};Pad wakeup will be enabled after GPIO port suspend, and
once any pad wakes up system, gpio driver will get the
wakeup line and handles the event during noirq resume
phase.Signed-off-by: Anson Huang
Reviewed-by: Bai Ping
(cherry picked from commit 1c7ffe9bf3a115031cec8c759a4cd0e09146de09)
[Arul: Fix merge conflicts]
Signed-off-by: Arulpandiyan Vadivel -
Add output IOs defalut voltage set in device tree by add property like:
out-default = /bits/ 16 ;Reviewed-by: Haibo Chen
Signed-off-by: Fugang Duan
Signed-off-by: Arulpandiyan Vadivel -
In system resume phase, the runtime resume will be called
after noirq resume, and the GPIO could be operated between
the noirq resume phase and the runtime resume phase, current
implementation of noirq suspend/resume shares same save
regs array with runtime suspend/resume, the GPIO operation
will be overwritten by runtime resume using old save regs
array, so adding independent gpio save regs for noirq
suspend/resume ONLY, and use noirq suspend/resume callback
instead of sharing runtime suspend/resume callback.Signed-off-by: Anson Huang
Reviewed-by: Richard Zhu
Signed-off-by: Arulpandiyan Vadivel -
On some i.MX platforms, GPIO banks may lose power
when system suspend, and some peripheral devices
resume may need to use GPIO during resume phase
before GPIO resume, so GPIO needs to be restored
as early as possible, this patch moves GPIO
restore operation to noirq resume phase.Signed-off-by: Anson Huang
Reviewed-by: Bai Ping
Signed-off-by: Arulpandiyan Vadivel -
Add gpio interrupt chip support that only support wakeup feature
by M4 core.Reviewed-by: Robin Gong
Signed-off-by: Fugang Duan
Signed-off-by: Arulpandiyan Vadivel -
On MX7ULP, GPIO controller needs two necessary clocks:
Port module clock and GPIO module clock.Add them as optional clocks to use.
Acked-by: Fugang Duan
Signed-off-by: Dong Aisheng
Signed-off-by: Arulpandiyan Vadivel -
Add device reset for max732x driver.
Signed-off-by: Fugang Duan
Acked-by: Gao Pan
Signed-off-by: Arulpandiyan Vadivel -
Save gpio controller registers before power off, and then restore these
registers after power on. There have two cases need to save/restore regs:
a. If sub_irqs/sub_gpios are not free/released, device suspend() force
runtime suspend and power domain off in suspended stage, it needs to
keep the previous registers value after device resume back.
b. If some sub_irqs set irq type just one time, then irqchip should
restore the registers for correct irq type.Signed-off-by: Fugang Duan
Tested-by: Guoniu.Zhou
Reviewed-by: Frank Li
[Arul: Fix merge conflicts]
Signed-off-by: Arulpandiyan Vadivel -
Add runtime pm support to automatically enable the ipg clock and power
domain if present.To save power, suggest all sub-devices of the gpiochip/irq domain should
dynamically manage gpio/irq resources like:
gpio:
gpiod_request()
... //set gpio direction
gpiod_free()
irq:
devm_request_irq() //=> module active
devm_free_irq() //=>module is non-active or runtime idleSince the driver support irqchip and gpiochip, any irq/gpio resource
requested by other modules the gpio controller clock and power domain
should be enabled. And the irqchip's parent's clock and power also should
be enabled if irq resoruce requested.Signed-off-by: Fugang Duan
Tested-by: Guoniu.Zhou
Reviewed-by: Frank Li
[Arul: Fix merge conflicts]
Signed-off-by: Arulpandiyan Vadivel -
This reverts commit ede7fb452221c2dc5a401eff4e920d79f3ed4662.
This breaks the existing gpio_dev_pm_ops implementation, hence revert
this upstream patch which is introduced in v4.19.24.Signed-off-by: Srikanth Krishnakar
-
At imx7ulp, any interrupts can wake system up from suspend at "standby"
mode, so we mask interrupt for gpio by default. The user can still
enable wakeup through /sys entry.Signed-off-by: Peter Chen
Signed-off-by: Arulpandiyan Vadivel -
Correct device_reset() return value checking.
Signed-off-by: Fugang Duan
Signed-off-by: Arulpandiyan Vadivel -
For some platform such as imx7D SDB, one pin of 74x164 to
control all peripheral power supply(PERI_3V_EN).
The pin should keep in high voltage level when 74x164 loading,
otherwise the module depend on PERI_3V3 will lose power.
So add new property registers-default into 74x164 driver.Signed-off-by: Sandor Yu
Signed-off-by: Fugang Duan
(cherry picked from commit: 61fe7af7e47dd8bf6acc91ceabd9e660d28de28a)
Signed-off-by: Arulpandiyan Vadivel -
The pca953x type of devices, e.g. max7310, may have a reset which needs
to be handled to get the device start working. Add a device_reset()
call for that, and defer the probe if the reset controller for that is
not ready yet.Signed-off-by: Shawn Guo
Signed-off-by: Fugang Duan
Signed-off-by: Arulpandiyan Vadivel -
Add rpmsg virtual gpio driver support.
i.MX7ULP GPIO PTA and PTB resource are managed by M4 core, setup one
simple protocol with M4 core based on RPMSG virtual IO to let A core
access such GPIOs that is what the driver do.Reviewed-by: Richard Zhu
Reviewed-by: Robin Gong
Signed-off-by: Fugang Duan
Signed-off-by: Vipul Kumar
06 Apr, 2019
1 commit
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[ Upstream commit d01849f7deba81f4959fd9e51bf20dbf46987d1c ]
Tony notes that the GPIO module does not idle when level interrupts are
in use, as the wakeup appears to get stuck.After extensive investigation, it appears that the wakeup will only be
cleared if the interrupt status register is cleared while the interrupt
is enabled. However, we are currently clearing it with the interrupt
disabled for level-based interrupts.It is acknowledged that this observed behaviour conflicts with a
statement in the TRM:CAUTION
After servicing the interrupt, the status bit in the interrupt status
register (GPIOi.GPIO_IRQSTATUS_0 or GPIOi.GPIO_IRQSTATUS_1) must be
reset and the interrupt line released (by setting the corresponding
bit of the interrupt status register to 1) before enabling an
interrupt for the GPIO channel in the interrupt-enable register
(GPIOi.GPIO_IRQSTATUS_SET_0 or GPIOi.GPIO_IRQSTATUS_SET_1) to prevent
the occurrence of unexpected interrupts when enabling an interrupt
for the GPIO channel.However, this does not appear to be a practical problem.
Further, as reported by Grygorii Strashko ,
the TI Android kernel tree has an earlier similar patch as "GPIO: OMAP:
Fix the sequence to clear the IRQ status" saying:if the status is cleared after disabling the IRQ then sWAKEUP will not
be cleared and gates the module transitionWhen we unmask the level interrupt after the interrupt has been handled,
enable the interrupt and only then clear the interrupt. If the interrupt
is still pending, the hardware will re-assert the interrupt status.Should the caution note in the TRM prove to be a problem, we could
use a clear-enable-clear sequence instead.Cc: Aaro Koskinen
Cc: Keerthy
Cc: Peter Ujfalusi
Signed-off-by: Russell King
[tony@atomide.com: updated comments based on an earlier TI patch]
Signed-off-by: Tony Lindgren
Acked-by: Grygorii Strashko
Signed-off-by: Linus Walleij
Signed-off-by: Sasha Levin
03 Apr, 2019
2 commits
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commit c5bc6e526d3f217ed2cc3681d256dc4a2af4cc2b upstream.
Current code test wrong value so it does not verify if the written
data is correctly read back. Fix it.
Also make it return -EPERM if read value does not match written bit,
just like it done for adnp_gpio_direction_output().Fixes: 5e969a401a01 ("gpio: Add Avionic Design N-bit GPIO expander support")
Cc:
Signed-off-by: Axel Lin
Reviewed-by: Thierry Reding
Signed-off-by: Bartosz Golaszewski
Signed-off-by: Greg Kroah-Hartman -
commit 7ecced0934e574b528a1ba6c237731e682216a74 upstream.
ida_simple_get may fail and return a negative error number.
The fix checks its return value; if it fails, go to err_destroy.Cc:
Signed-off-by: Kangjie Lu
Signed-off-by: Bartosz Golaszewski
Signed-off-by: Greg Kroah-Hartman
24 Mar, 2019
1 commit
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commit c378b3aa015931a46c91d6ccc2fe04d97801d060 upstream.
If a PCA953x gpio was used as an interrupt and then released,
the shutdown function was trying to extract the pca953x_chip
pointer directly from the irq_data, but in reality was getting
the gpio_chip structure.The net effect was that the subsequent writes to the data
structure corrupted data in the gpio_chip structure, which wasn't
immediately obvious until attempting to use the GPIO again in the
future, at which point the kernel panics.This fix correctly extracts the pca953x_chip structure via the
gpio_chip structure, as is correctly done in the other irq
functions.Fixes: 0a70fe00efea ("gpio: pca953x: Clear irq trigger type on irq shutdown")
Cc: stable@vger.kernel.org
Signed-off-by: Mark Walton
Reviewed-by: Bartosz Golaszewski
Signed-off-by: Linus Walleij
Signed-off-by: Greg Kroah-Hartman
14 Mar, 2019
1 commit
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[ Upstream commit 7ae710f9f8b2cf95297e7bbfe1c09789a7dc43d4 ]
On SoC reset all GPIO interrupts are disable. However, if kexec is
used to boot into a new kernel, the SoC does not experience a
reset. Hence GPIO interrupts can be left enabled from the previous
kernel. It is then possible for the interrupt to fire before an
interrupt handler is registered, resulting in the kernel complaining
of an "unexpected IRQ trap", the interrupt is never cleared, and so
fires again, resulting in an interrupt storm.Disable all GPIO interrupts before registering the GPIO IRQ chip.
Fixes: 7f2691a19627 ("gpio: vf610: add gpiolib/IRQ chip driver for Vybrid")
Signed-off-by: Andrew Lunn
Acked-by: Stefan Agner
Signed-off-by: Linus Walleij
Signed-off-by: Sasha Levin
27 Feb, 2019
2 commits
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commit af14b2c98adb85e9517390bb88309338b9075350 upstream.
Similarly to PXA3xx, pinctrl-single can't set pin direction on MMP2 either.
See also: commit 9dabfdd84bdfa ("gpio: pxa: disable pinctrl calls for
PXA3xx")Cc: stable@vger.kernel.org
Fixes: a770d946371e ("gpio: pxa: add pin control gpio direction and request")
Signed-off-by: Lubomir Rintel
Acked-by: Pavel Machek
Signed-off-by: Linus Walleij
Signed-off-by: Greg Kroah-Hartman -
commit fa84667b98fd1a191b2465d66b440bda6714b3bf upstream.
This fixes the kernel complains:
gpio gpiochip1: (1e000600.gpio-bank1): detected irqchip that is shared
with multiple gpiochips: please fix the driver.
gpio gpiochip2: (1e000600.gpio-bank2): detected irqchip that is shared
with multiple gpiochips: please fix the driver.Fixes: 4ba9c3afda41 ("gpio: mt7621: Add a driver for MT7621")
Cc: stable@vger.kernel.org
Signed-off-by: René van Dorst
Cc: linux-gpio@vger.kernel.org
Cc: linux-mediatek@lists.infradead.org
Tested-by: Greg Ungerer
Signed-off-by: Linus Walleij
Signed-off-by: Greg Kroah-Hartman
20 Feb, 2019
1 commit
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commit 1a5287a3dbc34cd0c02c8f64c9131bd23cdfe2bb upstream.
During noirq suspend/resume phase, GPIO irq could arrive
and its registers like IMR will be changed by irq handle
process, to make the GPIO registers exactly when it is
powered ON after resume, move the GPIO noirq suspend/resume
callback to syscore suspend/resume phase, local irq is
disabled at this phase so GPIO registers are atomic.Fixes: c19fdaeea0aa ("gpio: mxc: add power management support")
Signed-off-by: Anson Huang
Signed-off-by: Linus Walleij
Signed-off-by: Martin Hundebøll
Cc: # 4.19.x+
Signed-off-by: Sasha Levin
13 Feb, 2019
3 commits
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[ Upstream commit a109c2dbb571b10bb9969285b646f57309c98251 ]
The error cases of mediatek_gpio_bank_probe() would go unnoticed (except
for the dev_err() messages). The probe function should return an error
if one of the banks failed to initialize properly indicated by
not returning non-0.Fixes: 4ba9c3afda41 ("gpio: mt7621: Add a driver for MT7621")
Signed-off-by: Nicholas Mc Guire
Acked-by: Sean Wang
Signed-off-by: Linus Walleij
Signed-off-by: Sasha Levin -
[ Upstream commit 59d646c775d6ae688ee90fda9f2a4270c47b7490 ]
kasprintf() may return NULL on failure of internal allocation thus the
assigned label is not safe if not explicitly checked. On error
mediatek_gpio_bank_probe() returns negative values so -ENOMEM in the
(unlikely) failure case should be fine here.Fixes: 4ba9c3afda41 ("gpio: mt7621: Add a driver for MT7621")
Signed-off-by: Nicholas Mc Guire
Reviewed-by: Bartosz Golaszewski
Acked-by: Sean Wang
Signed-off-by: Linus Walleij
Signed-off-by: Sasha Levin -
[ Upstream commit 18534df419041e6c1f4b41af56ee7d41f757815c ]
gpiod_request_commit() copies the pointer to the label passed as
an argument only to be used later. But there's a chance the caller
could immediately free the passed string(e.g., local variable).
This could trigger a use after free when we use gpio label(e.g.,
gpiochip_unlock_as_irq(), gpiochip_is_requested()).To be on the safe side: duplicate the string with kstrdup_const()
so that if an unaware user passes an address to a stack-allocated
buffer, we won't get the arbitrary label.Also fix gpiod_set_consumer_name().
Signed-off-by: Muchun Song
Signed-off-by: Linus Walleij
Signed-off-by: Sasha Levin
07 Feb, 2019
5 commits
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commit f785ffb61605734b518afa766d1b5445e9f38c8d upstream.
When setting async EIC as IRQ_TYPE_EDGE_BOTH type, we missed to set the
SPRD_EIC_ASYNC_INTMODE register to 0, which means detecting edge signals.Thus this patch fixes the issue.
Fixes: 25518e024e3a ("gpio: Add Spreadtrum EIC driver support")
Cc:
Signed-off-by: Neo Hou
Signed-off-by: Baolin Wang
Signed-off-by: Bartosz Golaszewski
Signed-off-by: Greg Kroah-Hartman -
commit 09d158d52d2bceda736797a61b6c13d7fc83707b upstream.
Since differnt type EICs have its own data register to read, thus fix the
incorrect data register.Fixes: 25518e024e3a ("gpio: Add Spreadtrum EIC driver support")
Cc:
Signed-off-by: Neo Hou
Signed-off-by: Baolin Wang
Signed-off-by: Bartosz Golaszewski
Signed-off-by: Greg Kroah-Hartman -
commit 2486e67374aa8b7854c2de32869642c2873b3d53 upstream.
When multiple instances of pcf857x chips are present, a fix up
message [1] is printed during the probe of the 2nd and later
instances.The issue is that the driver is using the same irq_chip data
structure between multiple instances.Fix this by allocating the irq_chip data structure per instance.
[1] fix up message addressed by this patch
[ 1.212100] gpio gpiochip9: (pcf8575): detected irqchip that is shared with multiple gpiochips: please fix the driver.Cc: Stable
Signed-off-by: Roger Quadros
Signed-off-by: Bartosz Golaszewski
Signed-off-by: Greg Kroah-Hartman -
commit 1033be58992f818dc564196ded2bcc3f360bc297 upstream.
Nested interrupts run inside the calling thread's context and the top
half handler is never called which means that we never read the
timestamp.This issue came up when trying to read line events from a gpiochip
using regmap_irq_chip for interrupts.Fix it by reading the timestamp from the irq thread function if it's
still 0 by the time the second handler is called.Fixes: d58f2bf261fd ("gpio: Timestamp events in hardirq handler")
Cc: stable@vger.kernel.org
Signed-off-by: Bartosz Golaszewski
Signed-off-by: Greg Kroah-Hartman -
commit 2095a45e345e669ea77a9b34bdd7de5ceb422f93 upstream.
The altr_a10sr_gpio_direction_output should set proper output level
based on the value argument.Fixes: 26a48c4cc2f1 ("gpio: altera-a10sr: Add A10 System Resource Chip GPIO support.")
Cc:
Signed-off-by: Axel Lin
Tested by: Thor Thayer
Reviewed by: Thor Thayer
Signed-off-by: Bartosz Golaszewski
Signed-off-by: Greg Kroah-Hartman
26 Jan, 2019
1 commit
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[ Upstream commit ed8dce4c6f726b7f3c6bf40859b92a9e32f189c1 ]
Keeping the irq_chip definition static will make it shared with multiple
giochips in the system. This practice is considered to be bad and now we
will get the below warning from gpiolib core:"detected irqchip that is shared with multiple gpiochips: please fix the
driver."Hence, move the irq_chip definition from static to `struct pl061` for
using a unique irq_chip for each gpiochip.Signed-off-by: Manivannan Sadhasivam
Signed-off-by: Linus Walleij
Signed-off-by: Sasha Levin
13 Jan, 2019
1 commit
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[ Upstream commit c8da642d41a6811c21177c9994aa7dc35be67d46 ]
The gpio IP on Armada 370 at offset 0x18180 has neither a clk nor pwm
registers. So there is no need for a clk as the pwm isn't used anyhow.
So only check for the clk in the presence of the pwm registers. This fixes
a failure to probe the gpio driver for the above mentioned gpio device.Fixes: 757642f9a584 ("gpio: mvebu: Add limited PWM support")
Signed-off-by: Uwe Kleine-König
Reviewed-by: Gregory CLEMENT
Signed-off-by: Linus Walleij
Signed-off-by: Sasha Levin
29 Dec, 2018
2 commits
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commit e59f5e08ece1060073d92c66ded52e1f2c43b5bb upstream.
Commit 78d3a92edbfb ("gpiolib-acpi: Register GpioInt ACPI event handlers
from a late_initcall") deferred the entire acpi_gpiochip_request_interrupt
call for each event resource.This means it also delays the gpiochip_request_own_desc(..., "ACPI:Event")
call. This is a problem if some AML code reads the GPIO pin before we
run the deferred acpi_gpiochip_request_interrupt, because in that case
acpi_gpio_adr_space_handler() will already have called
gpiochip_request_own_desc(..., "ACPI:OpRegion") causing the call from
acpi_gpiochip_request_interrupt to fail with -EBUSY and we will fail to
register an event handler.acpi_gpio_adr_space_handler is prepared for acpi_gpiochip_request_interrupt
already having claimed the pin, but the other way around does not work.One example of a problem this causes, is the event handler for the OTG
ID pin on a Prowise PT301 tablet not registering, keeping the port stuck
in whatever mode it was in during boot and e.g. only allowing charging
after a reboot.This commit fixes this by only deferring the request_irq call and the
initial run of edge-triggered IRQs instead of deferring all of
acpi_gpiochip_request_interrupt.Cc: stable@vger.kernel.org
Fixes: 78d3a92edbfb ("gpiolib-acpi: Register GpioInt ACPI event ...")
Signed-off-by: Hans de Goede
Reviewed-by: Andy Shevchenko
Acked-by: Mika Westerberg
Signed-off-by: Linus Walleij
Signed-off-by: Greg Kroah-Hartman -
commit abf221d2f51b8ce7b9959a8953f880a8b0a1400d upstream.
spi_read() and spi_write() require DMA-safe memory. When
CONFIG_VMAP_STACK is selected, those functions cannot be used
with buffers on stack.This patch replaces calls to spi_read() and spi_write() by
spi_write_then_read() which doesn't require DMA-safe buffers.Fixes: 0c36ec314735 ("gpio: gpio driver for max7301 SPI GPIO expander")
Cc:
Signed-off-by: Christophe Leroy
Signed-off-by: Linus Walleij
Signed-off-by: Greg Kroah-Hartman
13 Dec, 2018
2 commits
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[ Upstream commit bff466bac59994cfcceabe4d0be5fdc1c20cd5b8 ]
Commit 3edfb7bd76bd ("gpiolib: Show correct direction from the
beginning") fixed an existing issue but broke libgpiod tests by
changing the default direction of dummy lines to output.We don't break user-space so make gpio-mockup behave as before.
Signed-off-by: Bartosz Golaszewski
Signed-off-by: Linus Walleij
Signed-off-by: Sasha Levin -
[ Upstream commit 70cdb6ad6dc342d9643a00c9092e88f0075f2b9a ]
As pointed out by Gregor, spitz keyboard matrix is broken, with or
without CONFIG_PINCTRL set, quoting :
"The gpio matrix keypard on the Zaurus C3x00 (see spitz.c) does not work
properly. Noticeable are that rshift+c does nothing where as lshift+c
creates C. Opposite it is for rshift+a vs lshift+a, here only rshift
works. This affects a few other combinations using the rshift or lshift
buttons."As a matter of fact, as for platform_data based builds CONFIG_PINCTRL=n
is required for now (as opposed for devicetree builds where it should be
set), this means gpio driver should change the direction, which is what
was attempted by commit c4e5ffb6f224 ("gpio: pxa: fix legacy non pinctrl
aware builds").Unfortunately, the input case was inverted, and the direction change was
never done. This wasn't seen up until now because the initial platform
setup (MFP) was setting this direction. Yet in Gregory's case, the
matrix-keypad driver changes back and forth the direction dynamically,
and this is why he's the first to report it.Fixes: c4e5ffb6f224 ("gpio: pxa: fix legacy non pinctrl aware builds")
Tested-by: Greg
Signed-off-by: Robert Jarzmik
Signed-off-by: Linus Walleij
Signed-off-by: Sasha Levin
