07 May, 2015
2 commits
20 Mar, 2015
1 commit
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System will be no response after resume back under low busfreq mode. The
root cause of this issue is that when the system is under ultra_low_bus_freq
mode on i.MX6SL, resume process has a low bus mode deamon in background,
cause system enter low bus mode twice, busfreq driver will notify thermal
driver to turn off PLL3 twice, and cause PLL3 usecount incorrect and UART
no message out.Signed-off-by: Bai Ping
06 Mar, 2015
1 commit
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Enable CONFIG_NETFILTER as requested by Yocto community.
Signed-off-by: Nitin Garg
05 Mar, 2015
1 commit
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In imx6sl/sx dts, the lcdif display bpp is setting to 16,
and sii902x hdmi driver bpp is 32.
The sii902x driver will overwrite the display bpp when it loading,
but some module such as v4l2 output driver is misses bpp change event.
So align sii902x hdmi driver bpp with lcdif display bpp.Signed-off-by: Sandor Yu
(cherry picked from commit 0fd274cc93a71c8636551c17d7d4157e97fe5cf2)
04 Mar, 2015
2 commits
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Set enet pll rate to 125Mhz for RGMII tx refrence clock to
support i.MX6q sabreauto cpu2 board.changed the enet_ref clock name for 3.14 kernel.
Signed-off-by: Fugang Duan
(cherry picked from commit 6ee3d49271b1f13e359c1acde189dbb6dc4cb13e) -
SDb WP pin is not connected by default on MX6Q CPU2 board, so we removed it
in DTS file. BTW, SDb slot is designed for WiFi slot, it is ok to disable WP
for old CPU board also.Signed-off-by: Dong Aisheng
(cherry picked from commit 2efa09eb28d7404933725bc25b528641a9dc10f9)
(cherry picked from commit dd6e28f2932284494c89bb4897ad84c01db969d8)
02 Mar, 2015
1 commit
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Fix the clock index for cfg clock and use MACRO instead of hard-codes.
This patch fixes the following issue.
-----------------------------------------------------------
root@imx6qdlsolo:~# /unit_tests/mxc_v4l2_capture.out -d /dev/video1 1.yuv
in_width = 176, in_height = 144
out_width = 176, out_height = 144
top = 0, left = 0
mipi csi2 can not receive sensor clk!
...ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0
VIDIOC_DQBUF failed.ERROR: v4l2 capture: VIDIOC_QBUF: buffer already queued
-----------------------------------------------------------Signed-off-by: Robby Cai
(cherry picked from commit 6e4ee449de591d3cfb93575ca639ca32944832bc)
26 Feb, 2015
2 commits
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Sync imx_v7_defconfig with imx_3.10. ARCH_MULTI_V6 is
not required.Signed-off-by: Nitin Garg
(cherry picked from commit ea673b70908b301fc9901d804f141974491dcb3d) -
The PL310 integrated on i.MX6 series and VF610 are revision r3p1 and
later. Per ARM PL310 errata document, 588369 is fixed in r2p0 and
727915 is fixed in r3p1. Neither is needed for i.MX6 or VF610. So
let's drop them.Signed-off-by: Shawn Guo
(cherry picked from commit 8629a0f43b832573b06c27a214100c9b6398f59a)
(cherry picked from commit 09d9f7dcfb59b6c65c9b1f4e37b72da480262133)
12 Feb, 2015
2 commits
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-Add vadc to generic pm domain
-Add vadc clk to dispmix managementSigned-off-by: Sandor Yu
(cherry picked from commit 9c3199fa95d0b219234b511c364f6a9d4aec75cd) -
Add vadc clock to dispmix power management.
Signed-off-by: Sandor Yu
(cherry picked from commit 42bede68c37c23d807bf7ea44d7d2f8f7b31073d)
11 Feb, 2015
7 commits
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since the pcie is power-ed by disp_mix domain,
add disp_mix domain into pcie device node.Signed-off-by: Richard Zhu
(cherry picked from commit 9ba62b896a873bf35df95b7d1c899021f3d7e9d6) -
enable imx6qdl pcie support on imx_3.14 kernel
Signed-off-by: Richard Zhu
(cherry picked from commit 87326992bc29c36abdd3c8a23f8766cfa136ab37) -
Correct the function and structure since update the below patch
(24d70aa Revert "base: power: Add generic OF-based power domain look-up")
(dc092bc PM / Domains: Add generic OF-based PM domain look-up)
Signed-off-by: Robin Gong(cherry picked from commit bddfa2a6ffa844d9a21a63dab974b993e4eccc41)
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Add support to leave PLL1 enabled since its required whenever ARM-PODF is
changed. With this patch PLL1 is set to bypassed mode (and enabled) whenever
ARM is sourced from step_clk.Signed-off-by: Ranjani Vaidyanathan
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Add support to leave PLL1 enabled since its required whenever ARM-PODF is
changed. With this patch PLL1 is set to bypassed mode (and enabled) whenever
ARM is sourced from step_clk.
Also change imx6dl.dtsi to use #defines instead of hard-coded numbers for
busfreq clocks.Signed-off-by: Ranjani Vaidyanathan
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This reverts commit 09bcfcabc08a57bce3000677052d5a2fcc2b1b68.
Signed-off-by: Ranjani Vaidyanathan
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This reverts commit 8cc908a0168afb677b5de6405579b681b6f595db.
Signed-off-by: Ranjani Vaidyanathan
09 Feb, 2015
2 commits
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Add hwrng support for i.MX6SL.
1. Add RNG driver. This driver originated as fsl-rngc.c. It
has been modified to support device tree. The name has been
changed since it supports both b and c variants of RNG.
2. Added clock and compatible info to the device tree data.
3. Added the entry in the options in the Kconfig for hwrng.(cherry picked from commit 1f3f2c0647b7319c4e23293a61512e4191593513)
[: Edited to apply to 3.14]Signed-off-by: Dan Douglass
Signed-off-by: Victoria Milhoan
(cherry picked from commit 586166b87eee2e5ec40331032aed8c8eaec884f3) -
This patch is refined from the previous commit 20d89c9c909:
-Update the parent of gpu2d_core for mx6dl.
-Update the parent of gpu3d_shader and gpu3d_core for mx6dl.
-Update the clock of gpu3d_shader and gpu3d_core for mx6dl.
The code change is cherry-picked from patch 00e75bcba16d.Signed-off-by: Loren Huang
Signed-off-by: Xianzhong
Acked-by: Jason Liu
(cherry picked from commit e63222bdba7c2de063c6367017ccd6a1d1d3cc22)
03 Feb, 2015
1 commit
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LDO2p5 cannot be disabled in low power idle mode when the USB driver
enables VBUS wakeup. To identify when LDO2p5 can be disabled add a dummy
regulator that the USB driver will enable when VBUS wakeup is required.This patch is copied from commit 7d849e4d9ebca3c as code the structure has
changed too many. directly cherry-pick has too many conflicts to resolveSigned-off-by: Bai Ping
02 Feb, 2015
5 commits
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Add checking GPU module logic in qos init. This prevents kernel
booting issue in the iMX6sx SOC where there is no GPU module.Signed-off-by: Shawn Xiao
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(cherry-pick from f9759787e60ad3422d2119f9f25ac320ca58f5df)
confilict: arch/arm/boot/dts/imx6sx.dtsi
The dts file arch has changed in 3.14. Add QoS description in
imx6sx dts manually and solve the conflict.Date Feb 2, 2015
Signed-off-by: Shawn Xiao
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(cherry-pick from f3f7f04e644d20c6483232eeb8da91ad8905d23b)
conflict: arch/arm/match-imx/match-imx6sx.c
Some patches have not been moved from 3.10 to 3.14. Rewrite the logic
as what the pre-commit has done and resolve the conflict.Date Feb 2, 2015
Signed-off-by: Shawn Xiao
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Remove csi1_v4l2_cap item from imx6sx-sdb-lcdif.dts file.
The item is not used in dts now.Signed-off-by: Sandor Yu
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-Sii902x hdmi daughter connect to lcdif1 interface,
move this function to lcdif1 dts.
-Sii902x hdmi driver share the reset pin with ov5640 driver,
one driver will been reset by the other driver,
so move sii902x reset pin configure to licdif1 dts.Signed-off-by: Sandor Yu
01 Feb, 2015
1 commit
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The cause is EPDC works not stable if DISP mix is enabled.
Signed-off-by: Robby Cai
31 Jan, 2015
1 commit
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disable gpmi nand module in imx6qdl default dts since it conflicts with
uart3Signed-off-by: Allen Xu
30 Jan, 2015
6 commits
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Currently wpa_supplicant in yocto rootfs does not work properly due to RFKILL
feature and Yocto upgrade.
It causes the WiFi in new Yocto rootfs unable to get ip address via DHCP.
The root cause is still unkown.
This patch temporarily disable RFKILL feature to make WiFi work first.Current there's no user of RFKILL in Yocto rootfs.
We will enable it again if needed after the issue is fixed.Signed-off-by: Dong Aisheng
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Clean up enet property and enebale enet2 multi-queue.
Signed-off-by: Fugang Duan
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This is used to avoid a warning:
WARNING: at /home/b29397/work/projects/linux-2.6-imx/drivers/gpio/gpiolib.c:126
gpio_to_desc+0x30/0x44()
invalid GPIO -517
Modules linked in:
....
gpiod_request: invalid GPIOSigned-off-by: Dong Aisheng
(cherry picked from commit e644b009e6e127f028f3a2708585fa867a9db35c) -
Enable sii902x driver in imx6sl/sx board
Signed-off-by: Sandor Yu
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Add cpudile driver support for i.MX6DL.
Signed-off-by: Bai Ping
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When the M4 core is enabled on i.MX6, the QSPI2 clk can't be gated,
otherwise, the M4 will hang. This patch add a check to make sure when
M4 is enabled, just skip the QSPI2 clk gating operations.Signed-off-by: Bai Ping
29 Jan, 2015
1 commit
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Add an interface for GPC used by drivers to keep mega fast mix domain
power.Signed-off-by: Li Jun
28 Jan, 2015
4 commits
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As spdif driver will register SPDIF clock to regmap, regmap will do
clk_prepare in init function, so SPDIF clock is prepared in probe, then its
root clock (pll clock) is prepared also, which cause the arm can't enter
low power mode.
Add SPDIF_GCLK in clock tree which share same gate bits with SPDIF clock.
Its root clock is ipg clock, and register it to regmap, then the issue can be
fixed.Signed-off-by: Shengjiu Wang
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As spdif driver will register SPDIF clock to regmap, regmap will do
clk_prepare in init function, so SPDIF clock is prepared in probe, then its
root clock (pll clock) is prepared also, which cause the arm can't enter
low power mode.
Add SPDIF_GCLK in clock tree which share same gate bits with SPDIF clock.
Its root clock is ipg clock, and register it to regmap, then the issue can be
fixed.Signed-off-by: Shengjiu Wang
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As spdif driver will register SPDIF clock to regmap, regmap will do
clk_prepare in init function, so SPDIF clock is prepared in probe, then its
root clock (pll clock) is prepared also, which cause the arm can't enter
low power mode.
Add SPDIF_GCLK in clock tree which share same gate bits with SPDIF clock.
Its root clock is ipg clock, and register it to regmap, then the issue can be
fixed.Signed-off-by: Shengjiu Wang
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Enable various crypto algorithms in the default kernel configuration
for i.MX6 devices.Signed-off-by: Victoria Milhoan