28 Feb, 2014
1 commit
-
Pull ubifs fix from Artem Bityutskiy:
"Just a single fix for the UBI module unload path which makes sure we
do not touch freed memory"* tag 'upstream-3.14-rc5' of git://git.infradead.org/linux-ubifs:
UBI: fix some use after free bugs
24 Feb, 2014
3 commits
-
This patch excludes reserved-marker byte-position from oobfree->length
calculation. Thus all bytes from oobfree->offset till end of OOB are free.CC: # 3.13.x+
Signed-off-by: Pekon Gupta
Signed-off-by: Brian Norris -
1) In current implementation, ecclayout->oobfree->offset is calculated with
respect to ecclayout->eccpos[0] which is incorrect because ECC bytes may not
be stored contiguously in OOB.
So, this patch calculates ecclayout->oobfree->offset with respect to last
ECC byte-position 'eccpos[ecclayout->eccbytes-1]'.2) ECC layout of some ecc-schemes expects reserved-markers at specific eccpos[]
which should not be over-written by any file-system metadata.
So this patch aligns oobfree->offset taking into account of such markers.CC: # 3.13.x+
Tested-by: Enric Balletbo i Serra
Tested-by: Stefan Roese
Signed-off-by: Pekon Gupta
Signed-off-by: Brian Norris -
Fixes: commit a919e51161b58ed7e6e663daba99ab7d558808f3
mtd: nand: omap2: clean-up BCHx_HW and BCHx_SW ECC configurations in device_probeFixes ecclayout mismatch introduced in above commit for following ecc-schemes:
- OMAP_ECC_BCH4_CODE_HW_DETECTION_SW
- OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
However, this patch also touches other ecc-schemes as the fix required
refactoring common code, into ecc-scheme specific code.This patch aligns ecc-layout for below ecc-schemes as per reference [1],[2],[3]
+---+------------+-------------++-------------+-------------+
|OOB|BCH8_CODE_HW|BCH8_CODE_HW_||HAM1_CODE_HW |HAM1_CODE_HW |
|pos| | DETECTION_SW||(x8 device) |(x16 device) |
+---+------------+-------------++-------------+-------------+
| 0 |BADBLK_MARK | BADBLK_MARK || BADBLK_MARK | BADBLK_MARK |
| 1 |BADBLK_MARK | BADBLK_MARK || eccpos[0] | BADBLK_MARK |
| 2 | eccpos[0] | eccpos[0] || eccpos[1] | eccpos[0] |
| 3 | eccpos[1] | eccpos[1] || eccpos[2] | eccpos[1] |
| 4 | eccpos[2] | eccpos[2] || eccpos[3] | eccpos[2] |
| 5 | eccpos[3] | eccpos[3] || eccpos[4] | eccpos[3] |
| 6 | eccpos[4] | eccpos[4] || eccpos[5] | eccpos[4] |
| 7 | eccpos[5] | eccpos[5] || eccpos[6] | eccpos[5] |
| 8 | eccpos[6] | eccpos[6] || eccpos[7] | eccpos[6] |
| 9 | eccpos[7] | eccpos[7] || eccpos[8] | eccpos[7] |
|10 | eccpos[8] | eccpos[8] || eccpos[9] | eccpos[8] |
|11 | eccpos[9] | eccpos[9] || eccpos[10] | eccpos[9] |
|12 | eccpos[10] | eccpos[10] || eccpos[11] | eccpos[10] |
|13 | eccpos[11] | eccpos[11] || oobfree[0] | eccpos[11] |
|14 | eccpos[12] | eccpos[12] || oobfree[1] | oobfree[0] |
|15 | eccpos[13] | || oobfree[2] | oobfree[1] |
+---+------------+-------------++-------------+-------------+
|16 | eccpos[14] | eccpos[13] || oobfree[3] | oobfree[2] |
|...| [...] | [...] || [...] | [...] |
|56 | eccpos[54] | eccpos[51] || oobfree[43] | oobfree[42] |
|57 | eccpos[55] | || oobfree[44] | oobfree[43] |
+===+============+=============+==============+=============+
|58 | oobfree[0] | oobfree[0] || oobfree[45] | oobfree[44] |
|59 | oobfree[1] | oobfree[1] || oobfree[46] | oobfree[45] |
|60 | oobfree[2] | oobfree[2] || oobfree[47] | oobfree[46] |
|61 | oobfree[3] | oobfree[3] || oobfree[48] | oobfree[47] |
|62 | oobfree[4] | oobfree[4] || oobfree[49] | oobfree[48] |
|63 | oobfree[5] | oobfree[5] || oobfree[50] | oobfree[49] |
+---+------------+-------------+--------------+-------------+[1] ecc-layout expected by ROM code, as specified in SoC TRM under:
Chapter="Initialization"
Section="Device Initialization by ROM code"
Sub-Section="Memory Booting"
Heading="NAND"
Figure="ECC Locations in NAND Spare Areas"[2] ecc-layout updates in u-boot
http://lists.denx.de/pipermail/u-boot/2013-November/167551.html[3] u-boot configurations to match above ecc-layout are documented at
https://processors.wiki.ti.com/index.php/Linux_Core_NAND_User%27s_GuideCC: # 3.13.x+
Reported-by: Enric Balletbo Serra
Tested-by: Enric Balletbo i Serra
Tested-by: Stefan Roese
Signed-off-by: Pekon Gupta
Signed-off-by: Brian Norris
15 Feb, 2014
1 commit
-
A flash may support N read retry voltage threshold modes, numbered 0
through N-1 (where mode 0 represents the initial state). However,
nand_do_read_ops() tries to use mode 0 through N.This off-by-one error shows up, for instance, when using nanddump, and
we have cycled through available modes:nand: setting READ RETRY mode 0
nand: setting READ RETRY mode 1
nand: setting READ RETRY mode 2
nand: setting READ RETRY mode 3
nand: setting READ RETRY mode 4
nand: setting READ RETRY mode 5
nand: setting READ RETRY mode 6
nand: setting READ RETRY mode 7
nand: setting READ RETRY mode 8
libmtd: error!: cannot read 8192 bytes from mtd0 (eraseblock 20, offset 0)
error 22 (Invalid argument)
nanddump: error!: mtd_readTested on Micron MT29F64G08CBCBBH1, with 8 retry modes.
Signed-off-by: Brian Norris
Acked-by: Huang Shijie
04 Feb, 2014
1 commit
-
Move the kmem_cache_free() calls down a couple lines.
Signed-off-by: Dan Carpenter
Signed-off-by: Artem Bityutskiy
31 Jan, 2014
2 commits
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Pull ubifs updates from Artem Bityutskiy:
- Improve the NOR erasure quirk - now it tries to do as little writes
as possible, because the eraseblock may be in an "unstable" state and
write operation sometimes causes NOR chip lock-ups.- Both UBI and UBIFS changes are now maintainer in one single tree,
because the amount of changes dropped significantly.* tag 'upstream-3.14-rc1' of git://git.infradead.org/linux-ubifs:
UBI: avoid program operation on NOR flash after erasure interrupted
MAINTAINERS: keep UBI and UBIFS stuff in the same tree
UBI: fix error return code -
Pull more powerpc bits from Ben Herrenschmidt:
"Here are a few more powerpc bits for this merge window. The bulk is
made of two pull requests from Scott and Anatolij that I had missed
previously (they arrived while I was away). Since both their branches
are in -next independently, and the content has been around for a
little while, they can still go in.The rest is mostly bug and regression fixes, a small series of
cleanups to our pseries cpuidle code (including moving it to the right
place), and one new cpuidle bakend for the powernv platform. I also
wired up the new sched_attr syscalls"* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (37 commits)
powerpc: Wire up sched_setattr and sched_getattr syscalls
powerpc/hugetlb: Replace __get_cpu_var with get_cpu_var
powerpc: Make sure "cache" directory is removed when offlining cpu
powerpc/mm: Fix mmap errno when MAP_FIXED is set and mapping exceeds the allowed address space
powerpc/powernv/cpuidle: Back-end cpuidle driver for powernv platform.
powerpc/pseries/cpuidle: smt-snooze-delay cleanup.
powerpc/pseries/cpuidle: Remove MAX_IDLE_STATE macro.
powerpc/pseries/cpuidle: Make cpuidle-pseries backend driver a non-module.
powerpc/pseries/cpuidle: Use cpuidle_register() for initialisation.
powerpc/pseries/cpuidle: Move processor_idle.c to drivers/cpuidle.
powerpc: Fix 32-bit frames for signals delivered when transactional
powerpc/iommu: Fix initialisation of DART iommu table
powerpc/numa: Fix decimal permissions
powerpc/mm: Fix compile error of pgtable-ppc64.h
powerpc: Fix hw breakpoints on !HAVE_HW_BREAKPOINT configurations
clk: corenet: Adds the clock binding
powerpc/booke64: Guard e6500 tlb handler with CONFIG_PPC_FSL_BOOK3E
powerpc/512x: dts: add MPC5125 clock specs
powerpc/512x: clk: support MPC5121/5123/5125 SoC variants
powerpc/512x: clk: enforce even SDHC divider values
...
29 Jan, 2014
2 commits
-
<<
Switch mpc512x to the common clock framework and adapt mpc512x
drivers to use the new clock driver. Old PPC_CLOCK code is
removed entirely since there are no users any more.
>> -
Pull MTD updates from Brian Norris:
- Add me (Brian Norris) as an additional MTD maintainer (it'd be nice to get
David's "ack" for this; I'm sure he approves, but he's been pretty silent
lately)
- Add Ezequiel Garcie as maintainer for the pxa3xx NAND driver
- Last (?) round of pxa3xx improvements for supporting Armada 370/XP
- Typical churn in driver boilerplate (OOM messages, printk()'s, devm_*, etc.)
- Quad read mode support for SPI NOR driver (m25p80)
- Update Davinci NAND driver to prepare for use on new platforms
- Begin to kill off NAND_MAX_{PAGE,OOB}SIZE macros; more work is pending
- Miscellaneous NAND device support (new IDs)
- Add READ RETRY support for Micron MLC NAND
- Support new GPMI NAND ECC layout device-tree binding
- Avoid mapping stack/vmalloc() memory for GPMI NAND DMA* tag 'for-linus-20140127' of git://git.infradead.org/linux-mtd: (151 commits)
mtd: gpmi: add sanity check when mapping DMA for read_buf/write_buf
mtd: gpmi: allocate a proper buffer for non ECC read/write
mtd: m25p80: Set rx_nbits for Quad SPI transfers
mtd: m25p80: Enable Quad SPI read transfers for s25fl512s
mtd: s3c2410: Merge plat/regs-nand.h into s3c2410.c
mtd: mtdram: add missing 'const'
mtd: m25p80: assign default read command
mtd: nuc900_nand: remove redundant return value check of platform_get_resource()
mtd: plat_nand: remove redundant return value check of platform_get_resource()
mtd: nand: add Intel manufacturer ID
mtd: nand: add SanDisk manufacturer ID
mtd: nand: add support for Samsung K9LCG08U0B
mtd: nand: pxa3xx: Add support for 2048 bytes page size devices
mtd: m25p80: Use OPCODE_QUAD_READ_4B for 4-byte addressing
mtd: nand: don't use {read,write}_buf for 8-bit transfers
mtd: nand: use __packed shorthand
mtd: nand: support Micron READ RETRY
mtd: nand: add generic READ RETRY support
mtd: nand: add ONFI vendor block for Micron
mtd: nand: localize ECC failures per page
...
28 Jan, 2014
4 commits
-
The buffer pointer passed from the upper layer may points to
a buffer in the stack or a buffer allocated by vmalloc, and etc..This patch adds more sanity check to this buffer.
After this patch, if we meet a buffer which is allocated by vmalloc or
a buffer in the stack, we will use our own DMA buffer @data_buffer_dma
to do the DMA operations. If the buffer is not the cases above, we will
map it for DMA operations directly.Signed-off-by: Huang Shijie
Signed-off-by: Brian Norris -
The @data_buffer_dma buffer is used for non ECC read/write.
Currently, the length of the buffer is PAGE_SIZE, but the NAND chip may
has 8K page or 16K page. So we have to extend it for the large page NAND
chips.The gpmi_alloc_dma_buffer will be called twice. The first time is to
allocate a temporary buffer for scanning the NAND chip; The second time
is to allocate a buffer to store the real page content.This patch allocates a buffer of PAGE_SIZE size for scanning the NAND
chip when gpmi_alloc_dma_buffer is called the first time, and allocates a
buffer of the real NAND page size for the second time gpmi_alloc_dma_buffer
is called.Signed-off-by: Huang Shijie
Signed-off-by: Brian Norris -
When using the Quad Read opcode, SPI masters still use Single SPI
transfers, as spi_transfer.rx_nbits defaults to SPI_NBITS_SINGLE.
Use SPI_NBITS_QUAD to fix this.While an earlier version of commit 3487a63955c34ea508bcf4ca5131ddd953876e2d
("drivers: mtd: m25p80: add quad read support") did this correctly, it was
forgotten in the version that got merged.Signed-off-by: Geert Uytterhoeven
Acked-by: Marek Vasut
Signed-off-by: Brian Norris -
Spansion s25fl512s supports Quad SPI transfers, hence set the
M25P80_QUAD_READ flag.Signed-off-by: Geert Uytterhoeven
Acked-by: Marek Vasut
Signed-off-by: Brian Norris
23 Jan, 2014
2 commits
-
Pull trivial tree updates from Jiri Kosina:
"Usual rocket science stuff from trivial.git"* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (39 commits)
neighbour.h: fix comment
sched: Fix warning on make htmldocs caused by wait.h
slab: struct kmem_cache is protected by slab_mutex
doc: Fix typo in USB Gadget Documentation
of/Kconfig: Spelling s/one/once/
mkregtable: Fix sscanf handling
lp5523, lp8501: comment improvements
thermal: rcar: comment spelling
treewide: fix comments and printk msgs
IXP4xx: remove '1 &&' from a condition check in ixp4xx_restart()
Documentation: update /proc/uptime field description
Documentation: Fix size parameter for snprintf
arm: fix comment header and macro name
asm-generic: uaccess: Spelling s/a ny/any/
mtd: onenand: fix comment header
doc: driver-model/platform.txt: fix a typo
drivers: fix typo in DEVTMPFS_MOUNT Kconfig help text
doc: Fix typo (acces_process_vm -> access_process_vm)
treewide: Fix typos in printk
drivers/gpu/drm/qxl/Kconfig: reformat the help text
... -
plat/regs-nand.h is used only by S3C2410 nand driver. Since there
are no other users, merge this file into the driver code to remove
platform dependency. While at it also remove unused macros.Signed-off-by: Sachin Kamat
Acked-by: Kukjin Kim
Signed-off-by: Brian Norris
21 Jan, 2014
8 commits
-
mtdram_init_device() wasn't updated along with mtd_partition.name.
Signed-off-by: Brian Norris
Cc: Geert Uytterhoeven -
In the following commit (in -next):
commit 8552b439aba7f32063755d23f79ca27b4d0a3115
drivers: mtd: m25p80: convert "bool" read check into an enumWe converted the boolean 'fast_read' property to become an enum
'flash_read', but at the same time, we changed the conditional path so
that it doesn't choose a default value in some cases (technically, we
choose the correct default simply by virtue of devm_kzalloc(), which
zeroes this out to be a NORMAL read operation, but still...).Fix this by setting a default for the 'else' clause.
Signed-off-by: Brian Norris
Cc: Sourav Poddar
Acked-by: Marek Vasut -
Remove unneeded error handling on the result of a call
to platform_get_resource() when the value is passed to
devm_ioremap_resource().Signed-off-by: Wei Yongjun
Reviewed-by: Jingoo Han
Signed-off-by: Brian Norris -
Remove unneeded error handling on the result of a call
to platform_get_resource() when the value is passed to
devm_ioremap_resource(). And move those two call together
to make the connection between them more clear.Signed-off-by: Wei Yongjun
Reviewed-by: Jingoo Han
Signed-off-by: Brian Norris -
Add the Intel manufacturer Id.
Tested with Intel JS29F32G08ACMD1(4096 + 224) which is ONFI 2.0 compliant
nand.Signed-off-by: Huang Shijie
Signed-off-by: Brian Norris -
Add the manufactor ID for SanDisk.
Make preparation for SanDisk SDTNRGAMA-008G.Signed-off-by: Huang Shijie
Signed-off-by: Brian Norris -
Assume that:
tmp = ((extid >> 2) & 0x04) | (extid & 0x03));From the K9LCG08U0B's datasheet, we know that:
the oob size is 640 when tmp is 6;
the oob size is 1024 when tmp is 7;Signed-off-by: Huang Shijie
[Brian: fixed compile issue]
Signed-off-by: Brian Norris -
This commit adds support for devices with 2048B page sizes and
4-bit ECC strength requirements. This is achieved by enabling the BCH
ECC engine, which provides a higher strength: 16-bit over 2048 bytes.Additionally, add a proper ECC layout to model the controller's view
of the device (where 'U' means unused and 'B' is the bad block marker):----------------------------------------------------
| 2048B data | B | B | 30B spare | 30B ECC | U | U |
----------------------------------------------------Signed-off-by: Rodolfo Giometti
[Brian: updated with Ezequiel's patch description]
Acked-by: Ezequiel Garcia
Signed-off-by: Brian Norris
17 Jan, 2014
1 commit
-
commit 3487a63955c34ea508bcf4ca5131ddd953876e2d ("drivers: mtd: m25p80: add
quad read support") in -next added both the 3-byte OPCODE_QUAD_READ and the
4-byte OPCODE_QUAD_READ_4B, but incorrectly uses OPCODE_QUAD_READ for both
3-byte and 4-byte addressing.Use OPCODE_QUAD_READ_4B in the 4-byte case to fix this.
Signed-off-by: Geert Uytterhoeven
Acked-by: Marek Vasut
Signed-off-by: Brian Norris
15 Jan, 2014
1 commit
-
According to the Open NAND Flash Interface Specification (ONFI) Revision
3.1 "Parameters are always transferred on the lower 8-bits of the data
bus." for the Get Features and Set Features commands.So using read_buf and write_buf is wrong for 16-bit wide nand chips as
they use I/O[15:0]. The Get Features command is easily fixed using 4
times the read_byte callback. For Set Features implement a new
overwritable callback "write_byte". Still I expect the default to work
just fine for all controllers and making it overwriteable was just done
for symmetry.Signed-off-by: Uwe Kleine-König
[Brian: fixed warning]
Tested-by: Brian Norris
Signed-off-by: Brian Norris
14 Jan, 2014
3 commits
-
Micron provides READ RETRY support via the ONFI vendor-specific
parameter block (to indicate how many read-retry modes are available)
and the ONFI {GET,SET}_FEATURES commands with a vendor-specific feature
address (to support reading/switching the current read-retry mode).The recommended sequence is as follows:
1. Perform PAGE_READ operation
2. If no ECC error, we are done
3. Run SET_FEATURES with feature address 89h, mode 1
4. Retry PAGE_READ operation
5. If ECC error and there are remaining supported modes, increment the
mode and return to step 3. Otherwise, this is a true ECC error.
6. Run SET_FEATURES with feature address 89h, mode 0, to return to the
default state.This patch implements the chip->setup_read_retry() callback for
Micron and fills in the chip->read_retries.Tested on Micron MT29F32G08CBADA, which supports 8 read-retry modes.
The Micron vendor-specific table was checked against the datasheets for
the following Micron NAND:Needs retry Cell-type Part number Vendor revision Byte 180
----------- --------- ---------------- --------------- ------------
No SLC MT29F16G08ABABA 1 Reserved (0)
No MLC MT29F32G08CBABA 1 Reserved (0)
No SLC MT29F1G08AACWP 1 0
Yes MLC MT29F32G08CBADA 1 08h
Yes MLC MT29F64G08CBABA 2 08hSigned-off-by: Brian Norris
Acked-by: Huang Shijie -
Modern MLC (and even SLC?) NAND can experience a large number of
bitflips (beyond the recommended correctability capacity) due to drifts
in the voltage threshold (Vt). These bitflips can cause ECC errors to
occur well within the expected lifetime of the flash. To account for
this, some manufacturers provide a mechanism for shifting the Vt
threshold after a corrupted read.The generic pattern seems to be that a particular flash has N read retry
modes (where N = 0, traditionally), and after an ECC failure, the host
should reconfigure the flash to use the next available mode, then retry
the read operation. This process repeats until all bitfips can be
corrected or until the host has tried all available retry modes.This patch adds the infrastructure support for a
vendor-specific/flash-specific callback, used for setting the read-retry
mode (i.e., voltage threshold).For now, this patch always returns the flash to mode 0 (the default
mode) after a successful read-retry, according to the flowchart found in
Micron's datasheets. This may need to change in the future if it is
determined that eventually, mode 0 is insufficient for the majority of
the flash cells (and so for performance reasons, we should leave the
flash in mode 1, 2, etc.).Signed-off-by: Brian Norris
Acked-by: Huang Shijie -
ECC failures can be tracked at the page level, not the do_read_ops level
(i.e., a potentially multi-page transaction).This helps prepare for READ RETRY support.
Signed-off-by: Brian Norris
Acked-by: Huang Shijie
13 Jan, 2014
2 commits
-
Now that the driver can support the Armada 370/XP SoC NAND controller,
add the devicetree compatible string, enabling its use.Signed-off-by: Ezequiel Garcia
Acked-by: Jason Cooper
Signed-off-by: Brian Norris -
after device tree based clock lookup became available, the NAND
flash driver need no longer use the previous global "nfc_clk" name,
but should use the "ipg" clock name specific to the OF nodeCc: David Woodhouse
Cc: Artem Bityutskiy
Cc: linux-mtd@lists.infradead.org
Signed-off-by: Gerhard Sittig
Signed-off-by: Anatolij Gustschin
12 Jan, 2014
5 commits
-
This patch kills the NAND_MAX_PAGESIZE/NAND_MAX_OOBSIZE by the following
way:
1.) change the @buf field of nand_buf{} from an array to a pointer.
also remove the DENALI_BUF_SIZE macro.2.) Before we call the nand_scan_ident, we allocate a temporary buffer
whose size is PAGE_SIZE.3.) After we finish the nand_scan_ident, we have already getten the
page size and oob size. We will allocate the right buffer size
again.Signed-off-by: Huang Shijie
Reviewed-by: Josh Triplett
Signed-off-by: Brian Norris -
We kill the NAND_MAX_PAGESIZE/NAND_MAX_OOBSIZE by the following way:
1.) Before we call the nand_scan_ident, we allocate a temporary buffer
whose size is PAGE_SIZE.
2.) After we finish the nand_scan_ident, we have already getten the
page size and oob size. We will allocate the right buffer size
again.Signed-off-by: Huang Shijie
Reviewed-by: Josh Triplett
Signed-off-by: Brian Norris -
mtd.name is assigned to IFC NAND physical address. Assignment type is u32.
It is not providing correct physical address of IFC NAND.Update assignment type to u64.
Signed-off-by: Prabhakar Kushwaha
Signed-off-by: Brian Norris -
This patch assigned the type->name to mtd->name when mtd->name is
NULL in function "find_full_id_nand".
mtd->name is NULL may cause some problem.Signed-off-by: Cai Zhiyong
Acked-by: Huang Shijie
Signed-off-by: Brian Norris -
commit 93115b7fa8f4 ("mtd: onenand/samsung: make regs-onenand.h file local")
moved the file to the current location but forgot to remove the pointer to
its previous location. Clean it up.Signed-off-by: Sachin Kamat
Signed-off-by: Brian Norris
10 Jan, 2014
2 commits
-
The kernel already has this information, and individual drivers
shouldn't duplicate that. This also eliminates the use of __DATE__ and
__TIME__, which make the build non-deterministic.Signed-off-by: Josh Triplett
Reviewed-by: Jingoo Han
Signed-off-by: Brian Norris -
nor_erase_prepare() will be called before erase a NOR flash, it will program '0'
into a block to mark this block. But program data into a erasure interrupted block
can cause program timtout(several minutes at most) error, could impact other
operation on NOR flash. So UBIFS can read this block first to avoid unneeded
program operation.This patch try to put read operation at head of write operation in
nor_erase_prepare(), read out the data.
If the data is already corrupt, then no need to program any data into this block,
just go to erase this block.This patch is validated on Micron NOR flash, part number is：JS28F512M29EWHA
Signed-off-by: Qi Wang
Signed-off-by: Artem Bityutskiy
08 Jan, 2014
2 commits
-
Some devices (like WNDR3700v3) have board_data without MPFR magic, some
extra header or extra NVRAM around 0x100. In such case we have to look
for another magic which is BD 0B 0D BD (BD probably stands for Board
Data). It's located "far far away", so instead of extending buffer add
another mtd_read.Signed-off-by: Rafał Miłecki
Signed-off-by: Brian Norris -
Some devices have even nicer-to-recognize CFE thanks to the magic.
Signed-off-by: Rafał Miłecki
Signed-off-by: Brian Norris
